i965/vec4: fix assert to detect SIMD lowered DF instructions in IVB

On IVB, DF instructions have lowered the SIMD width to 4 but the
exec_size will be later doubled. Fix the assert to avoid crashing in
this case.

Signed-off-by: Samuel Iglesias Gonsálvez <siglesias@igalia.com>
[ Francisco Jerez: Simplify assert.  Except for the 'inst->group % 4
  == 0' part the assertion was redundant with the previous assertion. ]
Reviewed-by: Francisco Jerez <currojerez@riseup.net>

diff --git a/src/intel/compiler/brw_vec4_generator.cpp b/src/intel/compiler/brw_vec4_generator.cpp
index 5be4ef7fd4b341d3a6afb17f5a58b50ebd26db9d..090815884003939b6c04bb7317ac939e7a0369b0 100644 (file)
--- a/src/intel/compiler/brw_vec4_generator.cpp
+++ b/src/intel/compiler/brw_vec4_generator.cpp
@@ -1524,11 +1524,7 @@ generate_code(struct brw_codegen *p,
       brw_set_default_acc_write_control(p, inst->writes_accumulator);
 
       assert(inst->group % inst->exec_size == 0);
-      assert(inst->group % 8 == 0 ||
-             inst->dst.type == BRW_REGISTER_TYPE_DF ||
-             inst->src[0].type == BRW_REGISTER_TYPE_DF ||
-             inst->src[1].type == BRW_REGISTER_TYPE_DF ||
-             inst->src[2].type == BRW_REGISTER_TYPE_DF);
+      assert(inst->group % 4 == 0);
 
       unsigned exec_size = inst->exec_size;
       if (devinfo->gen == 7 &&