panfrost: Fold work_count packing for blend shaders
authorAlyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Thu, 20 Aug 2020 19:52:32 +0000 (15:52 -0400)
committerTomeu Vizoso <tomeu.vizoso@collabora.com>
Tue, 25 Aug 2020 15:05:35 +0000 (17:05 +0200)
It's annoying this is needed at all, but that's life for you.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6440>

src/gallium/drivers/panfrost/pan_cmdstream.c

index c206687960fe71fa45315a70fc02330aa5837e2e..6926de6b82d1eca400a5e2644b7269b1846f487b 100644 (file)
@@ -553,6 +553,7 @@ panfrost_emit_frag_shader(struct panfrost_context *ctx,
 
         struct pipe_rasterizer_state *rast = &ctx->rasterizer->base;
         const struct panfrost_zsa_state *zsa = ctx->depth_stencil;
+        unsigned rt_count = ctx->pipe_framebuffer.nr_cbufs;
 
         memset(fragmeta, 0, sizeof(*fragmeta));
 
@@ -587,6 +588,11 @@ panfrost_emit_frag_shader(struct panfrost_context *ctx,
                         (zsa->base.depth.enabled && zsa->base.depth.func != PIPE_FUNC_ALWAYS) ||
                         zsa->base.stencil[0].enabled;
 
+                bool has_blend_shader = false;
+
+                for (unsigned c = 0; c < rt_count; ++c)
+                        has_blend_shader |= blend[c].is_shader;
+
                 pan_pack(&prop, MIDGARD_PROPERTIES, cfg) {
                         cfg.uniform_buffer_count = panfrost_ubo_count(ctx, PIPE_SHADER_FRAGMENT);
                         cfg.uniform_count = fs->uniform_count;
@@ -594,6 +600,10 @@ panfrost_emit_frag_shader(struct panfrost_context *ctx,
                         cfg.writes_globals = fs->writes_global;
                         cfg.suppress_inf_nan = true; /* XXX */
 
+                        /* TODO: Reduce this limit? */
+                        if (has_blend_shader)
+                                cfg.work_register_count = MAX2(cfg.work_register_count, 8);
+
                         cfg.stencil_from_shader = fs->writes_stencil;
                         cfg.helper_invocation_enable = fs->helper_invocations;
                         cfg.depth_source = fs->writes_depth ?
@@ -667,9 +677,6 @@ panfrost_emit_frag_shader(struct panfrost_context *ctx,
         SET_BIT(fragmeta->unknown2_4, MALI_ALPHA_TO_COVERAGE,
                         ctx->blend->base.alpha_to_coverage);
 
-        /* Get blending setup */
-        unsigned rt_count = ctx->pipe_framebuffer.nr_cbufs;
-
         /* Disable shader execution if we can */
         if (dev->quirks & MIDGARD_SHADERLESS
                         && !panfrost_fs_required(fs, blend, rt_count)) {
@@ -691,18 +698,6 @@ panfrost_emit_frag_shader(struct panfrost_context *ctx,
                 memcpy(&fragmeta->midgard1, &prop, sizeof(prop));
         }
 
-         /* If there is a blend shader, work registers are shared. We impose 8
-          * work registers as a limit for blend shaders. Should be lower XXX */
-
-        if (!(dev->quirks & IS_BIFROST)) {
-                for (unsigned c = 0; c < rt_count; ++c) {
-                        if (blend[c].is_shader) {
-                                fragmeta->midgard1.work_count =
-                                        MAX2(fragmeta->midgard1.work_count, 8);
-                        }
-                }
-        }
-
         if (dev->quirks & MIDGARD_SFBD) {
                 /* When only a single render target platform is used, the blend
                  * information is inside the shader meta itself. We additionally