etnaviv: Update headers from rnndb

Signed-off-by: Wladimir J. van der Laan <laanwj@gmail.com>
Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>

diff --git a/src/gallium/drivers/etnaviv/hw/state_3d.xml.h b/src/gallium/drivers/etnaviv/hw/state_3d.xml.h
index 332188eba7691cce863c6dfc98e1f4cfb962bdb5..4a632e3dbc0101f7431151cd505837ff70140c7b 100644 (file)
--- a/src/gallium/drivers/etnaviv/hw/state_3d.xml.h
+++ b/src/gallium/drivers/etnaviv/hw/state_3d.xml.h
@@ -13,7 +13,7 @@ The rules-ng-ng source files this header was generated from are:
 - state_hi.xml  (  26403 bytes, from 2017-01-07 14:27:54)
 - copyright.xml (   1597 bytes, from 2016-10-29 07:29:22)
 - state_2d.xml  (  51552 bytes, from 2016-10-29 07:29:22)
-- state_3d.xml  (  66964 bytes, from 2017-04-13 12:38:05)
+- state_3d.xml  (  67197 bytes, from 2017-07-23 10:53:21)
 - state_vg.xml  (   5975 bytes, from 2016-10-29 07:29:22)
 
 Copyright (C) 2012-2017 by the following authors:
@@ -278,10 +278,10 @@ DEALINGS IN THE SOFTWARE.
 #define VIVS_VS_RANGE_HIGH__SHIFT                              16
 #define VIVS_VS_RANGE_HIGH(x)                                  (((x) << VIVS_VS_RANGE_HIGH__SHIFT) & VIVS_VS_RANGE_HIGH__MASK)
 
-#define VIVS_VS_NEW_UNK00860                                   0x00000860
-#define VIVS_VS_NEW_UNK00860_UNK0                              0x00000001
-#define VIVS_VS_NEW_UNK00860_PS                                        0x00000010
-#define VIVS_VS_NEW_UNK00860_UNK12                             0x00001000
+#define VIVS_VS_UNIFORM_CACHE                                  0x00000860
+#define VIVS_VS_UNIFORM_CACHE_FLUSH                            0x00000001
+#define VIVS_VS_UNIFORM_CACHE_PS                               0x00000010
+#define VIVS_VS_UNIFORM_CACHE_UNK12                            0x00001000
 
 #define VIVS_VS_UNIFORM_BASE                                   0x00000864
 
@@ -1197,6 +1197,7 @@ DEALINGS IN THE SOFTWARE.
 #define VIVS_TE_SAMPLER_CONFIG1_SWIZZLE_A__MASK                        0x00700000
 #define VIVS_TE_SAMPLER_CONFIG1_SWIZZLE_A__SHIFT               20
 #define VIVS_TE_SAMPLER_CONFIG1_SWIZZLE_A(x)                   (((x) << VIVS_TE_SAMPLER_CONFIG1_SWIZZLE_A__SHIFT) & VIVS_TE_SAMPLER_CONFIG1_SWIZZLE_A__MASK)
+#define VIVS_TE_SAMPLER_CONFIG1_UNK25                          0x02000000
 #define VIVS_TE_SAMPLER_CONFIG1_HALIGN__MASK                   0x1c000000
 #define VIVS_TE_SAMPLER_CONFIG1_HALIGN__SHIFT                  26
 #define VIVS_TE_SAMPLER_CONFIG1_HALIGN(x)                      (((x) << VIVS_TE_SAMPLER_CONFIG1_HALIGN__SHIFT) & VIVS_TE_SAMPLER_CONFIG1_HALIGN__MASK)
@@ -1295,6 +1296,7 @@ DEALINGS IN THE SOFTWARE.
 #define VIVS_NTE_SAMPLER_CONFIG1_SWIZZLE_A__MASK               0x00700000
 #define VIVS_NTE_SAMPLER_CONFIG1_SWIZZLE_A__SHIFT              20
 #define VIVS_NTE_SAMPLER_CONFIG1_SWIZZLE_A(x)                  (((x) << VIVS_NTE_SAMPLER_CONFIG1_SWIZZLE_A__SHIFT) & VIVS_NTE_SAMPLER_CONFIG1_SWIZZLE_A__MASK)
+#define VIVS_NTE_SAMPLER_CONFIG1_UNK25                         0x02000000
 #define VIVS_NTE_SAMPLER_CONFIG1_HALIGN__MASK                  0x1c000000
 #define VIVS_NTE_SAMPLER_CONFIG1_HALIGN__SHIFT                 26
 #define VIVS_NTE_SAMPLER_CONFIG1_HALIGN(x)                     (((x) << VIVS_NTE_SAMPLER_CONFIG1_HALIGN__SHIFT) & VIVS_NTE_SAMPLER_CONFIG1_HALIGN__MASK)
@@ -1305,6 +1307,8 @@ DEALINGS IN THE SOFTWARE.
 
 #define VIVS_NTE_SAMPLER_UNK10500(i0)                         (0x00010500 + 0x4*(i0))
 
+#define VIVS_NTE_SAMPLER_UNK10700(i0)                         (0x00010700 + 0x4*(i0))
+
 #define VIVS_NTE_SAMPLER_ADDR(i0)                             (0x00010800 + 0x40*(i0))
 #define VIVS_NTE_SAMPLER_ADDR__ESIZE                           0x00000040
 #define VIVS_NTE_SAMPLER_ADDR__LEN                             0x00000020