ac: add has_gfx9_scissor_bug to ac_gpu_info

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>

diff --git a/src/amd/common/ac_gpu_info.c b/src/amd/common/ac_gpu_info.c
index b56460f8b3216a44fc239bdc3e9fc8897ff13ce2..720abb5469aa955a41cfcf35398657a21dd6f29a 100644 (file)
--- a/src/amd/common/ac_gpu_info.c
+++ b/src/amd/common/ac_gpu_info.c
@@ -467,6 +467,9 @@ bool ac_query_gpu_info(int fd, void *dev_p,
 
        info->cpdma_prefetch_writes_memory = info->chip_class <= GFX8;
 
+       info->has_gfx9_scissor_bug = info->family == CHIP_VEGA10 ||
+                                    info->family == CHIP_RAVEN;
+
        /* Get the number of good compute units. */
        info->num_good_compute_units = 0;
        for (i = 0; i < info->max_se; i++)

diff --git a/src/amd/common/ac_gpu_info.h b/src/amd/common/ac_gpu_info.h
index a1d4d142493e67ce624fcde75a25db63a5997f04..0b62e37b67eae4ded67414be4ec1c68dfc53d7f1 100644 (file)
--- a/src/amd/common/ac_gpu_info.h
+++ b/src/amd/common/ac_gpu_info.h
@@ -156,6 +156,9 @@ struct radeon_info {
        /* Tile modes. */
        uint32_t                    si_tile_mode_array[32];
        uint32_t                    cik_macrotile_mode_array[16];
+
+       /* Hardware bugs. */
+       bool                        has_gfx9_scissor_bug;
 };
 
 bool ac_query_gpu_info(int fd, void *dev_p,

diff --git a/src/amd/vulkan/radv_cmd_buffer.c b/src/amd/vulkan/radv_cmd_buffer.c
index 0529a38857e4c6df501d7138c034c6654644c2fb..8c7eeddd709ea90e69c8a5669d5acf204fcd25a2 100644 (file)
--- a/src/amd/vulkan/radv_cmd_buffer.c
+++ b/src/amd/vulkan/radv_cmd_buffer.c
@@ -2125,7 +2125,7 @@ radv_cmd_buffer_flush_dynamic_state(struct radv_cmd_buffer *cmd_buffer)
                radv_emit_viewport(cmd_buffer);
 
        if (states & (RADV_CMD_DIRTY_DYNAMIC_SCISSOR | RADV_CMD_DIRTY_DYNAMIC_VIEWPORT) &&
-           !cmd_buffer->device->physical_device->has_scissor_bug)
+           !cmd_buffer->device->physical_device->rad_info.has_gfx9_scissor_bug)
                radv_emit_scissor(cmd_buffer);
 
        if (states & RADV_CMD_DIRTY_DYNAMIC_LINE_WIDTH)
@@ -4468,7 +4468,7 @@ static bool radv_need_late_scissor_emission(struct radv_cmd_buffer *cmd_buffer,
 {
        struct radv_cmd_state *state = &cmd_buffer->state;
 
-       if (!cmd_buffer->device->physical_device->has_scissor_bug)
+       if (!cmd_buffer->device->physical_device->rad_info.has_gfx9_scissor_bug)
                return false;
 
        if (cmd_buffer->state.context_roll_without_scissor_emitted || info->strmout_buffer)

diff --git a/src/amd/vulkan/radv_device.c b/src/amd/vulkan/radv_device.c
index 9786b4704ee591dde5eda787f8629d5b8f8b8bb8..a34e5506463a9cd4b6a90f755fb83ce9b87a9e36 100644 (file)
--- a/src/amd/vulkan/radv_device.c
+++ b/src/amd/vulkan/radv_device.c
@@ -363,10 +363,6 @@ radv_physical_device_init(struct radv_physical_device *device,
                                         device->rad_info.family == CHIP_RENOIR;
        }
 
-       /* Vega10/Raven need a special workaround for a hardware bug. */
-       device->has_scissor_bug = device->rad_info.family == CHIP_VEGA10 ||
-                                 device->rad_info.family == CHIP_RAVEN;
-
        device->has_tc_compat_zrange_bug = device->rad_info.chip_class < GFX10;
 
        device->out_of_order_rast_allowed = device->rad_info.has_out_of_order_rast &&

diff --git a/src/amd/vulkan/radv_pipeline.c b/src/amd/vulkan/radv_pipeline.c
index 97ab503bef31d49c1bb7d8982d915458cfc191bb..0a5d94fd5f3d1eca7ff8114f141777cc6c62330b 100644 (file)
--- a/src/amd/vulkan/radv_pipeline.c
+++ b/src/amd/vulkan/radv_pipeline.c
@@ -3212,7 +3212,7 @@ radv_pipeline_generate_binning_state(struct radeon_cmdbuf *ctx_cs,
                        fpovs_per_batch = 63;
                } else {
                        /* The context states are affected by the scissor bug. */
-                       context_states_per_bin = pipeline->device->physical_device->has_scissor_bug ? 1 : 6;
+                       context_states_per_bin = pipeline->device->physical_device->rad_info.has_gfx9_scissor_bug ? 1 : 6;
                        /* 32 causes hangs for RAVEN. */
                        persistent_states_per_bin = 16;
                        fpovs_per_batch = 63;

diff --git a/src/amd/vulkan/radv_private.h b/src/amd/vulkan/radv_private.h
index abbfa8d8c3fa9f002282330b910bd38df33bd2d7..55112902c3437f4f634966769a363633441f11c8 100644 (file)
--- a/src/amd/vulkan/radv_private.h
+++ b/src/amd/vulkan/radv_private.h
@@ -281,7 +281,6 @@ struct radv_physical_device {
        struct wsi_device                       wsi_device;
 
        bool rbplus_allowed; /* if RB+ is allowed */
-       bool has_scissor_bug;
        bool has_tc_compat_zrange_bug;
 
        bool out_of_order_rast_allowed;

diff --git a/src/gallium/drivers/radeonsi/si_pipe.c b/src/gallium/drivers/radeonsi/si_pipe.c
index 5082dfda438da25f011b9e7eca6df843e7406797..fccf82338912916a952b262f19c730826586dd71 100644 (file)
--- a/src/gallium/drivers/radeonsi/si_pipe.c
+++ b/src/gallium/drivers/radeonsi/si_pipe.c
@@ -1135,8 +1135,6 @@ radeonsi_screen_create_impl(struct radeon_winsys *ws,
 #include "si_debug_options.h"
        }
 
-       sscreen->has_gfx9_scissor_bug = sscreen->info.family == CHIP_VEGA10 ||
-                                       sscreen->info.family == CHIP_RAVEN;
        sscreen->has_msaa_sample_loc_bug = (sscreen->info.family >= CHIP_POLARIS10 &&
                                            sscreen->info.family <= CHIP_POLARIS12) ||
                                           sscreen->info.family == CHIP_VEGA10 ||

diff --git a/src/gallium/drivers/radeonsi/si_pipe.h b/src/gallium/drivers/radeonsi/si_pipe.h
index 390b37e75b355e9540fd7a7d6d21d8cd3f6550e0..b8dfb8ac88219485dd36d920504768b2f967e752 100644 (file)
--- a/src/gallium/drivers/radeonsi/si_pipe.h
+++ b/src/gallium/drivers/radeonsi/si_pipe.h
@@ -495,7 +495,6 @@ struct si_screen {
        bool                            has_out_of_order_rast;
        bool                            assume_no_z_fights;
        bool                            commutative_blend_add;
-       bool                            has_gfx9_scissor_bug;
        bool                            has_msaa_sample_loc_bug;
        bool                            has_ls_vgpr_init_bug;
        bool                            dpbb_allowed;

diff --git a/src/gallium/drivers/radeonsi/si_state_binning.c b/src/gallium/drivers/radeonsi/si_state_binning.c
index a361ea253c32e20e332455c4fa2da5701befeaf7..3963823d461ac0a64818406a7a4d84d2c6a13d80 100644 (file)
--- a/src/gallium/drivers/radeonsi/si_state_binning.c
+++ b/src/gallium/drivers/radeonsi/si_state_binning.c
@@ -567,7 +567,7 @@ void si_emit_dpbb_state(struct si_context *sctx)
                 *    https://bugs.freedesktop.org/show_bug.cgi?id=110214
                 * (an alternative is to insert manual BATCH_BREAK event when
                 * a context_roll is detected). */
-               context_states_per_bin = sctx->screen->has_gfx9_scissor_bug ? 1 : 6;
+               context_states_per_bin = sctx->screen->info.has_gfx9_scissor_bug ? 1 : 6;
                /* Using 32 here can cause GPU hangs on RAVEN1 */
                persistent_states_per_bin = 16;
        }

diff --git a/src/gallium/drivers/radeonsi/si_state_draw.c b/src/gallium/drivers/radeonsi/si_state_draw.c
index dd4b13fe97f9e3b44572eef6ceff23115a895fa1..788697db02eaeb7f81decc7b04bad5c5906d5833 100644 (file)
--- a/src/gallium/drivers/radeonsi/si_state_draw.c
+++ b/src/gallium/drivers/radeonsi/si_state_draw.c
@@ -2043,10 +2043,9 @@ static void si_draw_vbo(struct pipe_context *ctx, const struct pipe_draw_info *i
         * written (i.e. the GPU rolls the context), PA_SC_VPORT_SCISSOR
         * registers must be written too.
         */
-       bool has_gfx9_scissor_bug = sctx->screen->has_gfx9_scissor_bug;
        unsigned masked_atoms = 0;
 
-       if (has_gfx9_scissor_bug) {
+       if (sctx->screen->info.has_gfx9_scissor_bug) {
                masked_atoms |= si_get_atom_bit(sctx, &sctx->atoms.s.scissors);
 
                if (info->count_from_stream_output ||
@@ -2080,7 +2079,7 @@ static void si_draw_vbo(struct pipe_context *ctx, const struct pipe_draw_info *i
                if (si_is_atom_dirty(sctx, &sctx->atoms.s.render_cond))
                        sctx->atoms.s.render_cond.emit(sctx);
 
-               if (has_gfx9_scissor_bug &&
+               if (sctx->screen->info.has_gfx9_scissor_bug &&
                    (sctx->context_roll ||
                     si_is_atom_dirty(sctx, &sctx->atoms.s.scissors)))
                        sctx->atoms.s.scissors.emit(sctx);
@@ -2114,7 +2113,7 @@ static void si_draw_vbo(struct pipe_context *ctx, const struct pipe_draw_info *i
                si_emit_all_states(sctx, info, prim, instance_count,
                                   primitive_restart, masked_atoms);
 
-               if (has_gfx9_scissor_bug &&
+               if (sctx->screen->info.has_gfx9_scissor_bug &&
                    (sctx->context_roll ||
                     si_is_atom_dirty(sctx, &sctx->atoms.s.scissors)))
                        sctx->atoms.s.scissors.emit(sctx);