aco: fix off-by-one error with 16-bit MTBUF opcodes on GFX10
authorSamuel Pitoiset <samuel.pitoiset@gmail.com>
Fri, 8 May 2020 16:02:12 +0000 (18:02 +0200)
committerMarge Bot <eric+marge@anholt.net>
Tue, 19 May 2020 17:05:05 +0000 (17:05 +0000)
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4966>

src/amd/compiler/aco_assembler.cpp

index bac91c899e77a0a8fbaca491c5982d4d404cfb83..8876b5bc8f8047ed3c2f64f841930c430e399c3c 100644 (file)
@@ -408,7 +408,7 @@ void emit_instruction(asm_context& ctx, std::vector<uint32_t>& out, Instruction*
       encoding |= (0xFF & instr->operands[1].physReg());
 
       if (ctx.chip_class >= GFX10) {
-         encoding |= (((opcode & 0x08) >> 4) << 21); /* MSB of 4-bit OPCODE */
+         encoding |= (((opcode & 0x08) >> 3) << 21); /* MSB of 4-bit OPCODE */
       }
 
       out.push_back(encoding);