nvc0: handle the case where there are no framebuffer attachments
authorIlia Mirkin <imirkin@alum.mit.edu>
Sat, 23 Jan 2016 13:37:03 +0000 (08:37 -0500)
committerIlia Mirkin <imirkin@alum.mit.edu>
Sat, 9 Apr 2016 18:55:44 +0000 (14:55 -0400)
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
docs/GL3.txt
docs/relnotes/11.3.0.html
src/gallium/drivers/nouveau/nvc0/nvc0_program.c
src/gallium/drivers/nouveau/nvc0/nvc0_screen.c
src/gallium/drivers/nouveau/nvc0/nvc0_state_validate.c
src/gallium/drivers/nouveau/nvc0/nvc0_surface.c

index c48802a9f7be17d98028a1927a4ff389205d9abe..81ece6623493cf04833a7f258efc11ecaa03b350 100644 (file)
@@ -172,7 +172,7 @@ GL 4.3, GLSL 4.30:
   GL_KHR_debug                                          DONE (all drivers)
   GL_ARB_explicit_uniform_location                      DONE (all drivers that support GLSL)
   GL_ARB_fragment_layer_viewport                        DONE (i965, nv50, nvc0, r600, radeonsi, llvmpipe)
-  GL_ARB_framebuffer_no_attachments                     DONE (i965, r600, radeonsi)
+  GL_ARB_framebuffer_no_attachments                     DONE (i965, nvc0, r600, radeonsi)
   GL_ARB_internalformat_query2                          DONE (all drivers)
   GL_ARB_invalidate_subdata                             DONE (all drivers)
   GL_ARB_multi_draw_indirect                            DONE (i965, nvc0, r600, radeonsi, llvmpipe, softpipe)
@@ -228,7 +228,7 @@ GLES3.1, GLSL ES 3.1
   GL_ARB_compute_shader                                 DONE (i965)
   GL_ARB_draw_indirect                                  DONE (i965, nvc0, r600, radeonsi, llvmpipe, softpipe)
   GL_ARB_explicit_uniform_location                      DONE (all drivers that support GLSL)
-  GL_ARB_framebuffer_no_attachments                     DONE (i965)
+  GL_ARB_framebuffer_no_attachments                     DONE (i965, nvc0, r600, radeonsi)
   GL_ARB_program_interface_query                        DONE (all drivers)
   GL_ARB_shader_atomic_counters                         DONE (i965, nvc0)
   GL_ARB_shader_image_load_store                        DONE (i965)
index d56f6553fe9b39a3927aefc1385a2e86545f508a..971b17af5ab60875c98f75713ba7fe58cd89e45e 100644 (file)
@@ -44,7 +44,7 @@ Note: some of the new features are only available with certain drivers.
 </p>
 
 <ul>
-<li>GL_ARB_framebuffer_no_attachments on r600, radeonsi</li>
+<li>GL_ARB_framebuffer_no_attachments on nvc0, r600, radeonsi</li>
 <li>GL_ARB_internalformat_query2 on all drivers</li>
 <li>GL_ARB_shader_atomic_counter_ops on nvc0</li>
 <li>GL_ARB_shader_image_load_store on radeonsi, softpipe</li>
index db02fa2df5c5c9e1d7163d9c404bffd3407c0a4e..d3024f9fa060f0ed97bf760029d26caa4adad817 100644 (file)
@@ -456,6 +456,13 @@ nvc0_fp_gen_header(struct nvc0_program *fp, struct nv50_ir_prog_info *info)
          fp->hdr[18] |= 0xf << info->out[i].slot[0];
    }
 
+   /* There are no "regular" attachments, but the shader still needs to be
+    * executed. It seems like it wants to think that it has some color
+    * outputs in order to actually run.
+    */
+   if (info->prop.fp.numColourResults == 0 && !info->prop.fp.writesDepth)
+      fp->hdr[18] |= 0xf;
+
    fp->fp.early_z = info->prop.fp.earlyFragTests;
 
    return 0;
index 4ebdd328e9c4c5d84463c9dc58fb96445928a5b9..b6eb679a61153dbbc22ba1477e79e1defd9a3df9 100644 (file)
@@ -52,6 +52,12 @@ nvc0_screen_is_format_supported(struct pipe_screen *pscreen,
    if (!(0x117 & (1 << sample_count))) /* 0, 1, 2, 4 or 8 */
       return false;
 
+   /* Short-circuit the rest of the logic -- this is used by the state tracker
+    * to determine valid MS levels in a no-attachments scenario.
+    */
+   if (format == PIPE_FORMAT_NONE && bindings & PIPE_BIND_RENDER_TARGET)
+      return true;
+
    if (!util_format_is_supported(format, bindings))
       return false;
 
@@ -218,6 +224,7 @@ nvc0_screen_get_param(struct pipe_screen *pscreen, enum pipe_cap param)
    case PIPE_CAP_QUERY_BUFFER_OBJECT:
    case PIPE_CAP_INVALIDATE_BUFFER:
    case PIPE_CAP_STRING_MARKER:
+   case PIPE_CAP_FRAMEBUFFER_NO_ATTACHMENT:
       return 1;
    case PIPE_CAP_SEAMLESS_CUBE_MAP_PER_TEXTURE:
       return (class_3d >= NVE4_3D_CLASS) ? 1 : 0;
@@ -251,7 +258,6 @@ nvc0_screen_get_param(struct pipe_screen *pscreen, enum pipe_cap param)
    case PIPE_CAP_PCI_BUS:
    case PIPE_CAP_PCI_DEVICE:
    case PIPE_CAP_PCI_FUNCTION:
-   case PIPE_CAP_FRAMEBUFFER_NO_ATTACHMENT:
       return 0;
 
    case PIPE_CAP_VENDOR_ID:
index 9c64482f2e275dd76daac5cef0c5830f21a8f468..d0d9315dd2bf1f77ef0c6e730f5ba10c8809d05d 100644 (file)
@@ -56,15 +56,18 @@ nvc0_validate_zcull(struct nvc0_context *nvc0)
 #endif
 
 static inline void
-nvc0_fb_set_null_rt(struct nouveau_pushbuf *push, unsigned i)
+nvc0_fb_set_null_rt(struct nouveau_pushbuf *push, unsigned i, unsigned layers)
 {
-   BEGIN_NVC0(push, NVC0_3D(RT_ADDRESS_HIGH(i)), 6);
-   PUSH_DATA (push, 0);
-   PUSH_DATA (push, 0);
-   PUSH_DATA (push, 64);
-   PUSH_DATA (push, 0);
+   BEGIN_NVC0(push, NVC0_3D(RT_ADDRESS_HIGH(i)), 9);
    PUSH_DATA (push, 0);
    PUSH_DATA (push, 0);
+   PUSH_DATA (push, 64);     // width
+   PUSH_DATA (push, 0);      // height
+   PUSH_DATA (push, 0);      // format
+   PUSH_DATA (push, 0);      // tile mode
+   PUSH_DATA (push, layers); // layers
+   PUSH_DATA (push, 0);      // layer stride
+   PUSH_DATA (push, 0);      // base layer
 }
 
 static void
@@ -75,12 +78,11 @@ nvc0_validate_fb(struct nvc0_context *nvc0)
     struct nvc0_screen *screen = nvc0->screen;
     unsigned i, ms;
     unsigned ms_mode = NVC0_3D_MULTISAMPLE_MODE_MS1;
+    unsigned nr_cbufs = fb->nr_cbufs;
     bool serialize = false;
 
     nouveau_bufctx_reset(nvc0->bufctx_3d, NVC0_BIND_3D_FB);
 
-    BEGIN_NVC0(push, NVC0_3D(RT_CONTROL), 1);
-    PUSH_DATA (push, (076543210 << 4) | fb->nr_cbufs);
     BEGIN_NVC0(push, NVC0_3D(SCREEN_SCISSOR_HORIZ), 2);
     PUSH_DATA (push, fb->width << 16);
     PUSH_DATA (push, fb->height << 16);
@@ -91,7 +93,7 @@ nvc0_validate_fb(struct nvc0_context *nvc0)
         struct nouveau_bo *bo;
 
         if (!fb->cbufs[i]) {
-           nvc0_fb_set_null_rt(push, i);
+           nvc0_fb_set_null_rt(push, i, 0);
            continue;
         }
 
@@ -179,6 +181,19 @@ nvc0_validate_fb(struct nvc0_context *nvc0)
         PUSH_DATA (push, 0);
     }
 
+    if (nr_cbufs == 0 && !fb->zsbuf) {
+       assert(util_is_power_of_two(fb->samples));
+       assert(fb->samples <= 8);
+
+       nvc0_fb_set_null_rt(push, 0, fb->layers);
+
+       if (fb->samples > 1)
+          ms_mode = ffs(fb->samples) - 1;
+       nr_cbufs = 1;
+    }
+
+    BEGIN_NVC0(push, NVC0_3D(RT_CONTROL), 1);
+    PUSH_DATA (push, (076543210 << 4) | nr_cbufs);
     IMMED_NVC0(push, NVC0_3D(MULTISAMPLE_MODE), ms_mode);
 
     ms = 1 << ms_mode;
@@ -592,8 +607,9 @@ nvc0_validate_derived_2(struct nvc0_context *nvc0)
    struct nouveau_pushbuf *push = nvc0->base.pushbuf;
 
    if (nvc0->zsa && nvc0->zsa->pipe.alpha.enabled &&
+       nvc0->framebuffer.zsbuf &&
        nvc0->framebuffer.nr_cbufs == 0) {
-      nvc0_fb_set_null_rt(push, 0);
+      nvc0_fb_set_null_rt(push, 0, 0);
       BEGIN_NVC0(push, NVC0_3D(RT_CONTROL), 1);
       PUSH_DATA (push, (076543210 << 4) | 1);
    }
index e657204128ef54b4d59759e0d9c7c5c84dc3784f..e108590e2157f054edfc148226d89636c7554718 100644 (file)
@@ -1043,6 +1043,8 @@ nvc0_blitctx_pre_blit(struct nvc0_blitctx *ctx)
 
    ctx->saved.fb.width = nvc0->framebuffer.width;
    ctx->saved.fb.height = nvc0->framebuffer.height;
+   ctx->saved.fb.samples = nvc0->framebuffer.samples;
+   ctx->saved.fb.layers = nvc0->framebuffer.layers;
    ctx->saved.fb.nr_cbufs = nvc0->framebuffer.nr_cbufs;
    ctx->saved.fb.cbufs[0] = nvc0->framebuffer.cbufs[0];
    ctx->saved.fb.zsbuf = nvc0->framebuffer.zsbuf;
@@ -1110,6 +1112,8 @@ nvc0_blitctx_post_blit(struct nvc0_blitctx *blit)
 
    nvc0->framebuffer.width = blit->saved.fb.width;
    nvc0->framebuffer.height = blit->saved.fb.height;
+   nvc0->framebuffer.samples = blit->saved.fb.samples;
+   nvc0->framebuffer.layers = blit->saved.fb.layers;
    nvc0->framebuffer.nr_cbufs = blit->saved.fb.nr_cbufs;
    nvc0->framebuffer.cbufs[0] = blit->saved.fb.cbufs[0];
    nvc0->framebuffer.zsbuf = blit->saved.fb.zsbuf;