i965: Add brw_program_deserialize_nir
authorJordan Justen <jordan.l.justen@intel.com>
Fri, 3 Nov 2017 23:40:17 +0000 (16:40 -0700)
committerTimothy Arceri <tarceri@itsqueeze.com>
Fri, 8 Dec 2017 05:44:35 +0000 (16:44 +1100)
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
src/mesa/drivers/dri/i965/brw_disk_cache.c
src/mesa/drivers/dri/i965/brw_program.c
src/mesa/drivers/dri/i965/brw_program.h

index 853ea98af03f7109c875bad7ad17c71136e174d3..65bb52726ebeb1aa1ef445b4553837f80e70fcb4 100644 (file)
@@ -24,7 +24,6 @@
 #include "compiler/blob.h"
 #include "compiler/glsl/ir_uniform.h"
 #include "compiler/glsl/shader_cache.h"
-#include "compiler/nir/nir_serialize.h"
 #include "main/mtypes.h"
 #include "util/build_id.h"
 #include "util/debug.h"
@@ -61,27 +60,6 @@ gen_shader_sha1(struct brw_context *brw, struct gl_program *prog,
    _mesa_sha1_compute(manifest, strlen(manifest), out_sha1);
 }
 
-static void
-restore_serialized_nir_shader(struct brw_context *brw, struct gl_program *prog,
-                              gl_shader_stage stage)
-{
-   prog->program_written_to_cache = false;
-   if (brw->ctx._Shader->Flags & GLSL_CACHE_INFO) {
-      fprintf(stderr, "falling back to nir %s.\n",
-              _mesa_shader_stage_to_abbrev(prog->info.stage));
-   }
-
-   if (!prog->nir) {
-      assert(prog->driver_cache_blob && prog->driver_cache_blob_size > 0);
-      const struct nir_shader_compiler_options *options =
-         brw->ctx.Const.ShaderCompilerOptions[stage].NirOptions;
-      struct blob_reader reader;
-      blob_reader_init(&reader, prog->driver_cache_blob,
-                       prog->driver_cache_blob_size);
-      prog->nir = nir_deserialize(NULL, options, &reader);
-   }
-}
-
 static void
 write_blob_program_data(struct blob *binary, gl_shader_stage stage,
                         const void *program,
@@ -298,7 +276,14 @@ brw_disk_cache_upload_program(struct brw_context *brw, gl_shader_stage stage)
    return true;
 
 fail:
-   restore_serialized_nir_shader(brw, prog, stage);
+   prog->program_written_to_cache = false;
+   if (brw->ctx._Shader->Flags & GLSL_CACHE_INFO) {
+      fprintf(stderr, "falling back to nir %s.\n",
+              _mesa_shader_stage_to_abbrev(prog->info.stage));
+   }
+
+   brw_program_deserialize_nir(&brw->ctx, prog, stage);
+
    return false;
 }
 
index 755d4973cc0856ec4f6ca6eafbc52f4f9847f17c..2a647cdd734edea75fa31e254d9af20ff99be73e 100644 (file)
@@ -40,6 +40,7 @@
 #include "util/ralloc.h"
 #include "compiler/glsl/ir.h"
 #include "compiler/glsl/glsl_to_nir.h"
+#include "compiler/nir/nir_serialize.h"
 
 #include "brw_program.h"
 #include "brw_context.h"
@@ -785,3 +786,18 @@ brw_assign_common_binding_table_offsets(const struct gen_device_info *devinfo,
    assert(next_binding_table_offset <= BRW_MAX_SURFACES);
    return next_binding_table_offset;
 }
+
+void
+brw_program_deserialize_nir(struct gl_context *ctx, struct gl_program *prog,
+                            gl_shader_stage stage)
+{
+   if (!prog->nir) {
+      assert(prog->driver_cache_blob && prog->driver_cache_blob_size > 0);
+      const struct nir_shader_compiler_options *options =
+         ctx->Const.ShaderCompilerOptions[stage].NirOptions;
+      struct blob_reader reader;
+      blob_reader_init(&reader, prog->driver_cache_blob,
+                       prog->driver_cache_blob_size);
+      prog->nir = nir_deserialize(NULL, options, &reader);
+   }
+}
index 701b8da482e0183bf9502807f26d5966be492dd8..bd9b4ad168a85d09ec431db361fbe1e090808703 100644 (file)
@@ -81,6 +81,10 @@ brw_assign_common_binding_table_offsets(const struct gen_device_info *devinfo,
                                         struct brw_stage_prog_data *stage_prog_data,
                                         uint32_t next_binding_table_offset);
 
+void
+brw_program_deserialize_nir(struct gl_context *ctx, struct gl_program *prog,
+                            gl_shader_stage stage);
+
 void
 brw_stage_prog_data_free(const void *prog_data);