turnip: don't hardcode gmem base for input attachment
authorJonathan Marek <jonathan@marek.ca>
Thu, 27 Feb 2020 16:18:45 +0000 (11:18 -0500)
committerMarge Bot <eric+marge@anholt.net>
Fri, 28 Feb 2020 14:04:20 +0000 (14:04 +0000)
Newer a6xx no longer has programmable GMEM base, so we can't rely on the
kernel driver setting it to 0x100000 (GMEM base is 0 on such GPUs).

Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3979>

src/freedreno/vulkan/tu_cmd_buffer.c
src/freedreno/vulkan/tu_device.c
src/freedreno/vulkan/tu_drm.c
src/freedreno/vulkan/tu_private.h

index d24e869daf2b7a88dfdf8bc1038ccf3900ee1316..f8e1ffe1c9d6f1cfe4da8e8b24bf3a4f328ef681 100644 (file)
@@ -2771,7 +2771,7 @@ write_tex_const(struct tu_cmd_buffer *cmd,
          A6XX_TEX_CONST_2_TYPE(A6XX_TEX_2D) |
          A6XX_TEX_CONST_2_PITCH(tiling->tile0.extent.width * att->cpp);
       dst[3] = 0;
-      dst[4] = 0x100000 + att->gmem_offset;
+      dst[4] = cmd->device->physical_device->gmem_base + att->gmem_offset;
       dst[5] = A6XX_TEX_CONST_5_DEPTH(1);
       for (unsigned i = 6; i < A6XX_TEX_CONST_DWORDS; i++)
          dst[i] = 0;
index f78de1bfd4c84c8de0f42f81f053c7b34eb87250..8c0459f468014cb706f52e079283a4000dcd741f 100644 (file)
@@ -252,6 +252,14 @@ tu_physical_device_init(struct tu_physical_device *device,
       goto fail;
    }
 
+   if (tu_drm_get_gmem_base(device, &device->gmem_base)) {
+      if (instance->debug_flags & TU_DEBUG_STARTUP)
+         tu_logi("Could not query the GMEM size");
+      result = vk_errorf(instance, VK_ERROR_INITIALIZATION_FAILED,
+                         "could not get GMEM size");
+      goto fail;
+   }
+
    memset(device->name, 0, sizeof(device->name));
    sprintf(device->name, "FD%d", device->gpu_id);
 
index 9b2e6f78879e98351c9e6e5237e325fcef49a7e1..5e91adaf89e674d095353f9599fd1765bde4b75b 100644 (file)
@@ -79,6 +79,12 @@ tu_drm_get_gmem_size(const struct tu_physical_device *dev, uint32_t *size)
    return 0;
 }
 
+int
+tu_drm_get_gmem_base(const struct tu_physical_device *dev, uint64_t *base)
+{
+   return tu_drm_get_param(dev, MSM_PARAM_GMEM_BASE, base);
+}
+
 int
 tu_drm_submitqueue_new(const struct tu_device *dev,
                        int priority,
index f0b6943f46534c48711f8fc0a4e005f0e3140942..d076df1fdbce0793283c0a89c4b49ddfd503822c 100644 (file)
@@ -313,6 +313,7 @@ struct tu_physical_device
 
    unsigned gpu_id;
    uint32_t gmem_size;
+   uint64_t gmem_base;
    uint32_t tile_align_w;
    uint32_t tile_align_h;
 
@@ -1624,6 +1625,9 @@ tu_drm_get_gpu_id(const struct tu_physical_device *dev, uint32_t *id);
 int
 tu_drm_get_gmem_size(const struct tu_physical_device *dev, uint32_t *size);
 
+int
+tu_drm_get_gmem_base(const struct tu_physical_device *dev, uint64_t *base);
+
 int
 tu_drm_submitqueue_new(const struct tu_device *dev,
                        int priority,