gallium/radeon: add a new HUD query for the number of mapped buffers
authorSamuel Pitoiset <samuel.pitoiset@gmail.com>
Mon, 23 Jan 2017 20:44:45 +0000 (21:44 +0100)
committerSamuel Pitoiset <samuel.pitoiset@gmail.com>
Wed, 25 Jan 2017 14:19:21 +0000 (15:19 +0100)
Useful when debugging applications which map a ton of buffers
and also because we used to run into Linux's limit on the number
of simultaneous mmap() calls.

v2: - update the commit message

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
src/gallium/drivers/radeon/r600_query.c
src/gallium/drivers/radeon/r600_query.h
src/gallium/drivers/radeon/radeon_winsys.h
src/gallium/winsys/amdgpu/drm/amdgpu_bo.c
src/gallium/winsys/amdgpu/drm/amdgpu_winsys.c
src/gallium/winsys/amdgpu/drm/amdgpu_winsys.h
src/gallium/winsys/radeon/drm/radeon_drm_bo.c
src/gallium/winsys/radeon/drm/radeon_drm_winsys.c
src/gallium/winsys/radeon/drm/radeon_drm_winsys.h

index 25e7f5bb23f7932b049cfad3f1304b3bc6a18287..96157cd40e4d0d4f926a7e146e785c985aa7457b 100644 (file)
@@ -65,6 +65,7 @@ static enum radeon_value_id winsys_id_from_type(unsigned type)
        case R600_QUERY_MAPPED_VRAM: return RADEON_MAPPED_VRAM;
        case R600_QUERY_MAPPED_GTT: return RADEON_MAPPED_GTT;
        case R600_QUERY_BUFFER_WAIT_TIME: return RADEON_BUFFER_WAIT_TIME_NS;
+       case R600_QUERY_NUM_MAPPED_BUFFERS: return RADEON_NUM_MAPPED_BUFFERS;
        case R600_QUERY_NUM_GFX_IBS: return RADEON_NUM_GFX_IBS;
        case R600_QUERY_NUM_SDMA_IBS: return RADEON_NUM_SDMA_IBS;
        case R600_QUERY_NUM_BYTES_MOVED: return RADEON_NUM_BYTES_MOVED;
@@ -133,6 +134,7 @@ static bool r600_query_sw_begin(struct r600_common_context *rctx,
        case R600_QUERY_CURRENT_GPU_SCLK:
        case R600_QUERY_CURRENT_GPU_MCLK:
        case R600_QUERY_BACK_BUFFER_PS_DRAW_RATIO:
+       case R600_QUERY_NUM_MAPPED_BUFFERS:
                query->begin_result = 0;
                break;
        case R600_QUERY_BUFFER_WAIT_TIME:
@@ -241,6 +243,7 @@ static bool r600_query_sw_end(struct r600_common_context *rctx,
        case R600_QUERY_CURRENT_GPU_SCLK:
        case R600_QUERY_CURRENT_GPU_MCLK:
        case R600_QUERY_BUFFER_WAIT_TIME:
+       case R600_QUERY_NUM_MAPPED_BUFFERS:
        case R600_QUERY_NUM_GFX_IBS:
        case R600_QUERY_NUM_SDMA_IBS:
        case R600_QUERY_NUM_BYTES_MOVED:
@@ -1722,6 +1725,7 @@ static struct pipe_driver_query_info r600_driver_query_list[] = {
        X("mapped-VRAM",                MAPPED_VRAM,            BYTES, AVERAGE),
        X("mapped-GTT",                 MAPPED_GTT,             BYTES, AVERAGE),
        X("buffer-wait-time",           BUFFER_WAIT_TIME,       MICROSECONDS, CUMULATIVE),
+       X("num-mapped-buffers",         NUM_MAPPED_BUFFERS,     UINT64, AVERAGE),
        X("num-GFX-IBs",                NUM_GFX_IBS,            UINT64, AVERAGE),
        X("num-SDMA-IBs",               NUM_SDMA_IBS,           UINT64, AVERAGE),
        X("num-bytes-moved",            NUM_BYTES_MOVED,        BYTES, CUMULATIVE),
index 1e4554d00916add809cc7457640bd9b4762e6c95..20856a5b2eae59b3efdd1a2828a3a16ba975e65e 100644 (file)
@@ -60,6 +60,7 @@ enum {
        R600_QUERY_MAPPED_VRAM,
        R600_QUERY_MAPPED_GTT,
        R600_QUERY_BUFFER_WAIT_TIME,
+       R600_QUERY_NUM_MAPPED_BUFFERS,
        R600_QUERY_NUM_GFX_IBS,
        R600_QUERY_NUM_SDMA_IBS,
        R600_QUERY_NUM_BYTES_MOVED,
index e6fb2d560d1f98177d6170b605bfa1d5b981cf0b..476f0647ddeed9e67bbb66dbbf861dad3b77372e 100644 (file)
@@ -81,6 +81,7 @@ enum radeon_value_id {
     RADEON_MAPPED_VRAM,
     RADEON_MAPPED_GTT,
     RADEON_BUFFER_WAIT_TIME_NS,
+    RADEON_NUM_MAPPED_BUFFERS,
     RADEON_TIMESTAMP,
     RADEON_NUM_GFX_IBS,
     RADEON_NUM_SDMA_IBS,
index e8d2c006f36e526c1c6cab6604cbfeda8da5ae75..5ee27b8ede0689b85a957d3de763540231f1940e 100644 (file)
@@ -181,6 +181,7 @@ void amdgpu_bo_destroy(struct pb_buffer *_buf)
          bo->ws->mapped_vram -= bo->base.size;
       else if (bo->initial_domain & RADEON_DOMAIN_GTT)
          bo->ws->mapped_gtt -= bo->base.size;
+      bo->ws->num_mapped_buffers--;
    }
 
    FREE(bo);
@@ -308,6 +309,7 @@ static void *amdgpu_bo_map(struct pb_buffer *buf,
          real->ws->mapped_vram += real->base.size;
       else if (real->initial_domain & RADEON_DOMAIN_GTT)
          real->ws->mapped_gtt += real->base.size;
+      real->ws->num_mapped_buffers++;
    }
    return (uint8_t*)cpu + offset;
 }
@@ -327,6 +329,7 @@ static void amdgpu_bo_unmap(struct pb_buffer *buf)
          real->ws->mapped_vram -= real->base.size;
       else if (real->initial_domain & RADEON_DOMAIN_GTT)
          real->ws->mapped_gtt -= real->base.size;
+      real->ws->num_mapped_buffers--;
    }
 
    amdgpu_bo_cpu_unmap(real->bo);
index e944e62f0aa90c692e783470f240a9a1d66a8f98..501f6f980dbc4010033bf5f94784da16b74b80b2 100644 (file)
@@ -424,6 +424,8 @@ static uint64_t amdgpu_query_value(struct radeon_winsys *rws,
       return ws->mapped_gtt;
    case RADEON_BUFFER_WAIT_TIME_NS:
       return ws->buffer_wait_time;
+   case RADEON_NUM_MAPPED_BUFFERS:
+      return ws->num_mapped_buffers;
    case RADEON_TIMESTAMP:
       amdgpu_query_info(ws->dev, AMDGPU_INFO_TIMESTAMP, 8, &retval);
       return retval;
index c56c342a53a0308f6d22ee7dfe4e71825ec0efa0..b19d9767dad11acdc499018ad03ed41148a2a7a3 100644 (file)
@@ -64,6 +64,7 @@ struct amdgpu_winsys {
    uint64_t buffer_wait_time; /* time spent in buffer_wait in ns */
    uint64_t num_gfx_IBs;
    uint64_t num_sdma_IBs;
+   uint64_t num_mapped_buffers;
 
    struct radeon_info info;
 
index a15d559b015e93b916eeffd2afc57ac86dc4648b..9872861525c52e7789bfb26f1b8bd672b40cf4f8 100644 (file)
@@ -382,6 +382,7 @@ void radeon_bo_destroy(struct pb_buffer *_buf)
             bo->rws->mapped_vram -= bo->base.size;
         else
             bo->rws->mapped_gtt -= bo->base.size;
+        bo->rws->num_mapped_buffers--;
     }
 
     FREE(bo);
@@ -458,6 +459,7 @@ void *radeon_bo_do_map(struct radeon_bo *bo)
        bo->rws->mapped_vram += bo->base.size;
     else
        bo->rws->mapped_gtt += bo->base.size;
+    bo->rws->num_mapped_buffers++;
 
     pipe_mutex_unlock(bo->u.real.map_mutex);
     return (uint8_t*)bo->u.real.ptr + offset;
@@ -570,6 +572,7 @@ static void radeon_bo_unmap(struct pb_buffer *_buf)
        bo->rws->mapped_vram -= bo->base.size;
     else
        bo->rws->mapped_gtt -= bo->base.size;
+    bo->rws->num_mapped_buffers--;
 
     pipe_mutex_unlock(bo->u.real.map_mutex);
 }
index c85e427a2169c29b914baad8f4938284b600b507..f5de66e8bddacd1ace323bc0cffd7f9faef3bc54 100644 (file)
@@ -614,6 +614,8 @@ static uint64_t radeon_query_value(struct radeon_winsys *rws,
        return ws->mapped_gtt;
     case RADEON_BUFFER_WAIT_TIME_NS:
         return ws->buffer_wait_time;
+    case RADEON_NUM_MAPPED_BUFFERS:
+        return ws->num_mapped_buffers;
     case RADEON_TIMESTAMP:
         if (ws->info.drm_minor < 20 || ws->gen < DRV_R600) {
             assert(0);
index ac623a1b311433280c2195d2fb05030f91468332..7f2d99d372cb55b98a406d7b122ce57273fd9edb 100644 (file)
@@ -81,6 +81,7 @@ struct radeon_drm_winsys {
     uint64_t buffer_wait_time; /* time spent in buffer_wait in ns */
     uint64_t num_gfx_IBs;
     uint64_t num_sdma_IBs;
+    uint64_t num_mapped_buffers;
     uint32_t next_bo_hash;
 
     enum radeon_generation gen;