panfrost: Move varying linking to cmdstream
authorAlyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Wed, 8 Apr 2020 17:54:17 +0000 (13:54 -0400)
committerTomeu Vizoso <tomeu.vizoso@collabora.com>
Fri, 10 Apr 2020 14:53:51 +0000 (16:53 +0200)
This isn't ISA/compiler specific, it's just looking at the NIR. So let's
move it from midgard to pan_assemble.c so it runs for Bifrost too.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4505>

src/gallium/drivers/panfrost/pan_assemble.c
src/panfrost/midgard/midgard_compile.c
src/panfrost/util/pan_ir.h

index 1486d22d70d7e0d89ff0da2d88c26ade972df668..513c55f08e777f968d262fe12aabdf899264ab47 100644 (file)
 
 #include "tgsi/tgsi_dump.h"
 
+static unsigned
+pan_format_from_nir_base(nir_alu_type base)
+{
+        switch (base) {
+        case nir_type_int:
+                return MALI_FORMAT_SINT;
+        case nir_type_uint:
+        case nir_type_bool:
+                return MALI_FORMAT_UINT;
+        case nir_type_float:
+                return MALI_CHANNEL_FLOAT;
+        default:
+                unreachable("Invalid base");
+        }
+}
+
+static unsigned
+pan_format_from_nir_size(nir_alu_type base, unsigned size)
+{
+        if (base == nir_type_float) {
+                switch (size) {
+                case 16: return MALI_FORMAT_SINT;
+                case 32: return MALI_FORMAT_UNORM;
+                default:
+                        unreachable("Invalid float size for format");
+                }
+        } else {
+                switch (size) {
+                case 1:
+                case 8:  return MALI_CHANNEL_8;
+                case 16: return MALI_CHANNEL_16;
+                case 32: return MALI_CHANNEL_32;
+                default:
+                         unreachable("Invalid int size for format");
+                }
+        }
+}
+
+static enum mali_format
+pan_format_from_glsl(const struct glsl_type *type)
+{
+        enum glsl_base_type glsl_base = glsl_get_base_type(glsl_without_array(type));
+        nir_alu_type t = nir_get_nir_type_for_glsl_base_type(glsl_base);
+
+        unsigned base = nir_alu_type_get_base_type(t);
+        unsigned size = nir_alu_type_get_type_size(t);
+
+        return pan_format_from_nir_base(base) |
+                pan_format_from_nir_size(base, size) |
+                MALI_NR_CHANNELS(4);
+}
+
 void
 panfrost_shader_compile(struct panfrost_context *ctx,
                         enum pipe_shader_ir ir_type,
@@ -150,13 +202,31 @@ panfrost_shader_compile(struct panfrost_context *ctx,
         unsigned default_vec2_swizzle = panfrost_get_default_swizzle(2);
         unsigned default_vec4_swizzle = panfrost_get_default_swizzle(4);
 
+        /* Record the varying mapping for the command stream's bookkeeping */
+
+        unsigned p_varyings[32];
+        enum mali_format p_varying_type[32];
+
+        struct exec_list *l_varyings =
+                        stage == MESA_SHADER_VERTEX ? &s->outputs : &s->inputs;
+
+        nir_foreach_variable(var, l_varyings) {
+                unsigned loc = var->data.driver_location;
+                unsigned sz = glsl_count_attribute_slots(var->type, FALSE);
+
+                for (int c = 0; c < sz; ++c) {
+                        p_varyings[loc + c] = var->data.location + c;
+                        p_varying_type[loc + c] = pan_format_from_glsl(var->type);
+                }
+        }
+
         /* Iterate the varyings and emit the corresponding descriptor */
         for (unsigned i = 0; i < state->varying_count; ++i) {
-                unsigned location = program.varyings[i];
+                unsigned location = p_varyings[i];
 
                 /* Default to a vec4 varying */
                 struct mali_attr_meta v = {
-                        .format = program.varying_type[i],
+                        .format = p_varying_type[i],
                         .swizzle = default_vec4_swizzle,
                         .unknown1 = 0x2,
                 };
index 6986de29950645d45e0ea5e2be8cdce2bd2b7faf..d23d53bec918bb6496efa16c653fdca10c94512e 100644 (file)
@@ -2534,58 +2534,6 @@ midgard_get_first_tag_from_block(compiler_context *ctx, unsigned block_idx)
         return 1;
 }
 
-static unsigned
-pan_format_from_nir_base(nir_alu_type base)
-{
-        switch (base) {
-        case nir_type_int:
-                return MALI_FORMAT_SINT;
-        case nir_type_uint:
-        case nir_type_bool:
-                return MALI_FORMAT_UINT;
-        case nir_type_float:
-                return MALI_CHANNEL_FLOAT;
-        default:
-                unreachable("Invalid base");
-        }
-}
-
-static unsigned
-pan_format_from_nir_size(nir_alu_type base, unsigned size)
-{
-        if (base == nir_type_float) {
-                switch (size) {
-                case 16: return MALI_FORMAT_SINT;
-                case 32: return MALI_FORMAT_UNORM;
-                default:
-                        unreachable("Invalid float size for format");
-                }
-        } else {
-                switch (size) {
-                case 1:
-                case 8:  return MALI_CHANNEL_8;
-                case 16: return MALI_CHANNEL_16;
-                case 32: return MALI_CHANNEL_32;
-                default:
-                         unreachable("Invalid int size for format");
-                }
-        }
-}
-
-static enum mali_format
-pan_format_from_glsl(const struct glsl_type *type)
-{
-        enum glsl_base_type glsl_base = glsl_get_base_type(glsl_without_array(type));
-        nir_alu_type t = nir_get_nir_type_for_glsl_base_type(glsl_base);
-
-        unsigned base = nir_alu_type_get_base_type(t);
-        unsigned size = nir_alu_type_get_type_size(t);
-
-        return pan_format_from_nir_base(base) |
-                pan_format_from_nir_size(base, size) |
-                MALI_NR_CHANNELS(4);
-}
-
 /* For each fragment writeout instruction, generate a writeout loop to
  * associate with it */
 
@@ -2643,21 +2591,6 @@ midgard_compile_shader_nir(nir_shader *nir, panfrost_program *program, bool is_b
         ctx->ssa_constants = _mesa_hash_table_u64_create(NULL);
         ctx->hash_to_temp = _mesa_hash_table_u64_create(NULL);
 
-        /* Record the varying mapping for the command stream's bookkeeping */
-
-        struct exec_list *varyings =
-                        ctx->stage == MESA_SHADER_VERTEX ? &nir->outputs : &nir->inputs;
-
-        nir_foreach_variable(var, varyings) {
-                unsigned loc = var->data.driver_location;
-                unsigned sz = glsl_type_size(var->type, FALSE);
-
-                for (int c = 0; c < sz; ++c) {
-                        program->varyings[loc + c] = var->data.location + c;
-                        program->varying_type[loc + c] = pan_format_from_glsl(var->type);
-                }
-        }
-
         /* Lower gl_Position pre-optimisation, but after lowering vars to ssa
          * (so we don't accidentally duplicate the epilogue since mesa/st has
          * messed with our I/O quite a bit already) */
index be02dc7576e60519ec30ae17c44a811be563f293..72f282163a7887793adabf0e459c7d4b0e426179 100644 (file)
@@ -93,9 +93,6 @@ typedef struct {
         unsigned sysval_count;
         unsigned sysvals[MAX_SYSVAL_COUNT];
 
-        unsigned varyings[32];
-        enum mali_format varying_type[32];
-
         /* Boolean properties of the program */
         bool writes_point_size;