intel/compiler/icl: Clear "null render target" bit in extended message descriptor

Otherwise all our render target writes go no where.

Reviewed-by: Matt Turner <mattst88@gmail.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>

diff --git a/src/intel/compiler/brw_eu_emit.c b/src/intel/compiler/brw_eu_emit.c
index f039af56d05d5716c5748c00b51aa59a996e2b3d..ee5a048bcaaecdee2c84439697a9149b5a177675 100644 (file)
--- a/src/intel/compiler/brw_eu_emit.c
+++ b/src/intel/compiler/brw_eu_emit.c
@@ -536,6 +536,9 @@ brw_set_dp_write_message(struct brw_codegen *p,
    if (devinfo->gen < 7) {
       brw_inst_set_dp_write_commit(devinfo, insn, send_commit_msg);
    }
+
+   if (devinfo->gen >= 11)
+      brw_inst_set_null_rt(devinfo, insn, false);
 }
 
 void

diff --git a/src/intel/compiler/brw_inst.h b/src/intel/compiler/brw_inst.h
index e6998973b6460769584117c31a77b38c4c3a4f8d..8663c1b7f5b0598d4524af74a6665f9899cfb64d 100644 (file)
--- a/src/intel/compiler/brw_inst.h
+++ b/src/intel/compiler/brw_inst.h
@@ -505,6 +505,9 @@ FF(sfid,
    /* 6:   */  27,  24,
    /* 7:   */  27,  24,
    /* 8:   */  27,  24)
+FF(null_rt,
+   /* 4-7: */ -1, -1, -1, -1, -1, -1, -1, -1, -1, -1,
+   /* 8:   */ 80, 80) /* actually only Gen11+ */
 FC(base_mrf,   27,  24, devinfo->gen < 6);
 /** @} */