radeon/vcn: add VCN2 set of internal registers for IB

From VCN2.0, the RBC have different views on the registers

Signed-off-by: Leo Liu <leo.liu@amd.com>
(v2: rebase -- Nicolai)
Acked-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>

diff --git a/src/gallium/drivers/radeon/radeon_vcn_dec.c b/src/gallium/drivers/radeon/radeon_vcn_dec.c
index b1d6edba4665d479b0f5104fd4dd8adf67414920..0e99c4c9b3e9a37ed460b61a08156d3d49fc77c6 100644 (file)
--- a/src/gallium/drivers/radeon/radeon_vcn_dec.c
+++ b/src/gallium/drivers/radeon/radeon_vcn_dec.c
@@ -46,10 +46,15 @@
 #define VP9_PROBS_TABLE_SIZE           (RDECODE_VP9_PROBS_DATA_SIZE + 256)
 #define RDECODE_SESSION_CONTEXT_SIZE   (128 * 1024)
 
-#define RDECODE_GPCOM_VCPU_CMD         0x2070c
-#define RDECODE_GPCOM_VCPU_DATA0       0x20710
-#define RDECODE_GPCOM_VCPU_DATA1       0x20714
-#define RDECODE_ENGINE_CNTL            0x20718
+#define RDECODE_VCN1_GPCOM_VCPU_CMD            0x2070c
+#define RDECODE_VCN1_GPCOM_VCPU_DATA0          0x20710
+#define RDECODE_VCN1_GPCOM_VCPU_DATA1          0x20714
+#define RDECODE_VCN1_ENGINE_CNTL               0x20718
+
+#define RDECODE_VCN2_GPCOM_VCPU_CMD            (0x503 << 2)
+#define RDECODE_VCN2_GPCOM_VCPU_DATA0          (0x504 << 2)
+#define RDECODE_VCN2_GPCOM_VCPU_DATA1          (0x505 << 2)
+#define RDECODE_VCN2_ENGINE_CNTL               (0x506 << 2)
 
 #define NUM_MPEG2_REFS                 6
 #define NUM_H264_REFS                  17
@@ -1009,9 +1014,9 @@ static void send_cmd(struct radeon_decoder *dec, unsigned cmd,
        addr = dec->ws->buffer_get_virtual_address(buf);
        addr = addr + off;
 
-       set_reg(dec, RDECODE_GPCOM_VCPU_DATA0, addr);
-       set_reg(dec, RDECODE_GPCOM_VCPU_DATA1, addr >> 32);
-       set_reg(dec, RDECODE_GPCOM_VCPU_CMD, cmd << 1);
+       set_reg(dec, dec->reg.data0, addr);
+       set_reg(dec, dec->reg.data1, addr >> 32);
+       set_reg(dec, dec->reg.cmd, cmd << 1);
 }
 
 /* do the codec needs an IT buffer ?*/
@@ -1414,7 +1419,7 @@ void send_cmd_dec(struct radeon_decoder *dec,
        else if (have_probs(dec))
                send_cmd(dec, RDECODE_CMD_PROB_TBL_BUFFER, msg_fb_it_probs_buf->res->buf,
                         FB_BUFFER_OFFSET + FB_BUFFER_SIZE, RADEON_USAGE_READ, RADEON_DOMAIN_GTT);
-       set_reg(dec, RDECODE_ENGINE_CNTL, 1);
+       set_reg(dec, dec->reg.cntl, 1);
 }
 
 /**
@@ -1432,7 +1437,6 @@ static void radeon_dec_end_frame(struct pipe_video_codec *decoder,
                return;
 
        dec->send_cmd(dec, target, picture);
-
        flush(dec, PIPE_FLUSH_ASYNC);
        next_buffer(dec);
 }
@@ -1583,6 +1587,18 @@ struct pipe_video_codec *radeon_create_decoder(struct pipe_context *context,
        }
        si_vid_clear_buffer(context, &dec->sessionctx);
 
+       if (sctx->family >= CHIP_NAVI10) {
+               dec->reg.data0 = RDECODE_VCN2_GPCOM_VCPU_DATA0;
+               dec->reg.data1 = RDECODE_VCN2_GPCOM_VCPU_DATA1;
+               dec->reg.cmd = RDECODE_VCN2_GPCOM_VCPU_CMD;
+               dec->reg.cntl = RDECODE_VCN2_ENGINE_CNTL;
+       } else {
+               dec->reg.data0 = RDECODE_VCN1_GPCOM_VCPU_DATA0;
+               dec->reg.data1 = RDECODE_VCN1_GPCOM_VCPU_DATA1;
+               dec->reg.cmd = RDECODE_VCN1_GPCOM_VCPU_CMD;
+               dec->reg.cntl = RDECODE_VCN1_ENGINE_CNTL;
+       }
+
        map_msg_fb_it_probs_buf(dec);
        rvcn_dec_message_create(dec);
        send_msg_buf(dec);

diff --git a/src/gallium/drivers/radeon/radeon_vcn_dec.h b/src/gallium/drivers/radeon/radeon_vcn_dec.h
index a6a726f46d68fd9a479c956d0230a5106629dd59..0c6de46b5c7242f2e1c3c132e01570cd6414da6d 100644 (file)
--- a/src/gallium/drivers/radeon/radeon_vcn_dec.h
+++ b/src/gallium/drivers/radeon/radeon_vcn_dec.h
@@ -758,6 +758,12 @@ struct radeon_decoder {
        void                            *render_pic_list[16];
        bool                            show_frame;
        unsigned                        ref_idx;
+       struct {
+               unsigned                data0;
+               unsigned                data1;
+               unsigned                cmd;
+               unsigned                cntl;
+       } reg;
        struct jpeg_params              jpg;
        void (*send_cmd)(struct radeon_decoder *dec,
                         struct pipe_video_buffer *target,