radeonsi: enable R600_DEBUG=nir for vertex and fragment shaders
authorNicolai Hähnle <nicolai.haehnle@amd.com>
Mon, 15 May 2017 23:51:41 +0000 (01:51 +0200)
committerNicolai Hähnle <nicolai.haehnle@amd.com>
Mon, 31 Jul 2017 12:55:45 +0000 (14:55 +0200)
Also, disable geometry and tessellation shaders. Mixing and matching NIR
and TGSI shaders should work (and I've tested it for the VS/PS interface),
but geometry and tessellation requires VS-as-ES/LS, which isn't implemented
yet for NIR.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
src/gallium/drivers/radeon/r600_pipe_common.c
src/gallium/drivers/radeon/r600_pipe_common.h
src/gallium/drivers/radeonsi/si_pipe.c

index cc52d6ba3952fbdeb3a0eb0985faa6784a766a47..8c66cc379ffc729d9921e4fc7312d78caf07358d 100644 (file)
@@ -730,6 +730,7 @@ void r600_common_context_cleanup(struct r600_common_context *rctx)
 static const struct debug_named_value common_debug_options[] = {
        /* logging */
        { "tex", DBG_TEX, "Print texture info" },
+       { "nir", DBG_NIR, "Enable experimental NIR shaders" },
        { "compute", DBG_COMPUTE, "Print compute info" },
        { "vm", DBG_VM, "Print virtual addresses when creating resources" },
        { "info", DBG_INFO, "Print driver information" },
index 4e3b42a112fef37865c638dc55702b958b2896f2..4839c762bc12677d5a3c9b72e097f6c7583fdfdc 100644 (file)
@@ -67,7 +67,7 @@
 /* Debug flags. */
 /* logging */
 #define DBG_TEX                        (1 << 0)
-/* gap - reuse */
+#define DBG_NIR                        (1 << 1)
 #define DBG_COMPUTE            (1 << 2)
 #define DBG_VM                 (1 << 3)
 /* gap - reuse */
index d5c21169d27fc458b3d79f75a7b5605e076f27d8..877c23bcb2da6121aa94931c696273f147525aeb 100644 (file)
@@ -556,6 +556,8 @@ static int si_get_param(struct pipe_screen* pscreen, enum pipe_cap param)
                return 4;
 
        case PIPE_CAP_GLSL_FEATURE_LEVEL:
+               if (sscreen->b.debug_flags & DBG_NIR)
+                       return 140; /* no geometry and tessellation shaders yet */
                if (si_have_tgsi_compute(sscreen))
                        return 450;
                return 420;
@@ -753,6 +755,10 @@ static int si_get_shader_param(struct pipe_screen* pscreen,
        case PIPE_SHADER_CAP_MAX_UNROLL_ITERATIONS_HINT:
                return 32;
        case PIPE_SHADER_CAP_PREFERRED_IR:
+               if (sscreen->b.debug_flags & DBG_NIR &&
+                   (shader == PIPE_SHADER_VERTEX ||
+                    shader == PIPE_SHADER_FRAGMENT))
+                       return PIPE_SHADER_IR_NIR;
                return PIPE_SHADER_IR_TGSI;
        case PIPE_SHADER_CAP_LOWER_IF_THRESHOLD:
                return 3;