i965: Rename brw_inst's functions that access the 3src register type
authorMatt Turner <mattst88@gmail.com>
Fri, 25 Aug 2017 17:43:38 +0000 (10:43 -0700)
committerMatt Turner <mattst88@gmail.com>
Fri, 20 Oct 2017 22:00:16 +0000 (15:00 -0700)
Put hw_ in the name so that it's clear these are the hardware encodings.

Similar to commit 9fb832332868 ("i965: Rename brw_inst's functions that
access the register type")

Reviewed-by: Scott D Phillips <scott.d.phillips@intel.com>
src/intel/compiler/brw_disasm.c
src/intel/compiler/brw_eu_emit.c
src/intel/compiler/brw_inst.h

index b70e8a5186bb64f58a4e64608d6b5442b7c27a0e..e91961028e7edd4d7c641b2c8fc6c095f601e008 100644 (file)
@@ -766,7 +766,7 @@ dest_3src(FILE *file, const struct gen_device_info *devinfo, const brw_inst *ins
    uint32_t reg_file;
    enum brw_reg_type type =
       brw_hw_3src_type_to_reg_type(devinfo,
-                                   brw_inst_3src_a16_dst_type(devinfo, inst));
+                                   brw_inst_3src_a16_dst_hw_type(devinfo, inst));
    unsigned dst_subreg_nr =
       brw_inst_3src_a16_dst_subreg_nr(devinfo, inst) * 4 /
       brw_reg_type_to_size(type);
@@ -785,7 +785,7 @@ dest_3src(FILE *file, const struct gen_device_info *devinfo, const brw_inst *ins
    err |= control(file, "writemask", writemask,
                   brw_inst_3src_a16_dst_writemask(devinfo, inst), NULL);
    err |= control(file, "dest reg encoding", three_source_reg_encoding,
-                  brw_inst_3src_a16_dst_type(devinfo, inst), NULL);
+                  brw_inst_3src_a16_dst_hw_type(devinfo, inst), NULL);
 
    return 0;
 }
@@ -936,7 +936,7 @@ src0_3src(FILE *file, const struct gen_device_info *devinfo, const brw_inst *ins
    int err = 0;
    enum brw_reg_type type =
       brw_hw_3src_type_to_reg_type(devinfo,
-                                   brw_inst_3src_a16_src_type(devinfo, inst));
+                                   brw_inst_3src_a16_src_hw_type(devinfo, inst));
    unsigned src0_subreg_nr =
       brw_inst_3src_a16_src0_subreg_nr(devinfo, inst) * 4 /
       brw_reg_type_to_size(type);
@@ -958,7 +958,7 @@ src0_3src(FILE *file, const struct gen_device_info *devinfo, const brw_inst *ins
       err |= src_swizzle(file, brw_inst_3src_a16_src0_swizzle(devinfo, inst));
    }
    err |= control(file, "src da16 reg type", three_source_reg_encoding,
-                  brw_inst_3src_a16_src_type(devinfo, inst), NULL);
+                  brw_inst_3src_a16_src_hw_type(devinfo, inst), NULL);
    return err;
 }
 
@@ -968,7 +968,7 @@ src1_3src(FILE *file, const struct gen_device_info *devinfo, const brw_inst *ins
    int err = 0;
    enum brw_reg_type type =
       brw_hw_3src_type_to_reg_type(devinfo,
-                                   brw_inst_3src_a16_src_type(devinfo, inst));
+                                   brw_inst_3src_a16_src_hw_type(devinfo, inst));
    unsigned src1_subreg_nr =
       brw_inst_3src_a16_src1_subreg_nr(devinfo, inst) * 4 /
       brw_reg_type_to_size(type);
@@ -990,7 +990,7 @@ src1_3src(FILE *file, const struct gen_device_info *devinfo, const brw_inst *ins
       err |= src_swizzle(file, brw_inst_3src_a16_src1_swizzle(devinfo, inst));
    }
    err |= control(file, "src da16 reg type", three_source_reg_encoding,
-                  brw_inst_3src_a16_src_type(devinfo, inst), NULL);
+                  brw_inst_3src_a16_src_hw_type(devinfo, inst), NULL);
    return err;
 }
 
@@ -1001,7 +1001,7 @@ src2_3src(FILE *file, const struct gen_device_info *devinfo, const brw_inst *ins
    int err = 0;
    enum brw_reg_type type =
       brw_hw_3src_type_to_reg_type(devinfo,
-                                   brw_inst_3src_a16_src_type(devinfo, inst));
+                                   brw_inst_3src_a16_src_hw_type(devinfo, inst));
    unsigned src2_subreg_nr =
       brw_inst_3src_a16_src2_subreg_nr(devinfo, inst) * 4 /
       brw_reg_type_to_size(type);
@@ -1023,7 +1023,7 @@ src2_3src(FILE *file, const struct gen_device_info *devinfo, const brw_inst *ins
       err |= src_swizzle(file, brw_inst_3src_a16_src2_swizzle(devinfo, inst));
    }
    err |= control(file, "src da16 reg type", three_source_reg_encoding,
-                  brw_inst_3src_a16_src_type(devinfo, inst), NULL);
+                  brw_inst_3src_a16_src_hw_type(devinfo, inst), NULL);
    return err;
 }
 
index f842c625bea44de7f45ec952a5c39c820d626e26..5fd9a2b3fe1edb286ad776ff7c5dac93ce0fa006 100644 (file)
@@ -738,20 +738,20 @@ brw_alu3(struct brw_codegen *p, unsigned opcode, struct brw_reg dest,
        */
       switch (dest.type) {
       case BRW_REGISTER_TYPE_F:
-         brw_inst_set_3src_a16_src_type(devinfo, inst, BRW_3SRC_TYPE_F);
-         brw_inst_set_3src_a16_dst_type(devinfo, inst, BRW_3SRC_TYPE_F);
+         brw_inst_set_3src_a16_src_hw_type(devinfo, inst, BRW_3SRC_TYPE_F);
+         brw_inst_set_3src_a16_dst_hw_type(devinfo, inst, BRW_3SRC_TYPE_F);
          break;
       case BRW_REGISTER_TYPE_DF:
-         brw_inst_set_3src_a16_src_type(devinfo, inst, BRW_3SRC_TYPE_DF);
-         brw_inst_set_3src_a16_dst_type(devinfo, inst, BRW_3SRC_TYPE_DF);
+         brw_inst_set_3src_a16_src_hw_type(devinfo, inst, BRW_3SRC_TYPE_DF);
+         brw_inst_set_3src_a16_dst_hw_type(devinfo, inst, BRW_3SRC_TYPE_DF);
          break;
       case BRW_REGISTER_TYPE_D:
-         brw_inst_set_3src_a16_src_type(devinfo, inst, BRW_3SRC_TYPE_D);
-         brw_inst_set_3src_a16_dst_type(devinfo, inst, BRW_3SRC_TYPE_D);
+         brw_inst_set_3src_a16_src_hw_type(devinfo, inst, BRW_3SRC_TYPE_D);
+         brw_inst_set_3src_a16_dst_hw_type(devinfo, inst, BRW_3SRC_TYPE_D);
          break;
       case BRW_REGISTER_TYPE_UD:
-         brw_inst_set_3src_a16_src_type(devinfo, inst, BRW_3SRC_TYPE_UD);
-         brw_inst_set_3src_a16_dst_type(devinfo, inst, BRW_3SRC_TYPE_UD);
+         brw_inst_set_3src_a16_src_hw_type(devinfo, inst, BRW_3SRC_TYPE_UD);
+         brw_inst_set_3src_a16_dst_hw_type(devinfo, inst, BRW_3SRC_TYPE_UD);
          break;
       default:
          unreachable("not reached");
index 4b0414dc654e61f69fd332ce06afec27dda68b72..e0bc2c1ceba31157ead61895c17c4e8a13ac3590 100644 (file)
@@ -214,8 +214,8 @@ F(3src_dst_reg_nr,          63,  56) /* same in align1 */
 F(3src_a16_dst_subreg_nr,   55,  53)
 F(3src_a16_dst_writemask,   52,  49)
 F8(3src_a16_nib_ctrl,       47, 47, 11, 11) /* only exists on IVB+ */
-F8(3src_a16_dst_type,       45, 44, 48, 46) /* only exists on IVB+ */
-F8(3src_a16_src_type,       43, 42, 45, 43)
+F8(3src_a16_dst_hw_type,    45, 44, 48, 46) /* only exists on IVB+ */
+F8(3src_a16_src_hw_type,    43, 42, 45, 43)
 F8(3src_src2_negate,        41, 41, 42, 42)
 F8(3src_src2_abs,           40, 40, 41, 41)
 F8(3src_src1_negate,        39, 39, 40, 40)