ac/surface: enable DCC computation for MSAA
authorMarek Olšák <marek.olsak@amd.com>
Thu, 23 Nov 2017 21:29:26 +0000 (22:29 +0100)
committerMarek Olšák <marek.olsak@amd.com>
Wed, 29 Nov 2017 17:21:30 +0000 (18:21 +0100)
Tested-by: Dieter Nützel <Dieter@nuetzel-hh.de>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
src/amd/common/ac_surface.c
src/amd/vulkan/radv_image.c
src/gallium/drivers/radeon/r600_texture.c

index 4db48cf33b42cff2809ea93b5cdf3027eebd772b..8347c45508f5581b66b7f0f445b8deeb5993aa98 100644 (file)
@@ -586,7 +586,7 @@ static int gfx6_compute_surface(ADDR_HANDLE addrlib,
                info->chip_class >= VI &&
                !(surf->flags & RADEON_SURF_Z_OR_SBUFFER) &&
                !(surf->flags & RADEON_SURF_DISABLE_DCC) &&
-               !compressed && AddrDccIn.numSamples <= 1 &&
+               !compressed &&
                ((config->info.array_size == 1 && config->info.depth == 1) ||
                 config->info.levels == 1);
 
@@ -927,9 +927,7 @@ static int gfx9_compute_miptree(ADDR_HANDLE addrlib,
                if (!(surf->flags & RADEON_SURF_DISABLE_DCC) &&
                    !(surf->flags & RADEON_SURF_SCANOUT) &&
                    !compressed &&
-                   in->swizzleMode != ADDR_SW_LINEAR &&
-                   /* TODO: We could support DCC with MSAA. */
-                   in->numSamples == 1) {
+                   in->swizzleMode != ADDR_SW_LINEAR) {
                        ADDR2_COMPUTE_DCCINFO_INPUT din = {0};
                        ADDR2_COMPUTE_DCCINFO_OUTPUT dout = {0};
                        ADDR2_META_MIP_INFO meta_mip_info[RADEON_SURF_MAX_LEVELS] = {};
index c241e369b9138a0d47021ed2fa5aae27571324e9..b145e81f826313e73133820b96b1c84081eb7e73 100644 (file)
@@ -155,7 +155,8 @@ radv_init_surface(struct radv_device *device,
             (pCreateInfo->tiling == VK_IMAGE_TILING_LINEAR) ||
             pCreateInfo->mipLevels > 1 || pCreateInfo->arrayLayers > 1 ||
             device->physical_device->rad_info.chip_class < VI ||
-            create_info->scanout || (device->instance->debug_flags & RADV_DEBUG_NO_DCC))
+            create_info->scanout || (device->instance->debug_flags & RADV_DEBUG_NO_DCC) ||
+           pCreateInfo->samples >= 2)
                surface->flags |= RADEON_SURF_DISABLE_DCC;
        if (create_info->scanout)
                surface->flags |= RADEON_SURF_SCANOUT;
index 933a4a9bbe9296d02ac55b871d626890b301b64f..0c30b62b3f029c259641b90f212260d53216dcb6 100644 (file)
@@ -266,7 +266,8 @@ static int r600_init_surface(struct r600_common_screen *rscreen,
 
        if (rscreen->chip_class >= VI &&
            (ptex->flags & R600_RESOURCE_FLAG_DISABLE_DCC ||
-            ptex->format == PIPE_FORMAT_R9G9B9E5_FLOAT))
+            ptex->format == PIPE_FORMAT_R9G9B9E5_FLOAT ||
+            ptex->nr_samples >= 2))
                flags |= RADEON_SURF_DISABLE_DCC;
 
        if (ptex->bind & PIPE_BIND_SCANOUT || is_scanout) {