radeonsi: unify and align down the max SSBO/TBO/UBO buffer binding size

Rounding down the size fixes:
    KHR-GL45.enhanced_layouts.ssb_member_invalid_offset_alignment

Fixes: 03e2adc990d239119619f22599204c1b37b83134
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4761>

diff --git a/src/gallium/drivers/radeonsi/si_get.c b/src/gallium/drivers/radeonsi/si_get.c
index 8de60018627d95f6d0dbe455773d649d4a552fb6..9a10a82e0526d8b69fcb64a61a6d3bc08c061a7e 100644 (file)
--- a/src/gallium/drivers/radeonsi/si_get.c
+++ b/src/gallium/drivers/radeonsi/si_get.c
@@ -209,7 +209,8 @@ static int si_get_param(struct pipe_screen *pscreen, enum pipe_cap param)
 
    case PIPE_CAP_MAX_TEXTURE_BUFFER_SIZE:
    case PIPE_CAP_MAX_SHADER_BUFFER_SIZE:
-      return MIN2(sscreen->info.max_alloc_size, INT_MAX);
+      /* Align it down to 256 bytes. I've chosen the number randomly. */
+      return ROUND_DOWN_TO(MIN2(sscreen->info.max_alloc_size, INT_MAX), 256);
 
    case PIPE_CAP_VERTEX_BUFFER_OFFSET_4BYTE_ALIGNED_ONLY:
    case PIPE_CAP_VERTEX_BUFFER_STRIDE_4BYTE_ALIGNED_ONLY:
@@ -371,13 +372,6 @@ static int si_get_shader_param(struct pipe_screen *pscreen, enum pipe_shader_typ
 
          return ir;
       }
-
-      case PIPE_SHADER_CAP_MAX_CONST_BUFFER_SIZE: {
-         uint64_t max_const_buffer_size;
-         pscreen->get_compute_param(pscreen, PIPE_SHADER_IR_NIR,
-                                    PIPE_COMPUTE_CAP_MAX_MEM_ALLOC_SIZE, &max_const_buffer_size);
-         return MIN2(max_const_buffer_size, INT_MAX);
-      }
       default:
          /* If compute shaders don't require a special value
           * for this cap, we can return the same value we
@@ -404,7 +398,7 @@ static int si_get_shader_param(struct pipe_screen *pscreen, enum pipe_shader_typ
    case PIPE_SHADER_CAP_MAX_TEMPS:
       return 256; /* Max native temporaries. */
    case PIPE_SHADER_CAP_MAX_CONST_BUFFER_SIZE:
-      return MIN2(sscreen->info.max_alloc_size, INT_MAX - 3); /* aligned to 4 */
+      return si_get_param(pscreen, PIPE_CAP_MAX_SHADER_BUFFER_SIZE);
    case PIPE_SHADER_CAP_MAX_CONST_BUFFERS:
       return SI_NUM_CONST_BUFFERS;
    case PIPE_SHADER_CAP_MAX_TEXTURE_SAMPLERS: