v3d: Fix input packing of .l for rounding/fdx/fdy.
authorEric Anholt <eric@anholt.net>
Tue, 5 Feb 2019 01:15:36 +0000 (17:15 -0800)
committerEric Anholt <eric@anholt.net>
Tue, 5 Feb 2019 23:45:23 +0000 (15:45 -0800)
Avoids a regression in
dEQP-GLES3.functional.shaders.derivate.fwidth.texture.* once we start
copy-propagating more input packs.

src/broadcom/qpu/qpu_pack.c
src/broadcom/qpu/tests/qpu_disasm.c

index b4d1edf3cef69350773c9e494bb60208d3bb92a0..516b0cf538a8d49f9b2ddc259393b4328286d085 100644 (file)
@@ -1095,7 +1095,7 @@ v3d_qpu_add_pack(const struct v3d_device_info *devinfo,
                 }
                 if (packed == 0)
                         return false;
                 }
                 if (packed == 0)
                         return false;
-                opcode |= packed << 2;
+                opcode = (opcode & ~(1 << 2)) | packed << 2;
                 break;
         }
 
                 break;
         }
 
index d9561a3c8d7717e870c45ea18632373a7bfb815f..1bc3c9ec67f7dd82490a4a6a2acb8d4879a690d3 100644 (file)
@@ -49,6 +49,7 @@ static const struct {
         { 33, 0x2011c89b402cc000ull, "fsub.norz  rf27, r4.abs, r1.abs; vfmul.ifa  rf34, r3.swp, r1" },
 
         { 33, 0xe01b42ab3bb063c0ull, "vfpack.andnc  rf43, rf15.l, r0.h; fmul.ifna  rf10.h, r4.l, r5.abs" },
         { 33, 0x2011c89b402cc000ull, "fsub.norz  rf27, r4.abs, r1.abs; vfmul.ifa  rf34, r3.swp, r1" },
 
         { 33, 0xe01b42ab3bb063c0ull, "vfpack.andnc  rf43, rf15.l, r0.h; fmul.ifna  rf10.h, r4.l, r5.abs" },
+        { 33, 0x600b8b87fb4d1000ull, "fdx.ifnb  rf7.h, r1.l; fmul.pushn  rf46, r3.l, r2.abs" },
 
         /* small immediates */
         { 33, 0x5de24398bbdc6218ull, "vflb.andnn  rf24     ; fmul  rf14, -8, rf8.h" },
 
         /* small immediates */
         { 33, 0x5de24398bbdc6218ull, "vflb.andnn  rf24     ; fmul  rf14, -8, rf8.h" },