intel/compiler: Move register pressure calculation into IR analysis object

This defines a new BRW_ANALYSIS object which wraps the register
pressure computation code along with its result.  For the rationale
see the previous commits converting the liveness and dominance
analysis passes to the IR analysis framework.

Reviewed-by: Matt Turner <mattst88@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4012>

diff --git a/src/intel/compiler/brw_fs.cpp b/src/intel/compiler/brw_fs.cpp
index dbe3502600668837f310724ecca4f90ac8202718..704088ab588600c1a170209bfd4a29f8e978ba19 100644 (file)
--- a/src/intel/compiler/brw_fs.cpp
+++ b/src/intel/compiler/brw_fs.cpp
@@ -6975,11 +6975,11 @@ fs_visitor::dump_instructions(const char *name)
    }
 
    if (cfg) {
-      calculate_register_pressure();
-      int ip = 0, max_pressure = 0;
+      const register_pressure &rp = regpressure_analysis.require();
+      unsigned ip = 0, max_pressure = 0;
       foreach_block_and_inst(block, backend_instruction, inst, cfg) {
-         max_pressure = MAX2(max_pressure, regs_live_at_ip[ip]);
-         fprintf(file, "{%3d} %4d: ", regs_live_at_ip[ip], ip);
+         max_pressure = MAX2(max_pressure, rp.regs_live_at_ip[ip]);
+         fprintf(file, "{%3d} %4d: ", rp.regs_live_at_ip[ip], ip);
          dump_instruction(inst, file);
          ip++;
       }
@@ -7359,28 +7359,32 @@ fs_visitor::setup_cs_payload()
    payload.num_regs = 1;
 }
 
-void
-fs_visitor::calculate_register_pressure()
+brw::register_pressure::register_pressure(const fs_visitor *v)
 {
-   const fs_live_variables &live = live_analysis.require();
-
+   const fs_live_variables &live = v->live_analysis.require();
    unsigned num_instructions = 0;
-   foreach_block(block, cfg)
+   foreach_block(block, v->cfg)
       num_instructions += block->instructions.length();
 
-   regs_live_at_ip = rzalloc_array(mem_ctx, int, num_instructions);
+   regs_live_at_ip = new unsigned[num_instructions]();
 
-   for (unsigned reg = 0; reg < alloc.count; reg++) {
+   for (unsigned reg = 0; reg < v->alloc.count; reg++) {
       for (int ip = live.vgrf_start[reg]; ip <= live.vgrf_end[reg]; ip++)
-         regs_live_at_ip[ip] += alloc.sizes[reg];
+         regs_live_at_ip[ip] += v->alloc.sizes[reg];
    }
 }
 
+brw::register_pressure::~register_pressure()
+{
+   delete[] regs_live_at_ip;
+}
+
 void
 fs_visitor::invalidate_analysis(brw::analysis_dependency_class c)
 {
    backend_shader::invalidate_analysis(c);
    live_analysis.invalidate(c);
+   regpressure_analysis.invalidate(c);
 }
 
 void

diff --git a/src/intel/compiler/brw_fs.h b/src/intel/compiler/brw_fs.h
index 3c578d9a0cd679d6b7213be8835d0833ee2a1ec7..73e18d106d4e24d896653fbcc2d7863cce494526 100644 (file)
--- a/src/intel/compiler/brw_fs.h
+++ b/src/intel/compiler/brw_fs.h
@@ -39,7 +39,34 @@ namespace {
    struct acp_entry;
 }
 
+class fs_visitor;
+
 namespace brw {
+   /**
+    * Register pressure analysis of a shader.  Estimates how many registers
+    * are live at any point of the program in GRF units.
+    */
+   struct register_pressure {
+      register_pressure(const fs_visitor *v);
+      ~register_pressure();
+
+      analysis_dependency_class
+      dependency_class() const
+      {
+         return (DEPENDENCY_INSTRUCTION_IDENTITY |
+                 DEPENDENCY_INSTRUCTION_DATA_FLOW |
+                 DEPENDENCY_VARIABLES);
+      }
+
+      bool
+      validate(const fs_visitor *) const
+      {
+         /* FINISHME */
+         return true;
+      }
+
+      unsigned *regs_live_at_ip;
+   };
 }
 
 struct brw_gs_compile;
@@ -126,7 +153,6 @@ public:
                       unsigned *out_pull_index);
    void lower_constant_loads();
    virtual void invalidate_analysis(brw::analysis_dependency_class c);
-   void calculate_register_pressure();
    void validate();
    bool opt_algebraic();
    bool opt_redundant_discard_jumps();
@@ -322,8 +348,8 @@ public:
 
    BRW_ANALYSIS(live_analysis, brw::fs_live_variables,
                 backend_shader *) live_analysis;
-
-   int *regs_live_at_ip;
+   BRW_ANALYSIS(regpressure_analysis, brw::register_pressure,
+                fs_visitor *) regpressure_analysis;
 
    /** Number of uniform variable components visited. */
    unsigned uniforms;

diff --git a/src/intel/compiler/brw_fs_visitor.cpp b/src/intel/compiler/brw_fs_visitor.cpp
index f7f58b02259235742a566e05eb1805647a7d8866..fdaabf43c483f7ec1424c0ec2eeee0a6fd2c9047 100644 (file)
--- a/src/intel/compiler/brw_fs_visitor.cpp
+++ b/src/intel/compiler/brw_fs_visitor.cpp
@@ -886,7 +886,7 @@ fs_visitor::fs_visitor(const struct brw_compiler *compiler, void *log_data,
    : backend_shader(compiler, log_data, mem_ctx, shader, prog_data),
      key(key), gs_compile(NULL), prog_data(prog_data),
      input_vue_map(input_vue_map),
-     live_analysis(this),
+     live_analysis(this), regpressure_analysis(this),
      dispatch_width(dispatch_width),
      shader_time_index(shader_time_index),
      bld(fs_builder(this, dispatch_width).at_end())
@@ -904,7 +904,7 @@ fs_visitor::fs_visitor(const struct brw_compiler *compiler, void *log_data,
                     &prog_data->base.base),
      key(&c->key.base), gs_compile(c),
      prog_data(&prog_data->base.base),
-     live_analysis(this),
+     live_analysis(this), regpressure_analysis(this),
      dispatch_width(8),
      shader_time_index(shader_time_index),
      bld(fs_builder(this, dispatch_width).at_end())
@@ -935,8 +935,6 @@ fs_visitor::init()
    this->first_non_payload_grf = 0;
    this->max_grf = devinfo->gen >= 7 ? GEN7_MRF_HACK_START : BRW_MAX_GRF;
 
-   this->regs_live_at_ip = NULL;
-
    this->uniforms = 0;
    this->last_scratch = 0;
    this->pull_constant_loc = NULL;