ac: parse EVENT_WRITE_EOP, RELEASE_MEM, WAIT_REG_MEM, NOWHERE

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>

diff --git a/src/amd/common/ac_debug.c b/src/amd/common/ac_debug.c
index a8f81bf9a9b1895319d1fcc3ddc410e4fcd05df9..79473ecb8d0dbc25606527a86ea7e7143ec94a0c 100644 (file)
--- a/src/amd/common/ac_debug.c
+++ b/src/amd/common/ac_debug.c
@@ -220,6 +220,52 @@ static uint32_t *ac_parse_packet3(FILE *f, uint32_t *ib, int *num_dw,
                        print_named_value(f, "ADDRESS_HI", ib[3], 16);
                }
                break;
+       case PKT3_EVENT_WRITE_EOP:
+               ac_dump_reg(f, R_028A90_VGT_EVENT_INITIATOR, ib[1],
+                           S_028A90_EVENT_TYPE(~0));
+               print_named_value(f, "EVENT_INDEX", (ib[1] >> 8) & 0xf, 4);
+               print_named_value(f, "TCL1_VOL_ACTION_ENA", (ib[1] >> 12) & 0x1, 1);
+               print_named_value(f, "TC_VOL_ACTION_ENA", (ib[1] >> 13) & 0x1, 1);
+               print_named_value(f, "TC_WB_ACTION_ENA", (ib[1] >> 15) & 0x1, 1);
+               print_named_value(f, "TCL1_ACTION_ENA", (ib[1] >> 16) & 0x1, 1);
+               print_named_value(f, "TC_ACTION_ENA", (ib[1] >> 17) & 0x1, 1);
+               print_named_value(f, "ADDRESS_LO", ib[2], 32);
+               print_named_value(f, "ADDRESS_HI", ib[3], 16);
+               print_named_value(f, "DST_SEL", (ib[3] >> 16) & 0x3, 2);
+               print_named_value(f, "INT_SEL", (ib[3] >> 24) & 0x7, 3);
+               print_named_value(f, "DATA_SEL", ib[3] >> 29, 3);
+               print_named_value(f, "DATA_LO", ib[4], 32);
+               print_named_value(f, "DATA_HI", ib[5], 32);
+               break;
+       case PKT3_RELEASE_MEM:
+               ac_dump_reg(f, R_028A90_VGT_EVENT_INITIATOR, ib[1],
+                           S_028A90_EVENT_TYPE(~0));
+               print_named_value(f, "EVENT_INDEX", (ib[1] >> 8) & 0xf, 4);
+               print_named_value(f, "TCL1_VOL_ACTION_ENA", (ib[1] >> 12) & 0x1, 1);
+               print_named_value(f, "TC_VOL_ACTION_ENA", (ib[1] >> 13) & 0x1, 1);
+               print_named_value(f, "TC_WB_ACTION_ENA", (ib[1] >> 15) & 0x1, 1);
+               print_named_value(f, "TCL1_ACTION_ENA", (ib[1] >> 16) & 0x1, 1);
+               print_named_value(f, "TC_ACTION_ENA", (ib[1] >> 17) & 0x1, 1);
+               print_named_value(f, "TC_NC_ACTION_ENA", (ib[1] >> 19) & 0x1, 1);
+               print_named_value(f, "TC_WC_ACTION_ENA", (ib[1] >> 20) & 0x1, 1);
+               print_named_value(f, "TC_MD_ACTION_ENA", (ib[1] >> 21) & 0x1, 1);
+               print_named_value(f, "DST_SEL", (ib[2] >> 16) & 0x3, 2);
+               print_named_value(f, "INT_SEL", (ib[2] >> 24) & 0x7, 3);
+               print_named_value(f, "DATA_SEL", ib[2] >> 29, 3);
+               print_named_value(f, "ADDRESS_LO", ib[3], 32);
+               print_named_value(f, "ADDRESS_HI", ib[4], 32);
+               print_named_value(f, "DATA_LO", ib[5], 32);
+               print_named_value(f, "DATA_HI", ib[6], 32);
+               print_named_value(f, "CTXID", ib[7], 32);
+               break;
+       case PKT3_WAIT_REG_MEM:
+               print_named_value(f, "OP", ib[1], 32);
+               print_named_value(f, "ADDRESS_LO", ib[2], 32);
+               print_named_value(f, "ADDRESS_HI", ib[3], 32);
+               print_named_value(f, "REF", ib[4], 32);
+               print_named_value(f, "MASK", ib[5], 32);
+               print_named_value(f, "POLL_INTERVAL", ib[6], 16);
+               break;
        case PKT3_DRAW_INDEX_AUTO:
                ac_dump_reg(f, R_030930_VGT_NUM_INDICES, ib[1], ~0);
                ac_dump_reg(f, R_0287F0_VGT_DRAW_INITIATOR, ib[2], ~0);

diff --git a/src/amd/common/sid.h b/src/amd/common/sid.h
index d329ad9493fe9095c43d4285090466976bf3f74e..c69f4f6dbf1f7d180a01c580719f95fae94b2e79 100644 (file)
--- a/src/amd/common/sid.h
+++ b/src/amd/common/sid.h
@@ -280,6 +280,7 @@
 #define     S_500_DSL_SEL(x)           (((unsigned)(x) & 0x3) << 20)
 #define       V_500_DST_ADDR           0
 #define       V_500_GDS                        1 /* program DAS to 1 as well */
+#define       V_500_NOWHERE            2 /* new for GFX9 */
 #define       V_500_DST_ADDR_TC_L2     3 /* new for CIK */
 #define     S_500_ENGINE(x)            ((x) & 0x1)
 #define       V_500_ME                 0