i965/bxt: Add 2x6 variant
authorBen Widawsky <ben@bwidawsk.net>
Thu, 26 May 2016 15:08:29 +0000 (08:08 -0700)
committerBen Widawsky <ben@bwidawsk.net>
Thu, 26 May 2016 21:06:43 +0000 (14:06 -0700)
Cc: mesa-stable@lists.freedesktop.org
Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
Reviewed-by: Kristian Høgsberg <krh@bitplanet.net>
include/pci_ids/i965_pci_ids.h
src/mesa/drivers/dri/i965/brw_device_info.c

index bd645fae640392097292aeae8cbd65f60a1d93c8..fce00dae4a580174273b2539b784c78c5e4b15e7 100644 (file)
@@ -162,4 +162,6 @@ CHIPSET(0x22B2, chv,     "Intel(R) HD Graphics (Cherryview)")
 CHIPSET(0x22B3, chv,     "Intel(R) HD Graphics (Cherryview)")
 CHIPSET(0x0A84, bxt,     "Intel(R) HD Graphics (Broxton)")
 CHIPSET(0x1A84, bxt,     "Intel(R) HD Graphics (Broxton)")
+CHIPSET(0x1A85, bxt_2x6, "Intel(R) HD Graphics (Broxton 2x6)")
 CHIPSET(0x5A84, bxt,     "Intel(R) HD Graphics (Broxton)")
+CHIPSET(0x5A85, bxt_2x6, "Intel(R) HD Graphics (Broxton 2x6)")
index 3666190fc363aecf3d7b1a4092afdf32ac573001..77bbe7855801a666f2d72eff7348aec0b96c0639 100644 (file)
@@ -401,6 +401,28 @@ static const struct brw_device_info brw_device_info_bxt = {
    }
 };
 
+static const struct brw_device_info brw_device_info_bxt_2x6 = {
+   GEN9_FEATURES,
+   .is_broxton = 1,
+   .gt = 1,
+   .has_llc = false,
+
+   .num_slices = 1,
+   .max_vs_threads = 56, /* XXX: guess */
+   .max_hs_threads = 56, /* XXX: guess */
+   .max_ds_threads = 56,
+   .max_gs_threads = 56,
+   .max_wm_threads = 64 * 2,
+   .max_cs_threads = 6 * 6,
+   .urb = {
+      .size = 128,
+      .min_vs_entries = 34,
+      .max_vs_entries = 352,
+      .max_hs_entries = 128,
+      .max_ds_entries = 208,
+      .max_gs_entries = 128,
+   }
+};
 /*
  * Note: for all KBL SKUs, the PRM says SKL for GS entries, not SKL+.
  * There's no KBL entry. Using the default SKL (GEN9) GS entries value.