radeonsi: flatten the switch for DPBB tunables

Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Tested-by: Dieter Nützel <Dieter@nuetzel-hh.de>

diff --git a/src/gallium/drivers/radeonsi/si_state_binning.c b/src/gallium/drivers/radeonsi/si_state_binning.c
index 6285ccc28c2c42af9f4c5819d0298d09579b5936..a6b1830b661b160679f26dbf7d2a92001e2dd9a9 100644 (file)
--- a/src/gallium/drivers/radeonsi/si_state_binning.c
+++ b/src/gallium/drivers/radeonsi/si_state_binning.c
@@ -402,20 +402,10 @@ void si_emit_dpbb_state(struct si_context *sctx)
        unsigned persistent_states_per_bin; /* allowed range: [0, 31] */
        unsigned fpovs_per_batch; /* allowed range: [0, 255], 0 = unlimited */
 
-       switch (sctx->family) {
-       case CHIP_VEGA10:
-       case CHIP_VEGA12:
-       case CHIP_VEGA20:
-       case CHIP_RAVEN:
-       case CHIP_RAVEN2:
-               /* Tuned for Raven. Vega might need different values. */
-               context_states_per_bin = 5;
-               persistent_states_per_bin = 31;
-               fpovs_per_batch = 63;
-               break;
-       default:
-               assert(0);
-       }
+       /* Tuned for Raven. Vega might need different values. */
+       context_states_per_bin = 5;
+       persistent_states_per_bin = 31;
+       fpovs_per_batch = 63;
 
        /* Emit registers. */
        struct uvec2 bin_size_extend = {};