intel/ir: Lower fpow on Gen12.
authorJordan Justen <jordan.l.justen@intel.com>
Wed, 13 Dec 2017 03:01:44 +0000 (19:01 -0800)
committerFrancisco Jerez <currojerez@riseup.net>
Fri, 11 Oct 2019 19:24:16 +0000 (12:24 -0700)
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Francisco Jerez <currojerez@riseup.net>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
src/intel/compiler/brw_compiler.c

index 20660d6fb280e83e22d8d4b440cb6553a17b3f98..6404339f06fa6ab46934f588315832dc0de5eda5 100644 (file)
@@ -186,6 +186,7 @@ brw_compiler_create(void *mem_ctx, const struct gen_device_info *devinfo)
        */
       nir_options->lower_ffma = devinfo->gen < 6;
       nir_options->lower_flrp32 = devinfo->gen < 6 || devinfo->gen >= 11;
+      nir_options->lower_fpow = devinfo->gen >= 12;
 
       nir_options->lower_rotate = devinfo->gen < 11;
       nir_options->lower_bitfield_reverse = devinfo->gen < 7;