{"draw-calls", R600_QUERY_DRAW_CALLS, 0},
{"requested-VRAM", R600_QUERY_REQUESTED_VRAM, rscreen->info.vram_size, TRUE},
{"requested-GTT", R600_QUERY_REQUESTED_GTT, rscreen->info.gart_size, TRUE},
- {"buffer-wait-time", R600_QUERY_BUFFER_WAIT_TIME, 0, FALSE}
+ {"buffer-wait-time", R600_QUERY_BUFFER_WAIT_TIME, 0, FALSE},
+ {"num-cs-flushes", R600_QUERY_NUM_CS_FLUSHES, 0, FALSE},
+ {"num-bytes-moved", R600_QUERY_NUM_BYTES_MOVED, 0, TRUE},
+ {"VRAM-usage", R600_QUERY_VRAM_USAGE, rscreen->info.vram_size, TRUE},
+ {"GTT-usage", R600_QUERY_GTT_USAGE, rscreen->info.gart_size, TRUE},
};
if (!info)
#define R600_QUERY_REQUESTED_VRAM (PIPE_QUERY_DRIVER_SPECIFIC + 1)
#define R600_QUERY_REQUESTED_GTT (PIPE_QUERY_DRIVER_SPECIFIC + 2)
#define R600_QUERY_BUFFER_WAIT_TIME (PIPE_QUERY_DRIVER_SPECIFIC + 3)
+#define R600_QUERY_NUM_CS_FLUSHES (PIPE_QUERY_DRIVER_SPECIFIC + 4)
+#define R600_QUERY_NUM_BYTES_MOVED (PIPE_QUERY_DRIVER_SPECIFIC + 5)
+#define R600_QUERY_VRAM_USAGE (PIPE_QUERY_DRIVER_SPECIFIC + 6)
+#define R600_QUERY_GTT_USAGE (PIPE_QUERY_DRIVER_SPECIFIC + 7)
/* read caches */
#define R600_CONTEXT_INV_VERTEX_CACHE (1 << 0)
case R600_QUERY_REQUESTED_VRAM:
case R600_QUERY_REQUESTED_GTT:
case R600_QUERY_BUFFER_WAIT_TIME:
+ case R600_QUERY_NUM_CS_FLUSHES:
+ case R600_QUERY_NUM_BYTES_MOVED:
+ case R600_QUERY_VRAM_USAGE:
+ case R600_QUERY_GTT_USAGE:
return NULL;
}
case R600_QUERY_REQUESTED_VRAM:
case R600_QUERY_REQUESTED_GTT:
case R600_QUERY_BUFFER_WAIT_TIME:
+ case R600_QUERY_NUM_CS_FLUSHES:
+ case R600_QUERY_NUM_BYTES_MOVED:
+ case R600_QUERY_VRAM_USAGE:
+ case R600_QUERY_GTT_USAGE:
skip_allocation = true;
break;
default:
return;
case R600_QUERY_REQUESTED_VRAM:
case R600_QUERY_REQUESTED_GTT:
+ case R600_QUERY_VRAM_USAGE:
+ case R600_QUERY_GTT_USAGE:
rquery->begin_result = 0;
return;
case R600_QUERY_BUFFER_WAIT_TIME:
rquery->begin_result = rctx->ws->query_value(rctx->ws, RADEON_BUFFER_WAIT_TIME_NS);
return;
+ case R600_QUERY_NUM_CS_FLUSHES:
+ rquery->begin_result = rctx->ws->query_value(rctx->ws, RADEON_NUM_CS_FLUSHES);
+ return;
+ case R600_QUERY_NUM_BYTES_MOVED:
+ rquery->begin_result = rctx->ws->query_value(rctx->ws, RADEON_NUM_BYTES_MOVED);
+ return;
}
/* Discard the old query buffers. */
case R600_QUERY_BUFFER_WAIT_TIME:
rquery->end_result = rctx->ws->query_value(rctx->ws, RADEON_BUFFER_WAIT_TIME_NS);
return;
+ case R600_QUERY_NUM_CS_FLUSHES:
+ rquery->end_result = rctx->ws->query_value(rctx->ws, RADEON_NUM_CS_FLUSHES);
+ return;
+ case R600_QUERY_NUM_BYTES_MOVED:
+ rquery->end_result = rctx->ws->query_value(rctx->ws, RADEON_NUM_BYTES_MOVED);
+ return;
+ case R600_QUERY_VRAM_USAGE:
+ rquery->end_result = rctx->ws->query_value(rctx->ws, RADEON_VRAM_USAGE);
+ return;
+ case R600_QUERY_GTT_USAGE:
+ rquery->end_result = rctx->ws->query_value(rctx->ws, RADEON_GTT_USAGE);
+ return;
}
r600_emit_query_end(rctx, rquery);
case R600_QUERY_REQUESTED_VRAM:
case R600_QUERY_REQUESTED_GTT:
case R600_QUERY_BUFFER_WAIT_TIME:
+ case R600_QUERY_NUM_CS_FLUSHES:
+ case R600_QUERY_NUM_BYTES_MOVED:
+ case R600_QUERY_VRAM_USAGE:
+ case R600_QUERY_GTT_USAGE:
result->u64 = query->end_result - query->begin_result;
return TRUE;
}
/* Prepare a new CS. */
cs->base.buf = cs->csc->buf;
cs->base.cdw = 0;
+
+ cs->ws->num_cs_flushes++;
}
static void radeon_drm_cs_destroy(struct radeon_winsys_cs *rcs)
#define RADEON_INFO_VCE_FW_VERSION 0x1b
#endif
+#ifndef RADEON_INFO_NUM_BYTES_MOVED
+#define RADEON_INFO_NUM_BYTES_MOVED 0x1d
+#define RADEON_INFO_VRAM_USAGE 0x1e
+#define RADEON_INFO_GTT_USAGE 0x1f
+#endif
+
#ifndef RADEON_CS_RING_UVD
#define RADEON_CS_RING_UVD 3
#endif
enum radeon_value_id value)
{
struct radeon_drm_winsys *ws = (struct radeon_drm_winsys*)rws;
- uint64_t ts = 0;
+ uint64_t retval = 0;
switch (value) {
case RADEON_REQUESTED_VRAM_MEMORY:
}
radeon_get_drm_value(ws->fd, RADEON_INFO_TIMESTAMP, "timestamp",
- (uint32_t*)&ts);
- return ts;
+ (uint32_t*)&retval);
+ return retval;
+ case RADEON_NUM_CS_FLUSHES:
+ return ws->num_cs_flushes;
+ case RADEON_NUM_BYTES_MOVED:
+ radeon_get_drm_value(ws->fd, RADEON_INFO_NUM_BYTES_MOVED,
+ "num-bytes-moved", (uint32_t*)&retval);
+ return retval;
+ case RADEON_VRAM_USAGE:
+ radeon_get_drm_value(ws->fd, RADEON_INFO_VRAM_USAGE,
+ "vram-usage", (uint32_t*)&retval);
+ return retval;
+ case RADEON_GTT_USAGE:
+ radeon_get_drm_value(ws->fd, RADEON_INFO_GTT_USAGE,
+ "gtt-usage", (uint32_t*)&retval);
+ return retval;
}
return 0;
}
uint64_t allocated_vram;
uint64_t allocated_gtt;
uint64_t buffer_wait_time; /* time spent in buffer_wait in ns */
+ uint64_t num_cs_flushes;
enum radeon_generation gen;
struct radeon_info info;
RADEON_REQUESTED_VRAM_MEMORY,
RADEON_REQUESTED_GTT_MEMORY,
RADEON_BUFFER_WAIT_TIME_NS,
- RADEON_TIMESTAMP
+ RADEON_TIMESTAMP,
+ RADEON_NUM_CS_FLUSHES,
+ RADEON_NUM_BYTES_MOVED,
+ RADEON_VRAM_USAGE,
+ RADEON_GTT_USAGE
};
enum radeon_bo_priority {