radeonsi: Add barrier before writing the tess factors.

The factors may be stored to LDs by another invocation than
the invocation for vertex 0.

Signed-off-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>

diff --git a/src/gallium/drivers/radeonsi/si_shader.c b/src/gallium/drivers/radeonsi/si_shader.c
index 166b2e8a4159cf749a7e685453a950f165c9df4f..5e5bf68df5f2241f78f2c4f6afd362230cd6f2eb 100644 (file)
--- a/src/gallium/drivers/radeonsi/si_shader.c
+++ b/src/gallium/drivers/radeonsi/si_shader.c
@@ -144,6 +144,10 @@ static void si_init_shader_ctx(struct si_shader_context *ctx,
                               struct si_shader *shader,
                               LLVMTargetMachineRef tm);
 
+static void si_llvm_emit_barrier(const struct lp_build_tgsi_action *action,
+                                struct lp_build_tgsi_context *bld_base,
+                                struct lp_build_emit_data *emit_data);
+
 /* Ideally pass the sample mask input to the PS epilog as v13, which
  * is its usual location, so that the shader doesn't have to add v_mov.
  */
@@ -2534,6 +2538,8 @@ static void si_write_tess_factors(struct lp_build_tgsi_context *bld_base,
        unsigned stride, outer_comps, inner_comps, i;
        struct lp_build_if_state if_ctx, inner_if_ctx;
 
+       si_llvm_emit_barrier(NULL, bld_base, NULL);
+
        /* Do this only for invocation 0, because the tess levels are per-patch,
         * not per-vertex.
         *