radeonsi: save raster config in screen, add se_tile_repeat

diff --git a/src/amd/common/ac_gpu_info.c b/src/amd/common/ac_gpu_info.c
index 766ad835476d64066a443fa0dc98abe10972ad8f..d6df2f6443ed29a74c5abbe23be1895b4de5e37f 100644 (file)
--- a/src/amd/common/ac_gpu_info.c
+++ b/src/amd/common/ac_gpu_info.c
@@ -643,9 +643,10 @@ ac_get_gs_table_depth(enum chip_class chip_class, enum radeon_family family)
 void
 ac_get_raster_config(struct radeon_info *info,
                     uint32_t *raster_config_p,
-                    uint32_t *raster_config_1_p)
+                    uint32_t *raster_config_1_p,
+                    uint32_t *se_tile_repeat_p)
 {
-       unsigned raster_config, raster_config_1;
+       unsigned raster_config, raster_config_1, se_tile_repeat;
 
        switch (info->family) {
        /* 1 SE / 1 RB */
@@ -722,8 +723,16 @@ ac_get_raster_config(struct radeon_info *info,
                raster_config_1 = 0x0000002a;
        }
 
+       unsigned se_width = 8 << G_028350_SE_XSEL_GFX6(raster_config);
+       unsigned se_height = 8 << G_028350_SE_YSEL_GFX6(raster_config);
+
+       /* I don't know how to calculate this, though this is probably a good guess. */
+       se_tile_repeat = MAX2(se_width, se_height) * info->max_se;
+
        *raster_config_p = raster_config;
        *raster_config_1_p = raster_config_1;
+       if (se_tile_repeat_p)
+               *se_tile_repeat_p = se_tile_repeat;
 }
 
 void

diff --git a/src/amd/common/ac_gpu_info.h b/src/amd/common/ac_gpu_info.h
index 0583a6037f2d6d58ac2339ac48463d2873a0869b..a7dc1094c0516201452597009c6a5634444369e0 100644 (file)
--- a/src/amd/common/ac_gpu_info.h
+++ b/src/amd/common/ac_gpu_info.h
@@ -150,7 +150,8 @@ void ac_print_gpu_info(struct radeon_info *info);
 int ac_get_gs_table_depth(enum chip_class chip_class, enum radeon_family family);
 void ac_get_raster_config(struct radeon_info *info,
                          uint32_t *raster_config_p,
-                         uint32_t *raster_config_1_p);
+                         uint32_t *raster_config_1_p,
+                         uint32_t *se_tile_repeat_p);
 void ac_get_harvested_configs(struct radeon_info *info,
                              unsigned raster_config,
                              unsigned *cik_raster_config_1_p,

diff --git a/src/amd/vulkan/si_cmd_buffer.c b/src/amd/vulkan/si_cmd_buffer.c
index e0d474756a32059aa8364eea0ee1e44af150520e..de057657ee70d354e91087bf774ea05767588f02 100644 (file)
--- a/src/amd/vulkan/si_cmd_buffer.c
+++ b/src/amd/vulkan/si_cmd_buffer.c
@@ -134,7 +134,7 @@ si_set_raster_config(struct radv_physical_device *physical_device,
 
        ac_get_raster_config(&physical_device->rad_info,
                             &raster_config,
-                            &raster_config_1);
+                            &raster_config_1, NULL);
 
        /* Always use the default config when all backends are enabled
         * (or when we failed to determine the enabled backends).

diff --git a/src/gallium/drivers/radeonsi/si_pipe.c b/src/gallium/drivers/radeonsi/si_pipe.c
index ea321bf62d3b62f9bee9f895408f052bda6b05ee..14b075c7b76cd3b38a87189db9a3b4b13d75924d 100644 (file)
--- a/src/gallium/drivers/radeonsi/si_pipe.c
+++ b/src/gallium/drivers/radeonsi/si_pipe.c
@@ -819,6 +819,15 @@ struct pipe_screen *radeonsi_screen_create(struct radeon_winsys *ws,
        ws->query_info(ws, &sscreen->info);
        si_handle_env_var_force_family(sscreen);
 
+       if (sscreen->info.chip_class >= GFX9) {
+               sscreen->se_tile_repeat = 32 * sscreen->info.max_se;
+       } else {
+               ac_get_raster_config(&sscreen->info,
+                                    &sscreen->pa_sc_raster_config,
+                                    &sscreen->pa_sc_raster_config_1,
+                                    &sscreen->se_tile_repeat);
+       }
+
        sscreen->debug_flags = debug_get_flags_option("R600_DEBUG",
                                                        debug_options, 0);
 

diff --git a/src/gallium/drivers/radeonsi/si_pipe.h b/src/gallium/drivers/radeonsi/si_pipe.h
index dad3029bc3189c0daca112139e562bf3ac9b97ec..ff11eab022405ba358bff1ecb54d9867770358d0 100644 (file)
--- a/src/gallium/drivers/radeonsi/si_pipe.h
+++ b/src/gallium/drivers/radeonsi/si_pipe.h
@@ -405,6 +405,9 @@ struct si_screen {
        uint64_t                        debug_flags;
        char                            renderer_string[183];
 
+       unsigned                        pa_sc_raster_config;
+       unsigned                        pa_sc_raster_config_1;
+       unsigned                        se_tile_repeat;
        unsigned                        gs_table_depth;
        unsigned                        tess_offchip_block_dw_size;
        unsigned                        tess_offchip_ring_size;

diff --git a/src/gallium/drivers/radeonsi/si_state.c b/src/gallium/drivers/radeonsi/si_state.c
index bc1417aadfbb0b8fec37c510744870a0d6758d58..a170d525ecf253780df50a96d43d1332059c6087 100644 (file)
--- a/src/gallium/drivers/radeonsi/si_state.c
+++ b/src/gallium/drivers/radeonsi/si_state.c
@@ -4782,13 +4782,11 @@ si_write_harvested_raster_configs(struct si_context *sctx,
 
 static void si_set_raster_config(struct si_context *sctx, struct si_pm4_state *pm4)
 {
-       unsigned num_rb = MIN2(sctx->screen->info.num_render_backends, 16);
-       unsigned rb_mask = sctx->screen->info.enabled_rb_mask;
-       unsigned raster_config, raster_config_1;
-
-       ac_get_raster_config(&sctx->screen->info,
-                            &raster_config,
-                            &raster_config_1);
+       struct si_screen *sscreen = sctx->screen;
+       unsigned num_rb = MIN2(sscreen->info.num_render_backends, 16);
+       unsigned rb_mask = sscreen->info.enabled_rb_mask;
+       unsigned raster_config = sscreen->pa_sc_raster_config;
+       unsigned raster_config_1 = sscreen->pa_sc_raster_config_1;
 
        if (!rb_mask || util_bitcount(rb_mask) >= num_rb) {
                /* Always use the default config when all backends are enabled