From: Patrice Mandin Date: Sat, 21 Jun 2008 20:59:05 +0000 (+0200) Subject: Update for extra vertex attributes X-Git-Url: https://git.libre-soc.org/?p=mesa.git;a=commitdiff_plain;h=8c26a521ee80f5d8a1d0aabd0910233aad400322 Update for extra vertex attributes --- diff --git a/src/gallium/drivers/nouveau/nouveau_class.h b/src/gallium/drivers/nouveau/nouveau_class.h index 58c80ddcd24..3c29fa0d1be 100644 --- a/src/gallium/drivers/nouveau/nouveau_class.h +++ b/src/gallium/drivers/nouveau/nouveau_class.h @@ -3763,7 +3763,7 @@ WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. #define NV34TCL_RT_ENABLE_COLOR2 (1 << 2) #define NV34TCL_RT_ENABLE_COLOR1 (1 << 1) #define NV34TCL_RT_ENABLE_COLOR0 (1 << 0) -#define NV34TCL_ZETA_PITCH 0x0000022c +#define NV34TCL_LMA_DEPTH_PITCH 0x0000022c #define NV34TCL_LMA_DEPTH_OFFSET 0x00000230 #define NV34TCL_TX_UNITS_ENABLE 0x0000023c #define NV34TCL_TX_UNITS_ENABLE_TX0 (1 << 0) @@ -4145,14 +4145,16 @@ WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. #define NV34TCL_DEPTH_TEST_ENABLE 0x00000a74 #define NV34TCL_POLYGON_OFFSET_FACTOR 0x00000a78 #define NV34TCL_POLYGON_OFFSET_UNITS 0x00000a7c -#define NV34TCL_VERTEX_NOR_3I_XY 0x00000a90 -#define NV34TCL_VERTEX_NOR_3I_XY_X_SHIFT 0 -#define NV34TCL_VERTEX_NOR_3I_XY_X_MASK 0x0000ffff -#define NV34TCL_VERTEX_NOR_3I_XY_Y_SHIFT 16 -#define NV34TCL_VERTEX_NOR_3I_XY_Y_MASK 0xffff0000 -#define NV34TCL_VERTEX_NOR_3I_Z 0x00000a94 -#define NV34TCL_VERTEX_NOR_3I_Z_Z_SHIFT 0 -#define NV34TCL_VERTEX_NOR_3I_Z_Z_MASK 0x0000ffff +#define NV34TCL_VTX_ATTR_3I_XY(x) (0x00000a80+((x)*8)) +#define NV34TCL_VTX_ATTR_3I_XY__SIZE 0x00000010 +#define NV34TCL_VTX_ATTR_3I_XY_X_SHIFT 0 +#define NV34TCL_VTX_ATTR_3I_XY_X_MASK 0x0000ffff +#define NV34TCL_VTX_ATTR_3I_XY_Y_SHIFT 16 +#define NV34TCL_VTX_ATTR_3I_XY_Y_MASK 0xffff0000 +#define NV34TCL_VTX_ATTR_3I_Z(x) (0x00000a84+((x)*8)) +#define NV34TCL_VTX_ATTR_3I_Z__SIZE 0x00000010 +#define NV34TCL_VTX_ATTR_3I_Z_Z_SHIFT 0 +#define NV34TCL_VTX_ATTR_3I_Z_Z_MASK 0x0000ffff #define NV34TCL_VP_UPLOAD_INST(x) (0x00000b80+((x)*4)) #define NV34TCL_VP_UPLOAD_INST__SIZE 0x00000004 #define NV34TCL_CLIP_PLANE_A(x) (0x00000e00+((x)*16)) @@ -4336,48 +4338,38 @@ WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. #define NV34TCL_FRONT_FACE_CCW 0x00000901 #define NV34TCL_POLYGON_SMOOTH_ENABLE 0x00001838 #define NV34TCL_CULL_FACE_ENABLE 0x0000183c -#define NV34TCL_VERTEX_ATTR_2F_X(x) (0x00001880+((x)*8)) -#define NV34TCL_VERTEX_ATTR_2F_X__SIZE 0x00000010 -#define NV34TCL_VERTEX_ATTR_2F_Y(x) (0x00001884+((x)*8)) -#define NV34TCL_VERTEX_ATTR_2F_Y__SIZE 0x00000010 -#define NV34TCL_VERTEX_ATTR_2I(x) (0x00001900+((x)*4)) -#define NV34TCL_VERTEX_ATTR_2I__SIZE 0x00000010 -#define NV34TCL_VERTEX_ATTR_2I_Y_SHIFT 16 -#define NV34TCL_VERTEX_ATTR_2I_Y_MASK 0xffff0000 -#define NV34TCL_VERTEX_ATTR_2I_X_SHIFT 0 -#define NV34TCL_VERTEX_ATTR_2I_X_MASK 0x0000ffff -#define NV34TCL_VERTEX_COL_4I(x) (0x0000194c+((x)*4)) -#define NV34TCL_VERTEX_COL_4I__SIZE 0x00000002 -#define NV34TCL_VERTEX_COL_4I_R_SHIFT 0 -#define NV34TCL_VERTEX_COL_4I_R_MASK 0x000000ff -#define NV34TCL_VERTEX_COL_4I_G_SHIFT 8 -#define NV34TCL_VERTEX_COL_4I_G_MASK 0x0000ff00 -#define NV34TCL_VERTEX_COL_4I_B_SHIFT 16 -#define NV34TCL_VERTEX_COL_4I_B_MASK 0x00ff0000 -#define NV34TCL_VERTEX_COL_4I_A_SHIFT 24 -#define NV34TCL_VERTEX_COL_4I_A_MASK 0xff000000 -#define NV34TCL_VERTEX_POS_4I_XY 0x00001980 -#define NV34TCL_VERTEX_POS_4I_XY_X_SHIFT 0 -#define NV34TCL_VERTEX_POS_4I_XY_X_MASK 0x0000ffff -#define NV34TCL_VERTEX_POS_4I_XY_Y_SHIFT 16 -#define NV34TCL_VERTEX_POS_4I_XY_Y_MASK 0xffff0000 -#define NV34TCL_VERTEX_POS_4I_ZW 0x00001984 -#define NV34TCL_VERTEX_POS_4I_ZW_Z_SHIFT 0 -#define NV34TCL_VERTEX_POS_4I_ZW_Z_MASK 0x0000ffff -#define NV34TCL_VERTEX_POS_4I_ZW_W_SHIFT 16 -#define NV34TCL_VERTEX_POS_4I_ZW_W_MASK 0xffff0000 -#define NV34TCL_VERTEX_TX_4I_ST(x) (0x000019c0+((x)*8)) -#define NV34TCL_VERTEX_TX_4I_ST__SIZE 0x00000004 -#define NV34TCL_VERTEX_TX_4I_ST_S_SHIFT 0 -#define NV34TCL_VERTEX_TX_4I_ST_S_MASK 0x0000ffff -#define NV34TCL_VERTEX_TX_4I_ST_T_SHIFT 16 -#define NV34TCL_VERTEX_TX_4I_ST_T_MASK 0xffff0000 -#define NV34TCL_VERTEX_TX_4I_RQ(x) (0x000019c4+((x)*8)) -#define NV34TCL_VERTEX_TX_4I_RQ__SIZE 0x00000004 -#define NV34TCL_VERTEX_TX_4I_RQ_R_SHIFT 0 -#define NV34TCL_VERTEX_TX_4I_RQ_R_MASK 0x0000ffff -#define NV34TCL_VERTEX_TX_4I_RQ_Q_SHIFT 16 -#define NV34TCL_VERTEX_TX_4I_RQ_Q_MASK 0xffff0000 +#define NV34TCL_VTX_ATTR_2F_X(x) (0x00001880+((x)*8)) +#define NV34TCL_VTX_ATTR_2F_X__SIZE 0x00000010 +#define NV34TCL_VTX_ATTR_2F_Y(x) (0x00001884+((x)*8)) +#define NV34TCL_VTX_ATTR_2F_Y__SIZE 0x00000010 +#define NV34TCL_VTX_ATTR_2I(x) (0x00001900+((x)*4)) +#define NV34TCL_VTX_ATTR_2I__SIZE 0x00000010 +#define NV34TCL_VTX_ATTR_2I_X_SHIFT 0 +#define NV34TCL_VTX_ATTR_2I_X_MASK 0x0000ffff +#define NV34TCL_VTX_ATTR_2I_Y_SHIFT 16 +#define NV34TCL_VTX_ATTR_2I_Y_MASK 0xffff0000 +#define NV34TCL_VTX_ATTR_4UB(x) (0x00001940+((x)*4)) +#define NV34TCL_VTX_ATTR_4UB__SIZE 0x00000010 +#define NV34TCL_VTX_ATTR_4UB_X_SHIFT 0 +#define NV34TCL_VTX_ATTR_4UB_X_MASK 0x000000ff +#define NV34TCL_VTX_ATTR_4UB_Y_SHIFT 8 +#define NV34TCL_VTX_ATTR_4UB_Y_MASK 0x0000ff00 +#define NV34TCL_VTX_ATTR_4UB_Z_SHIFT 16 +#define NV34TCL_VTX_ATTR_4UB_Z_MASK 0x00ff0000 +#define NV34TCL_VTX_ATTR_4UB_W_SHIFT 24 +#define NV34TCL_VTX_ATTR_4UB_W_MASK 0xff000000 +#define NV34TCL_VTX_ATTR_4I_XY(x) (0x00001980+((x)*8)) +#define NV34TCL_VTX_ATTR_4I_XY__SIZE 0x00000010 +#define NV34TCL_VTX_ATTR_4I_XY_X_SHIFT 0 +#define NV34TCL_VTX_ATTR_4I_XY_X_MASK 0x0000ffff +#define NV34TCL_VTX_ATTR_4I_XY_Y_SHIFT 16 +#define NV34TCL_VTX_ATTR_4I_XY_Y_MASK 0xffff0000 +#define NV34TCL_VTX_ATTR_4I_ZW(x) (0x00001984+((x)*8)) +#define NV34TCL_VTX_ATTR_4I_ZW__SIZE 0x00000010 +#define NV34TCL_VTX_ATTR_4I_ZW_Z_SHIFT 0 +#define NV34TCL_VTX_ATTR_4I_ZW_Z_MASK 0x0000ffff +#define NV34TCL_VTX_ATTR_4I_ZW_W_SHIFT 16 +#define NV34TCL_VTX_ATTR_4I_ZW_W_MASK 0xffff0000 #define NV34TCL_TX_OFFSET(x) (0x00001a00+((x)*32)) #define NV34TCL_TX_OFFSET__SIZE 0x00000004 #define NV34TCL_TX_FORMAT(x) (0x00001a04+((x)*32)) @@ -4534,14 +4526,14 @@ WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. #define NV34TCL_TX_BORDER_COLOR_R_MASK 0x00ff0000 #define NV34TCL_TX_BORDER_COLOR_A_SHIFT 24 #define NV34TCL_TX_BORDER_COLOR_A_MASK 0xff000000 -#define NV34TCL_VERTEX_ATTR_4F_X(x) (0x00001c00+((x)*16)) -#define NV34TCL_VERTEX_ATTR_4F_X__SIZE 0x00000010 -#define NV34TCL_VERTEX_ATTR_4F_Y(x) (0x00001c04+((x)*16)) -#define NV34TCL_VERTEX_ATTR_4F_Y__SIZE 0x00000010 -#define NV34TCL_VERTEX_ATTR_4F_Z(x) (0x00001c08+((x)*16)) -#define NV34TCL_VERTEX_ATTR_4F_Z__SIZE 0x00000010 -#define NV34TCL_VERTEX_ATTR_4F_W(x) (0x00001c0c+((x)*16)) -#define NV34TCL_VERTEX_ATTR_4F_W__SIZE 0x00000010 +#define NV34TCL_VTX_ATTR_4F_X(x) (0x00001c00+((x)*16)) +#define NV34TCL_VTX_ATTR_4F_X__SIZE 0x00000010 +#define NV34TCL_VTX_ATTR_4F_Y(x) (0x00001c04+((x)*16)) +#define NV34TCL_VTX_ATTR_4F_Y__SIZE 0x00000010 +#define NV34TCL_VTX_ATTR_4F_Z(x) (0x00001c08+((x)*16)) +#define NV34TCL_VTX_ATTR_4F_Z__SIZE 0x00000010 +#define NV34TCL_VTX_ATTR_4F_W(x) (0x00001c0c+((x)*16)) +#define NV34TCL_VTX_ATTR_4F_W__SIZE 0x00000010 #define NV34TCL_FP_CONTROL 0x00001d60 #define NV34TCL_FP_CONTROL_USES_KIL (1 << 7) #define NV34TCL_FP_CONTROL_USED_REGS_MINUS1_DIV2_SHIFT 0 @@ -4573,7 +4565,8 @@ WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. #define NV34TCL_LINE_STIPPLE_PATTERN_PATTERN_MASK 0xffff0000 #define NV34TCL_BACK_MATERIAL_SHININESS(x) (0x00001e20+((x)*4)) #define NV34TCL_BACK_MATERIAL_SHININESS__SIZE 0x00000006 -#define NV34TCL_VERTEX_FOG_1F 0x00001e54 +#define NV34TCL_VTX_ATTR_1F(x) (0x00001e40+((x)*4)) +#define NV34TCL_VTX_ATTR_1F__SIZE 0x00000010 #define NV34TCL_VP_UPLOAD_FROM_ID 0x00001e9c #define NV34TCL_VP_START_FROM_ID 0x00001ea0 #define NV34TCL_POINT_PARAMETERS(x) (0x00001ec0+((x)*4)) @@ -4986,6 +4979,16 @@ WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. #define NV40TCL_DEPTH_TEST_ENABLE 0x00000a74 #define NV40TCL_POLYGON_OFFSET_FACTOR 0x00000a78 #define NV40TCL_POLYGON_OFFSET_UNITS 0x00000a7c +#define NV40TCL_VTX_ATTR_3I_XY(x) (0x00000a80+((x)*8)) +#define NV40TCL_VTX_ATTR_3I_XY__SIZE 0x00000010 +#define NV40TCL_VTX_ATTR_3I_XY_X_SHIFT 0 +#define NV40TCL_VTX_ATTR_3I_XY_X_MASK 0x0000ffff +#define NV40TCL_VTX_ATTR_3I_XY_Y_SHIFT 16 +#define NV40TCL_VTX_ATTR_3I_XY_Y_MASK 0xffff0000 +#define NV40TCL_VTX_ATTR_3I_Z(x) (0x00000a84+((x)*8)) +#define NV40TCL_VTX_ATTR_3I_Z__SIZE 0x00000010 +#define NV40TCL_VTX_ATTR_3I_Z_Z_SHIFT 0 +#define NV40TCL_VTX_ATTR_3I_Z_Z_MASK 0x0000ffff #define NV40TCL_UNK0B40(x) (0x00000b40+((x)*4)) #define NV40TCL_UNK0B40__SIZE 0x00000008 #define NV40TCL_VP_UPLOAD_INST(x) (0x00000b80+((x)*4)) @@ -5095,22 +5098,32 @@ WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. #define NV40TCL_VTX_ATTR_2F_Y__SIZE 0x00000010 #define NV40TCL_VTX_ATTR_2I(x) (0x00001900+((x)*4)) #define NV40TCL_VTX_ATTR_2I__SIZE 0x00000010 -#define NV40TCL_VTX_ATTR_2I_Y_SHIFT 16 -#define NV40TCL_VTX_ATTR_2I_Y_MASK 0xffff0000 #define NV40TCL_VTX_ATTR_2I_X_SHIFT 0 #define NV40TCL_VTX_ATTR_2I_X_MASK 0x0000ffff -#define NV40TCL_VTX_ATTR_4I_0(x) (0x00001900+((x)*8)) -#define NV40TCL_VTX_ATTR_4I_0__SIZE 0x00000010 -#define NV40TCL_VTX_ATTR_4I_0_Y_SHIFT 16 -#define NV40TCL_VTX_ATTR_4I_0_Y_MASK 0xffff0000 -#define NV40TCL_VTX_ATTR_4I_0_X_SHIFT 0 -#define NV40TCL_VTX_ATTR_4I_0_X_MASK 0x0000ffff -#define NV40TCL_VTX_ATTR_4I_1(x) (0x00001904+((x)*8)) -#define NV40TCL_VTX_ATTR_4I_1__SIZE 0x00000010 -#define NV40TCL_VTX_ATTR_4I_1_W_SHIFT 16 -#define NV40TCL_VTX_ATTR_4I_1_W_MASK 0xffff0000 -#define NV40TCL_VTX_ATTR_4I_1_Z_SHIFT 0 -#define NV40TCL_VTX_ATTR_4I_1_Z_MASK 0x0000ffff +#define NV40TCL_VTX_ATTR_2I_Y_SHIFT 16 +#define NV40TCL_VTX_ATTR_2I_Y_MASK 0xffff0000 +#define NV40TCL_VTX_ATTR_4UB(x) (0x00001940+((x)*4)) +#define NV40TCL_VTX_ATTR_4UB__SIZE 0x00000010 +#define NV40TCL_VTX_ATTR_4UB_X_SHIFT 0 +#define NV40TCL_VTX_ATTR_4UB_X_MASK 0x000000ff +#define NV40TCL_VTX_ATTR_4UB_Y_SHIFT 8 +#define NV40TCL_VTX_ATTR_4UB_Y_MASK 0x0000ff00 +#define NV40TCL_VTX_ATTR_4UB_Z_SHIFT 16 +#define NV40TCL_VTX_ATTR_4UB_Z_MASK 0x00ff0000 +#define NV40TCL_VTX_ATTR_4UB_W_SHIFT 24 +#define NV40TCL_VTX_ATTR_4UB_W_MASK 0xff000000 +#define NV40TCL_VTX_ATTR_4I_XY(x) (0x00001980+((x)*8)) +#define NV40TCL_VTX_ATTR_4I_XY__SIZE 0x00000010 +#define NV40TCL_VTX_ATTR_4I_XY_X_SHIFT 0 +#define NV40TCL_VTX_ATTR_4I_XY_X_MASK 0x0000ffff +#define NV40TCL_VTX_ATTR_4I_XY_Y_SHIFT 16 +#define NV40TCL_VTX_ATTR_4I_XY_Y_MASK 0xffff0000 +#define NV40TCL_VTX_ATTR_4I_ZW(x) (0x00001984+((x)*8)) +#define NV40TCL_VTX_ATTR_4I_ZW__SIZE 0x00000010 +#define NV40TCL_VTX_ATTR_4I_ZW_Z_SHIFT 0 +#define NV40TCL_VTX_ATTR_4I_ZW_Z_MASK 0x0000ffff +#define NV40TCL_VTX_ATTR_4I_ZW_W_SHIFT 16 +#define NV40TCL_VTX_ATTR_4I_ZW_W_MASK 0xffff0000 #define NV40TCL_TEX_OFFSET(x) (0x00001a00+((x)*32)) #define NV40TCL_TEX_OFFSET__SIZE 0x00000010 #define NV40TCL_TEX_FORMAT(x) (0x00001a04+((x)*32)) @@ -5307,6 +5320,8 @@ WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. #define NV40TCL_LINE_STIPPLE_PATTERN_FACTOR_MASK 0x0000ffff #define NV40TCL_LINE_STIPPLE_PATTERN_PATTERN_SHIFT 16 #define NV40TCL_LINE_STIPPLE_PATTERN_PATTERN_MASK 0xffff0000 +#define NV40TCL_VTX_ATTR_1F(x) (0x00001e40+((x)*4)) +#define NV40TCL_VTX_ATTR_1F__SIZE 0x00000010 #define NV40TCL_VP_UPLOAD_FROM_ID 0x00001e9c #define NV40TCL_VP_START_FROM_ID 0x00001ea0 #define NV40TCL_POINT_SIZE 0x00001ee0 diff --git a/src/gallium/drivers/nv30/nv30_vbo.c b/src/gallium/drivers/nv30/nv30_vbo.c index ff0ce6ac810..359e443bb1c 100644 --- a/src/gallium/drivers/nv30/nv30_vbo.c +++ b/src/gallium/drivers/nv30/nv30_vbo.c @@ -55,7 +55,7 @@ nv30_vbo_static_attrib(struct nv30_context *nv30, int attrib, { float *v = map; - BEGIN_RING(rankine, NV34TCL_VERTEX_ATTR_4F_X(attrib), 4); + BEGIN_RING(rankine, NV34TCL_VTX_ATTR_4F_X(attrib), 4); switch (ncomp) { case 4: OUT_RINGf(v[0]); diff --git a/src/gallium/drivers/nv40/nv40_draw.c b/src/gallium/drivers/nv40/nv40_draw.c index a9a939af0c0..1d78324dda8 100644 --- a/src/gallium/drivers/nv40/nv40_draw.c +++ b/src/gallium/drivers/nv40/nv40_draw.c @@ -39,7 +39,7 @@ nv40_render_vertex(struct nv40_context *nv40, const struct vertex_header *v) case EMIT_OMIT: break; case EMIT_1F: - BEGIN_RING(curie, 0x1e40 + (hw * 4), 1); + BEGIN_RING(curie, NV40TCL_VTX_ATTR_1F(hw), 1); OUT_RING (fui(v->data[idx][0])); break; case EMIT_2F: @@ -61,7 +61,7 @@ nv40_render_vertex(struct nv40_context *nv40, const struct vertex_header *v) OUT_RING (fui(v->data[idx][3])); break; case EMIT_4UB: - BEGIN_RING(curie, 0x1940 + (hw * 4), 1); + BEGIN_RING(curie, NV40TCL_VTX_ATTR_4UB(hw), 1); OUT_RING (pack_ub4(float_to_ubyte(v->data[idx][0]), float_to_ubyte(v->data[idx][1]), float_to_ubyte(v->data[idx][2]), diff --git a/src/gallium/drivers/nv40/nv40_vbo.c b/src/gallium/drivers/nv40/nv40_vbo.c index e5f9bd5668a..93669e6192f 100644 --- a/src/gallium/drivers/nv40/nv40_vbo.c +++ b/src/gallium/drivers/nv40/nv40_vbo.c @@ -149,7 +149,7 @@ nv40_vbo_static_attrib(struct nv40_context *nv40, struct nouveau_stateobj *so, so_data (so, fui(v[1])); break; case 1: - so_method(so, curie, 0x1e40 + (attrib * 4), 1); + so_method(so, curie, NV40TCL_VTX_ATTR_1F(attrib), 1); so_data (so, fui(v[0])); break; default: