From: Lucas Stach <l.stach@pengutronix.de>
Date: Mon, 5 Feb 2018 17:59:48 +0000 (+0100)
Subject: etnaviv: fix in-place resolve tile count
X-Git-Url: https://git.libre-soc.org/?p=mesa.git;a=commitdiff_plain;h=8df11f3fad52507266ca1e97149fd4175ad05471

etnaviv: fix in-place resolve tile count

TS tiles map to a fixed amount of bytes in the color/depth surface,
so the blocksize of the format needs to be taken into account when
calculating the number of tiles to fill.

The simplest fix is to just use the layer stride, which is the surface
size in bytes.

Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
---

diff --git a/src/gallium/drivers/etnaviv/etnaviv_rs.c b/src/gallium/drivers/etnaviv/etnaviv_rs.c
index 7d9e8e0e389..bd40cebb537 100644
--- a/src/gallium/drivers/etnaviv/etnaviv_rs.c
+++ b/src/gallium/drivers/etnaviv/etnaviv_rs.c
@@ -149,7 +149,7 @@ etna_compile_rs_state(struct etna_context *ctx, struct compiled_rs_state *cs,
          !rs->swap_rb && !rs->flip &&
          !rs->clear_mode && rs->source_padded_width) {
       /* Total number of tiles (same as for autodisable) */
-      cs->RS_KICKER_INPLACE = rs->source_padded_width * rs->source_padded_height / 16;
+      cs->RS_KICKER_INPLACE = rs->tile_count;
    }
    cs->source_ts_valid = rs->source_ts_valid;
 }
@@ -725,7 +725,8 @@ etna_try_rs_blit(struct pipe_context *pctx,
       .dither = {0xffffffff, 0xffffffff}, // XXX dither when going from 24 to 16 bit?
       .clear_mode = VIVS_RS_CLEAR_CONTROL_MODE_DISABLED,
       .width = width,
-      .height = height
+      .height = height,
+      .tile_count = src_lev->layer_stride / 64
    });
 
    etna_submit_rs_state(ctx, &copy_to_screen);
diff --git a/src/gallium/drivers/etnaviv/etnaviv_rs.h b/src/gallium/drivers/etnaviv/etnaviv_rs.h
index e71dfa0b8a0..125a13a9ad3 100644
--- a/src/gallium/drivers/etnaviv/etnaviv_rs.h
+++ b/src/gallium/drivers/etnaviv/etnaviv_rs.h
@@ -56,6 +56,7 @@ struct rs_state {
    uint32_t clear_bits;
    uint32_t clear_mode; /* VIVS_RS_CLEAR_CONTROL_MODE_XXX */
    uint32_t clear_value[4];
+   uint32_t tile_count;
    uint8_t aa;
    uint8_t endian_mode; /* ENDIAN_MODE_XXX */
 };