git.libre-soc.org Git - mesa.git/history - src/amd/vulkan/winsys/null/radv_null

2020-07-28	Marek Olšák	amd: rename SIENNA -> SIENNA_CICHLID	blob \| commitdiff \| raw
2020-06-19	Samuel Pitoiset	radv: add support for Sienna Cichlid	blob \| commitdiff \| raw \| diff to current
2020-06-08	Rhys Perry	ac/gpu_info, radv: set max_wave64_per_simd to 20 on...	blob \| commitdiff \| raw \| diff to current
2020-04-03	Rhys Perry	radv: fix null winsys gpu_info array	blob \| commitdiff \| raw \| diff to current
2020-03-23	Samuel Pitoiset	radv/winsys: spoof some values for num_render_backends...	blob \| commitdiff \| raw \| diff to current
2020-03-23	Samuel Pitoiset	radv/winsys: fix wrong PCI ID for Vega10 in the null...	blob \| commitdiff \| raw \| diff to current
2020-03-20	Rhys Perry	radv/winsys: set has_syncobj_wait_for_submit in the...	blob \| commitdiff \| raw \| diff to current
2020-03-06	Samuel Pitoiset	radv/winsys: fix missing initializations of shader...	blob \| commitdiff \| raw \| diff to current
2020-02-26	Samuel Pitoiset	radv: implement a dummy winsys for creating devices...	blob \| commitdiff \| raw \| diff to current