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v3d: we always have at least one output segment
[mesa.git] / src / broadcom / compiler / qpu_validate.c
2019-09-05 Jose Maria Casanov... v3d: writes to magic registers aren't RF writes after... blob | commitdiff | raw
2018-04-26 Eric Anholtbroadcom/vc5: Add validation that we don't violate... blob | commitdiff | raw | diff to current
2018-04-26 Eric Anholtbroadcom/vc5: Add validation that we don't violate... blob | commitdiff | raw | diff to current
2018-04-26 Eric Anholtbroadcom/vc5: Add QPU validation for register writes... blob | commitdiff | raw | diff to current
2018-01-13 Eric Anholtbroadcom/vc5: Use THRSW to enable multi-threaded shaders. blob | commitdiff | raw | diff to current
2018-01-13 Eric Anholtbroadcom/vc5: Add support for V3Dv4 signal bits. blob | commitdiff | raw | diff to current
2017-10-10 Eric Anholtbroadcom: Add VC5 NIR compiler. blob | commitdiff | raw | diff to current