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util/ra: spiff out select_reg_callback
[mesa.git]
/
src
/
broadcom
/
compiler
/
vir_register_allocate.c
2020-03-10
Rob Clark
util/ra: spiff out select_reg_callback
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2019-10-18
Iago Toral Quiroga
v3d: add new flag dirty TMU cache at v3d_compiler
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2019-04-26
Eric Anholt
v3d: Fix detection of TMU write sequences in register...
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2019-04-26
Eric Anholt
v3d: Fix detection of the last ldtmu before a new TMU op.
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2019-04-12
Eric Anholt
v3d: Use the new lower_to_scratch implementation for...
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2019-04-12
Eric Anholt
v3d: Replace the old shader-db env var output with...
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2019-04-12
Eric Anholt
v3d: Add and use a define for the number of channels...
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2019-03-05
Eric Anholt
v3d: Use ldunif instructions for uniforms.
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2019-03-05
Eric Anholt
v3d: Add support for register-allocating a ldunif to...
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2019-03-05
Eric Anholt
v3d: Drop the old class bits splitting up the accumulators.
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2019-03-05
Eric Anholt
v3d: Do uniform rematerialization spilling before dropp...
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2019-03-05
Eric Anholt
v3d: Fix temporary leaks of temp_registers and when...
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2019-02-26
Eric Anholt
v3d: Rematerialize MOVs of uniforms instead of spilling...
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2019-01-14
Eric Anholt
v3d: Add support for CS workgroup/invocation id intrinsics.
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2018-08-06
Eric Anholt
v3d: Avoid spilling that breaks the r5 usage after...
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2018-08-06
Eric Anholt
v3d: Wait for TMU writes to complete before continuing...
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2018-08-06
Eric Anholt
v3d: Add some debug code for forcing register spilling.
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2018-07-23
Eric Anholt
v3d: Switch to using the new SFU instructions on V3D...
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2018-07-23
Eric Anholt
v3d: Rotate through registers to improve post-RA schedu...
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2018-03-19
Eric Anholt
broadcom/vc5: Add support for register spilling.
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2018-01-13
Eric Anholt
broadcom/vc5: Use THRSW to enable multi-threaded shaders.
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2018-01-13
Eric Anholt
broadcom/vc5: Use a physical-reg-only register class...
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2018-01-13
Eric Anholt
broadcom/vc5: Use the new LDVPM/STVPM opcodes on V3D...
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2018-01-13
Eric Anholt
broadcom/vc5: Add support for V3Dv4 signal bits.
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2017-10-10
Eric Anholt
broadcom: Add VC5 NIR compiler.
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