intel/compiler: Allow MESA_SHADER_KERNEL
[mesa.git] / src / intel / compiler / brw_eu_emit.c
2020-07-31 Matt Turnerintel/compiler: Relax SENDS regioning assertions
2020-06-23 Jason Ekstrandintel/eu: Add the RNDU opcode
2020-06-23 Jason Ekstrandintel/eu: Set the right subnr for ALIGN16 destinations
2020-05-30 Jason Ekstrandintel/fs: Emit HALT for discard on Gen4-5
2020-04-29 Caio Marcelo de... intel/fs,vec4: Pull stall logic for memory fences up...
2020-04-21 Dylan Bakerreplace _mesa_logbase2 with util_logbase2
2020-04-20 Caio Marcelo de... intel/fs,vec4: Properly account SENDs in IVB memory...
2020-01-24 Jason Ekstrandintel/fs: Don't unnecessarily fall back to indirect...
2020-01-22 Matt Turnerintel/compiler: Move Gen4/5 rounding to visitor
2019-11-18 Iván Brianointel/compiler: Don't change hstride if not needed
2019-10-22 Sagar Ghugeintel/compiler: Set bits according to source file
2019-10-22 Sagar Ghugeintel/compiler: Add Immediate support for 3 source...
2019-10-11 Francisco Jerezintel/eu: Don't set notify descriptor field of gateway...
2019-10-11 Francisco Jerezintel/eu/gen12: Set SWSB annotations in hand-crafted...
2019-10-11 Francisco Jerezintel/eu/gen12: Add tracking of default SWSB state...
2019-10-11 Francisco Jerezintel/fs/gen12: Add codegen support for the SYNC instru...
2019-10-11 Francisco Jerezintel/eu/gen12: Don't set thread control, it's gone.
2019-10-11 Francisco Jerezintel/eu/gen12: Don't set DD control, it's gone.
2019-10-11 Francisco Jerezintel/eu/gen12: Use SEND instruction for split sends.
2019-10-11 Francisco Jerezintel/eu/gen12: Codegen SEND descriptor regions correctly.
2019-10-11 Francisco Jerezintel/eu/gen12: Codegen pathological SEND source and...
2019-10-11 Francisco Jerezintel/eu/gen12: Codegen control flow instructions corre...
2019-10-11 Francisco Jerezintel/eu/gen12: Codegen three-source instruction source...
2019-10-11 Francisco Jerezintel/eu/gen12: Fix codegen of immediate source regions.
2019-10-11 Francisco Jerezintel/eu: Encode and decode native instruction opcodes...
2019-10-11 Francisco Jerezintel/eu: Split brw_inst ex_desc accessors for SEND...
2019-09-17 Samuel Iglesias... i965/fs/generator: refactor rounding mode helper in...
2019-08-27 Kenneth Graunkeintel/compiler: Handle bits 15:12 in brw_send_indirect_...
2019-08-27 Kenneth Graunkeintel/compiler: Fix src0/desc setter ordering
2019-07-11 Caio Marcelo de... intel/fs: Add support for SLM fence in Gen11
2019-07-01 Sagar Ghugeintel/compiler: Enable the emission of ROR/ROL instructions
2019-06-04 Sagar Ghugeintel/compiler: Fix assertions in brw_alu3
2019-05-30 Jason Ekstrandintel/fs: Do a stalling MFENCE in endInvocationInterlock()
2019-05-30 Jason Ekstrandintel/fs,vec4: Use g0 as the header for MFENCE
2019-04-18 Iago Toral Quirogaintel/eu: force stride of 2 on NULL register for Byte...
2019-04-18 Iago Toral Quirogaintel/compiler: set correct precision fields for 3...
2019-04-18 Iago Toral Quirogaintel/compiler: allow half-float on 3-source instructio...
2019-04-18 Iago Toral Quirogaintel/compiler: handle extended math restrictions for...
2019-02-28 Jason Ekstrandintel/vec4: Drop dead code for handling typed surface...
2019-02-25 Jason Ekstrandintel/eu: Add an EOT parameter to send_indirect_[split...
2019-01-29 Jason Ekstrandintel/eu: Add support for the SENDS[C] messages
2019-01-29 Jason Ekstrandintel/inst: Indent some code
2019-01-29 Jason Ekstrandintel/fs: Use SHADER_OPCODE_SEND for surface messages
2019-01-29 Jason Ekstrandintel/eu: Rework surface descriptor helpers
2019-01-29 Jason Ekstrandintel/eu: Add has_simd4x2 bools to surface_write functions
2019-01-29 Jason Ekstrandintel/fs: Take an explicit exec size in brw_surface_pay...
2019-01-24 Matt Turnerintel/compiler: Reset default flag register in brw_find...
2019-01-18 Jason Ekstrandintel/eu: Stop overriding exec sizes in send_indirect_m...
2019-01-10 Matt Turnerintel/compiler: Avoid false positive assertions
2019-01-09 Francisco Jerezintel/eu/gen7: Fix brw_MOV() with DF destination and...
2018-12-10 Sagar Ghugeintel/compiler: Set swizzle to BRW_SWIZZLE_XXXX for...
2018-10-23 Sagar Ghugeintel/compiler: Change src1 reg type to unsigned doubleword
2018-08-23 Ian Romanickintel/compiler: Implement untyped atomic float min...
2018-07-10 Francisco Jerezintel/eu: Assert that the instruction is send-like...
2018-07-10 Francisco Jerezintel/eu: Get rid of the return value of brw_send_indir...
2018-07-10 Francisco Jerezintel/eu: Get rid of the return value of brw_send_indir...
2018-07-10 Francisco Jerezintel/eu: Use descriptor constructors for dataport...
2018-07-10 Francisco Jerezintel/eu: Use descriptor constructors for dataport...
2018-07-10 Francisco Jerezintel/eu: Use descriptor constructors for dataport...
2018-07-10 Francisco Jerezintel/eu: Provide single descriptor argument to brw_sen...
2018-07-10 Francisco Jerezintel/eu: Use descriptor constructors for pixel interpo...
2018-07-10 Francisco Jerezintel/eu: Use descriptor constructors for dataport...
2018-07-10 Francisco Jerezintel/eu: Use descriptor constructors for dataport...
2018-07-10 Francisco Jerezintel/eu: Use descriptor constructors for sampler messages.
2018-07-10 Francisco Jerezintel/eu: Provide desc immediate argument up front...
2018-07-10 Francisco JerezTRIVIAL: intel/eu: Use a local devinfo variable in...
2018-07-10 Francisco Jerezintel/eu: Use brw_set_desc() along with a helper to...
2018-07-10 Francisco Jerezintel/eu: Define helper to specify the descriptor immed...
2018-06-28 Francisco Jerezintel/eu: Fix pixel interpolator queries for SIMD32.
2018-06-28 Francisco Jerezintel/eu: Return new instruction to caller from brw_fb_...
2018-06-04 Jason Ekstrandintel/eu: Switch to a logical state stack
2018-06-04 Jason Ekstrandintel/eu: Set flag [sub]register number differently...
2018-06-04 Jason Ekstrandintel/eu: Copy fields manually in brw_next_insn
2018-06-04 Jason Ekstrandintel/eu: Add some brw_get_default_ helpers
2018-06-01 Plamena Manolovai965: Add ARB_fragment_shader_interlock support.
2018-05-22 Jason Ekstrandintel/eu: Set EXECUTE_1 when setting the rounding mode...
2018-03-22 Jason Ekstrandintel/compiler/icl: Clear "null render target" bit...
2018-03-08 Kenneth Graunkei965/fs: Add infrastructure for generating CSEL instruc...
2018-03-02 Anuj Phogatintel/compiler: Memory fence commit must always be...
2018-03-02 Francisco Jerezintel/eu: Plumb header present bit to codegen helpers...
2018-03-02 Francisco Jerezintel/ir: Allow arbitrary scratch flag registers for...
2018-02-28 Matt Turnerintel/compiler/fs: Implement FS_OPCODE_LINTERP with...
2018-02-28 Matt Turnerintel/compiler: Add Gen11+ native float type
2018-01-11 Matt Turneri965/fs: Add/use functions to convert to 3src_align1...
2017-12-06 Jose Maria Casanov... i965/fs: Add byte scattered read message and fs support
2017-12-06 Jose Maria Casanov... i965/fs: Add byte scattered write message and fs support
2017-12-06 Alejandro Piñeiroi965/fs: Define new shader opcode to set rounding modes
2017-11-07 Jason Ekstrandintel/eu: Explicitly set EXECUTE_1 where needed
2017-11-07 Jason Ekstrandintel/eu: Make automatic exec sizes a configurable...
2017-11-07 Jason Ekstrandintel/eu: Fix broadcast instruction for 64-bit values...
2017-11-07 Jason Ekstrandintel/eu: Just modify the offset in brw_broadcast
2017-11-07 Jason Ekstrandintel/compiler: Add some restrictions to MOV_INDIRECT...
2017-10-25 Jason Ekstrandintel/eu: Use EXECUTE_1 for JMPI
2017-10-20 Matt Turneri965: Add align1 ternary instruction emission support
2017-10-20 Matt Turneri965: Add functions to abstract access to 3src register...
2017-10-20 Matt Turneri965: Rename brw_inst's functions that access the 3src...
2017-10-20 Matt Turneri965: Rename brw_inst 3src functions in preparation...
2017-10-04 Matt Turneri965: Remove validate_reg()
2017-08-21 Matt Turneri965: Switch to using the logical register types
2017-08-21 Matt Turneri965: Rename brw_inst's functions that access the regis...
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