intel/nir: Allow splitting a single load into up to 32 loads
[mesa.git] / src / intel / compiler / brw_nir_lower_mem_access_bit_sizes.c
2020-08-21 Jason Ekstrandintel/nir: Allow splitting a single load into up to...
2020-06-11 Jason Ekstrandintel/nir: Call nir_metadata_preserve on !progress
2020-04-03 Jason Ekstrandanv: Improve brw_nir_lower_mem_access_bit_sizes
2019-11-11 Jason Ekstrandintel/fs: Implement the new load/store_scratch intrinsics
2019-11-11 Jason Ekstrandintel/nir: Plumb devinfo through lower_mem_access_bit_sizes
2019-11-11 Jason Ekstrandintel/nir: Use nir_extract_bits in lower_mem_access_bit...
2019-05-24 Jason Ekstrandnir/builder: Remove the use_fmov parameter from nir_swizzle
2019-05-14 Dave Airlieintel/compiler: use bitset instead of opencoding a...
2019-05-14 Dave Airlieintel/compiler: remove repeated bit_size / 8 in brw...
2019-04-03 Dave Airlieintel/compiler: use defined size for vector components
2019-02-08 Ian Romanickintel/compiler: Silence warning about value that may...
2019-02-01 Jason Ekstrandintel/nir: Add global support to lower_mem_access_bit_sizes
2018-11-16 Jason Ekstrandintel/compiler: Lower SSBO and shared loads/stores...