mesa.git
17 months agogallium/util: add missing include
Erik Faye-Lund [Tue, 16 Jun 2020 09:18:34 +0000 (11:18 +0200)]
gallium/util: add missing include

This source-file uses PIPE_OS_WINDOWS to enable the Windows
functionality. But witout including p_config.h, this pre-processor
symbol won't be defined at all.

Let's fix this by adding the missing include, enabling stack-traces on
Windows.

Acked-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5497>

17 months agogallium/util: limit STACK_LEN on Windows
Erik Faye-Lund [Tue, 16 Jun 2020 09:15:39 +0000 (11:15 +0200)]
gallium/util: limit STACK_LEN on Windows

The Windows implementation of debug_backtrace_capture has a limiation
of max 62 frames in total. Subtract a start-frame of 1 and the wrapping
functions frame, and we land at 60.

So let's lower this number on Windows to avoid triggering an assert.

Acked-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5497>

17 months agograw/gdi: do not depend on UNICODE macro
Erik Faye-Lund [Mon, 1 Jun 2020 15:45:23 +0000 (17:45 +0200)]
graw/gdi: do not depend on UNICODE macro

Similar to the previous patch, we currently depend on the UNICODE macro
not being set, but it sometimes ends up getting set after all.

Unlike the previous patch, the easier thing to do here, is to lean into
the Unicode wrappers, and use the TEXT()-macro to define a Unicode
or ASCII literal, depending on the setting of the UNICODE macro.

Acked-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5497>

17 months agogallium/os: call "ANSI" version of GetCommandLine
Erik Faye-Lund [Mon, 1 Jun 2020 15:23:46 +0000 (17:23 +0200)]
gallium/os: call "ANSI" version of GetCommandLine

The GetCommandLine API comes in two versions, GetCommandLineA (which
returns "ANSI" results), and GetCommandLineW which returns UTF-16
("WIDE") results. Then finally, windows.h provides a wrapper-macro that
defines GetCommandLine to either of the two, based on the setting of
the UNICODE macro.

More information about this mechanism can be found here:
https://docs.microsoft.com/en-us/windows/win32/intl/unicode-in-the-windows-api

For some reason, the UNICODE macro is set during build, even if we're
not explicitly setting it. This leads to us trying to cast a UTF-16
result to a char-pointer, which is obviously not going to do the right
thing.

So let's be defensive, and just call GetCommandLineA directly instead.
This avoids us depending on the setting of the UNICODE-macro in the
first place.

Acked-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5497>

17 months agointel/compiler: Always apply sample mask on Vulkan.
Arcady Goldmints-Orlov [Fri, 8 May 2020 00:34:56 +0000 (19:34 -0500)]
intel/compiler: Always apply sample mask on Vulkan.

With OpenGL, shader writes to the sample mask are ignored when not
rendering to a multisample render target. However, on Vulkan, writes to
the sample mask have still have their effect in that case.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/3016
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5156>

17 months agoradv: enable radv_no_dynamic_bounds for Path of Exile
Rhys Perry [Fri, 19 Jun 2020 23:00:05 +0000 (00:00 +0100)]
radv: enable radv_no_dynamic_bounds for Path of Exile

To workaround game bugs. This also enables it for the D3D11 renderer but
that shouldn't be an issue.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Cc: <mesa-stable@lists.freedesktop.org>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/3081
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/3084
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/3080
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5569>

17 months agoradv: add new drirc option radv_no_dynamic_bounds
Rhys Perry [Fri, 19 Jun 2020 22:59:49 +0000 (23:59 +0100)]
radv: add new drirc option radv_no_dynamic_bounds

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Cc: <mesa-stable@lists.freedesktop.org>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5569>

17 months agoiris: Support I915_FORMAT_MOD_Y_TILED_GEN12_RC_CCS
Nanley Chery [Thu, 5 Sep 2019 23:51:26 +0000 (16:51 -0700)]
iris: Support I915_FORMAT_MOD_Y_TILED_GEN12_RC_CCS

Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5420>

17 months agoiris: Refactor modifier_is_supported for gen12
Nanley Chery [Tue, 9 Jun 2020 23:27:14 +0000 (16:27 -0700)]
iris: Refactor modifier_is_supported for gen12

Reviewed-by: Sagar Ghuge <sagar.ghuge@intel.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5420>

17 months agoiris: Handle importing aux-enabled surfaces on TGL
Nanley Chery [Thu, 5 Dec 2019 20:19:33 +0000 (12:19 -0800)]
iris: Handle importing aux-enabled surfaces on TGL

Ensure main surfaces are properly 64KB-aligned (as suggested by Jordan)
and map the main surface addresses to aux surface addresses on import.

v2. Add a Bspec quote. (Sagar)
v3. Add a bit more to the Bspec comment. (Ken)

Reviewed-by: Jordan Justen <jordan.l.justen@intel.com> (v2)
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5420>

17 months agogallium/dri2: Support I915_FORMAT_MOD_Y_TILED_GEN12_RC_CCS
Nanley Chery [Wed, 11 Sep 2019 22:34:46 +0000 (15:34 -0700)]
gallium/dri2: Support I915_FORMAT_MOD_Y_TILED_GEN12_RC_CCS

Add a case for this modifier in dri2_get_modifier_num_planes.

Reviewed-by: Sagar Ghuge <sagar.ghuge@intel.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5420>

17 months agoisl/drm: Support I915_FORMAT_MOD_Y_TILED_GEN12_RC_CCS
Nanley Chery [Tue, 19 Mar 2019 21:11:34 +0000 (14:11 -0700)]
isl/drm: Support I915_FORMAT_MOD_Y_TILED_GEN12_RC_CCS

Add an entry for this modifier in the modifier_info array.

Reviewed-by: Sagar Ghuge <sagar.ghuge@intel.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5420>

17 months agoiris: Use ISL_AUX_USAGE_GEN12_CCS_E on gen12
Nanley Chery [Thu, 4 Jun 2020 23:42:20 +0000 (16:42 -0700)]
iris: Use ISL_AUX_USAGE_GEN12_CCS_E on gen12

Makes iris pass a subtest of the fcc-write-after-clear piglit test
(fast-clear tracking across layers 1 -> 0 -> 1) on gen12.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5363>

17 months agoiris: Don't support sRGB + Y_TILED_CCS on gen9
Nanley Chery [Tue, 9 Jun 2020 18:10:44 +0000 (11:10 -0700)]
iris: Don't support sRGB + Y_TILED_CCS on gen9

Delete some code that would otherwise need updating for
ISL_AUX_USAGE_GEN12_CCS_E.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5363>

17 months agointel: Add ISL_AUX_USAGE_GEN12_CCS_E
Nanley Chery [Sat, 28 Mar 2020 00:15:51 +0000 (17:15 -0700)]
intel: Add ISL_AUX_USAGE_GEN12_CCS_E

Add a new aux usage which more accurately describes the behavior of
CCS_E on gen12. On this platform, writes using the 3D engine are either
compressed or substituted with fast-cleared blocks.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5363>

17 months agoci: Enable NIR validation on a630 GLES2 and VK tests.
Eric Anholt [Thu, 18 Jun 2020 19:55:41 +0000 (12:55 -0700)]
ci: Enable NIR validation on a630 GLES2 and VK tests.

We get through GLES2 in 5.5 minutes and the vk subset in 8 minutes, so we
can spare the CPU time on these tests.

Acked-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5554>

17 months agoci: Bump vulkan CTS to 1.2.3.0.
Eric Anholt [Thu, 18 Jun 2020 19:21:44 +0000 (12:21 -0700)]
ci: Bump vulkan CTS to 1.2.3.0.

Looks like it fixes some potentially important VK test bugs.  But also, it
fixes the GLES31 SSBO layout tests to not be so excessively large, so we
can run them in a reasonable time now.  Note that a630 fail list is reset,
since the test list has changed and so we end up with a different subset
of tests being run.  Interestingly, in the process the semaphore tests are
now reporting "NotSupported (Exporting and importing semaphore type not
supported at vktSynchronizationSignalOrderTests.cpp:513)" where they
weren't before.

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5554>

17 months agoiris: Disable sRGB fast-clears for non-0/1 values
Nanley Chery [Thu, 14 May 2020 15:48:30 +0000 (08:48 -0700)]
iris: Disable sRGB fast-clears for non-0/1 values

For texturing and draw calls, HW expects the clear color to be in two
different color spaces after sRGB fast-clears - sRGB in the former and
linear in the latter. Up until now, iris has stored the clear color in
the sRGB color space. Limit the allowable clear colors for sRGB
fast-clears to 0/1 so that both color space requirements are satisfied.

Makes iris pass the sRGB -> sRGB subtest of the fcc-write-after-clear
piglit test on gen9+.

v2:
* Drop iris_context::blend_enables. (Ken)
* Drop some more resolve-related blend-state-tracking code.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4972>

17 months agoiris: Avoid fast-clear with incompatible view
Nanley Chery [Tue, 5 May 2020 22:33:29 +0000 (15:33 -0700)]
iris: Avoid fast-clear with incompatible view

For rendering operations, avoid adding or using fast-cleared blocks if
the render format is incompatible with the clear color interpretation.
Note that the clear color is currently interpreted through the
resource's surface format.

Makes iris pass subtests of the fcc-write-after-clear piglit test:

* UNORM -> SNORM, partial block on gen8+.
* linear -> sRGB, partial block on gen9+.
* UNORM -> SNORM, full block on gen12.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4972>

17 months agoiris: Remove the CCS_D fallback
Nanley Chery [Mon, 1 Jun 2020 15:48:56 +0000 (08:48 -0700)]
iris: Remove the CCS_D fallback

Remove the CCS_D fallback logic so that iris doesn't attempt to use a
non-existent surface state for some renders. Also, add an assertion to
catch the issue.

The fallback in iris_resource_render_aux_usage can lead to this problem
because it doesn't account for the fact that surface states created from
resources with the Y_TILED_CCS modifier may only have CCS_E or NONE as
aux usages (due to iris_resource_create_with_modifiers).

Without this change, the next commit would have triggered the fallback
and regressed the following tests on gen9:

* dEQP-EGL.functional.wide_color.window_888_colorspace_srgb
* dEQP-EGL.functional.wide_color.window_8888_colorspace_srgb
* dEQP-EGL.functional.wide_color.pbuffer_888_colorspace_srgb
* dEQP-EGL.functional.wide_color.pbuffer_8888_colorspace_srgb

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4972>

17 months agoiris: Drop can_fast_clear_color's format parameter
Nanley Chery [Wed, 20 May 2020 18:46:46 +0000 (11:46 -0700)]
iris: Drop can_fast_clear_color's format parameter

Pull the resource's format from the pipe_resource instead. Makes the
changes in later commits more obvious.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4972>

17 months agodocs: move "stable" tag explanation next to `Fixes:`
Eric Engestrom [Sun, 7 Jun 2020 17:18:31 +0000 (19:18 +0200)]
docs: move "stable" tag explanation next to `Fixes:`

Signed-off-by: Eric Engestrom <eric@engestrom.ch>
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5378>

17 months agodocs: move `Fixes:` tag explanation to its own section
Eric Engestrom [Sun, 7 Jun 2020 17:14:51 +0000 (19:14 +0200)]
docs: move `Fixes:` tag explanation to its own section

This also adds the ability to link directly to it:
https://mesa3d.org/submittingpatches.html#fixes

Signed-off-by: Eric Engestrom <eric@engestrom.ch>
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5378>

17 months agodocs: make it clear that the tags needs to be in the commit message
Eric Engestrom [Sun, 7 Jun 2020 15:57:52 +0000 (17:57 +0200)]
docs: make it clear that the tags needs to be in the commit message

Some people have been putting them only in the MR description, which
isn't picked up by our tools. (Note that doing both doesn't hurt.)

Signed-off-by: Eric Engestrom <eric@engestrom.ch>
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5378>

17 months agodocs: reword a sentence a bit
Eric Engestrom [Sun, 7 Jun 2020 15:53:07 +0000 (17:53 +0200)]
docs: reword a sentence a bit

The "that you know ahead of time" bit just sounded weird as everything on this
page except the backport MR only applies if you know it "ahead of time".

Signed-off-by: Eric Engestrom <eric@engestrom.ch>
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5378>

17 months agodocs: add some formatting to the "backport merge request" option
Eric Engestrom [Sun, 7 Jun 2020 15:52:45 +0000 (17:52 +0200)]
docs: add some formatting to the "backport merge request" option

Signed-off-by: Eric Engestrom <eric@engestrom.ch>
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5378>

17 months agodocs: prefer `Fixes:` over `Cc: mesa-stable`
Eric Engestrom [Sun, 7 Jun 2020 15:39:56 +0000 (17:39 +0200)]
docs: prefer `Fixes:` over `Cc: mesa-stable`

`Fixes:` targets a specific commit and as such is much more precise and
useful than `Cc: mesa-stable`, so let's prefer it when applicable.

Signed-off-by: Eric Engestrom <eric@engestrom.ch>
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5378>

17 months agodocs: drop `git sendemail` instructions
Eric Engestrom [Sun, 7 Jun 2020 15:37:59 +0000 (17:37 +0200)]
docs: drop `git sendemail` instructions

Signed-off-by: Eric Engestrom <eric@engestrom.ch>
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5378>

17 months agodocs: reword "sending a patch revision" to "updating a merge request"
Eric Engestrom [Sun, 7 Jun 2020 15:36:55 +0000 (17:36 +0200)]
docs: reword "sending a patch revision" to "updating a merge request"

Signed-off-by: Eric Engestrom <eric@engestrom.ch>
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5378>

17 months agodocs: stop considering `Cc: mesa-stable` as an email address
Eric Engestrom [Sun, 7 Jun 2020 15:31:01 +0000 (17:31 +0200)]
docs: stop considering `Cc: mesa-stable` as an email address

Our tools haven't needed more than this ^ for a while, and the historical
reasons this used to be an email address don't matter anymore.

Signed-off-by: Eric Engestrom <eric@engestrom.ch>
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5378>

17 months agofreedreno/a6xx: Set index buffer size to bo size
Kristian H. Kristensen [Tue, 16 Jun 2020 18:39:07 +0000 (11:39 -0700)]
freedreno/a6xx: Set index buffer size to bo size

The number of vertices may be out of bound and if we use it for
computing index buffer size we may get too big a size.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5552>

17 months agofreedreno/a6xx: Don't write REG_A6XX_RB_SRGB_CNTL in restore
Kristian H. Kristensen [Tue, 16 Jun 2020 18:38:06 +0000 (11:38 -0700)]
freedreno/a6xx: Don't write REG_A6XX_RB_SRGB_CNTL in restore

We configure this as part of MRT set up.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5552>

17 months agoanv: Use resolve_device_entrypoint for dispatch init
Jason Ekstrand [Wed, 17 Jun 2020 18:42:15 +0000 (13:42 -0500)]
anv: Use resolve_device_entrypoint for dispatch init

There's no good reason to have the "which table do I use?" code
duplicated twice.  The only advantage to the way we were doing it before
was that we could move the switch statement outside the loop.  If this
is ever an actual device initialization perf problem that someone cares
about, we can optimize that when the time comes.  For now, the
duplicated cases are simply a platform-enabling pit-fall.

Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5530>

17 months agodocs: suggest alternative installation methods for meson
Eric Engestrom [Thu, 5 Dec 2019 20:39:17 +0000 (20:39 +0000)]
docs: suggest alternative installation methods for meson

A couple of popular distros have a habit of never updating anything.
Point their users towards ways of using current versions of meson anyway.

Signed-off-by: Eric Engestrom <eric.engestrom@intel.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/2988>

17 months agoturnip: Fill out VkPhysicalDeviceSubgroupProperties
Brian Ho [Fri, 19 Jun 2020 16:47:08 +0000 (12:47 -0400)]
turnip: Fill out VkPhysicalDeviceSubgroupProperties

This commit fills out VkPhysicalDeviceSubgroupProperties if present
in a VkPhysicalDeviceProperties2. The values here are simply pulled
from the blob.

Fixes some flakes in dEQP-VK.subgroups.* since dEQP was reading
uninitialized values of VkPhysicalDeviceSubgroupProperties.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5564>

17 months agozink: use int assignment for vk int type
Mike Blumenkrantz [Thu, 18 Jun 2020 15:54:21 +0000 (11:54 -0400)]
zink: use int assignment for vk int type

this breaks 32bit builds that use -Werror=int-conversion

Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5545>

17 months agofreedreno/ir3: move output_loc to variant
Rob Clark [Mon, 15 Jun 2020 21:12:58 +0000 (14:12 -0700)]
freedreno/ir3: move output_loc to variant

This moves the last bit of important state to be serialized from
ir3_shader to ir3_shader_variant.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5508>

17 months agofreedreno/ir3: move const_state back to variant
Rob Clark [Mon, 15 Jun 2020 19:14:04 +0000 (12:14 -0700)]
freedreno/ir3: move const_state back to variant

For shader-cache, we want to not have anything important in `ir3_shader`.
And to have shader variants with lower const size limits (to properly
handle cross-stage limits), we also want variants to be able to have
their own const_state.

But we still need binning pass shaders to align with their draw pass
counterpart so that the same const emit can be used for both passes.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5508>

17 months agofreedreno/ir3: un-embed const_state
Rob Clark [Mon, 15 Jun 2020 18:43:36 +0000 (11:43 -0700)]
freedreno/ir3: un-embed const_state

Make it an rzalloc'd ptr instead of embedded struct, so it can serve as
the mem ctx for immediates.  This gets rid of needing to explicitly free
the immediates, so one less thing to deal with when moving const_state.
(Also, after we move const_state to the shader variant, we won't need
one for binning pass variants)

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5508>

17 months agofreedreno/ir3: move num_reserved_user_consts out of const_state
Rob Clark [Tue, 16 Jun 2020 21:09:34 +0000 (14:09 -0700)]
freedreno/ir3: move num_reserved_user_consts out of const_state

When we move const_state to the variant, this will need to stay in the
shader, as it applies to all variants (and we need to store it somewhere
before we have any variants)

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5508>

17 months agofreedreno/ir3: convert over to ralloc
Rob Clark [Mon, 15 Jun 2020 18:15:52 +0000 (11:15 -0700)]
freedreno/ir3: convert over to ralloc

The `ir3_shader` is the root mem ctx, with `ir3_shader_variant` hanging
off that, and various variant specific allocations hanging off the
variant.

This lets us delete a bunch of cleanup code.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5508>

17 months agofreedreno/ir3: pass variant to ir3_create()
Rob Clark [Mon, 15 Jun 2020 18:14:46 +0000 (11:14 -0700)]
freedreno/ir3: pass variant to ir3_create()

Prep to convert over to ralloc.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5508>

17 months agoir3: Split out variant-specific lowering and optimizations
Connor Abbott [Wed, 10 Jun 2020 09:11:27 +0000 (11:11 +0200)]
ir3: Split out variant-specific lowering and optimizations

It seems a lot of the lowerings being run the second time were
unnecessary. In addition, when const_state is moved to the variant,
then it will become impossible to know ahead of time whether a variant
needs additional optimizing, which means that ir3_key_lowers_nir() needs
to go away. The new approach should have the same effect, since it skips
running lowerings that are unnecessary and then skips the opt loop if no
optimizations made progress, but it will work better when we move
ir3_nir_analyze_ubo_ranges() to be after variant creation.

The one maybe controversial thing I did is to make
nir_opt_algebraic_late() always happen during variant lowering. I wanted
to avoid code duplication, and it seems to me that we should push the
_late variants as far back as possible so that later opt_algebraic runs
don't miss out on optimization opportunities.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5508>

17 months agofreedreno/ir3: constify shader key
Rob Clark [Mon, 15 Jun 2020 16:37:13 +0000 (09:37 -0700)]
freedreno/ir3: constify shader key

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5508>

17 months agofreedreno/ir3: drop shader->num_ubos
Rob Clark [Sun, 14 Jun 2020 19:54:05 +0000 (12:54 -0700)]
freedreno/ir3: drop shader->num_ubos

The only difference between this and `const_state->num_ubos` was that
the latter is counting # of ubos loaded via `ldg` (based on UBO addrs
in push-consts).  But turns out there isn't really any reason to care.
Instead just add an early return in the one code-path that cares about
the number of `ldg` UBOs.

This gets rid of one more thing we need to move from `ir3_shader` to
`ir3_shader_variant`.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5508>

17 months agofreedreno/ir3: move ubo_state into const_state
Rob Clark [Sun, 14 Jun 2020 19:44:17 +0000 (12:44 -0700)]
freedreno/ir3: move ubo_state into const_state

As with const_state, this will also need to move into the variant.  To
simplify that, just move it into the const_state itself, since after all
it is related.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5508>

17 months agofreedreno/a6xx: defer userconst cmdstream size calculation
Rob Clark [Sun, 14 Jun 2020 19:33:54 +0000 (12:33 -0700)]
freedreno/a6xx: defer userconst cmdstream size calculation

The `ubo_state` will also need to move to `ir3_shader_variant`.  But we
can prepare for that and simplify things a bit if we calculate the
cmdstream on first emit, once we already have the appropriate variant.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5508>

17 months agofreedreno/ir3: add accessor for const_state
Rob Clark [Sun, 14 Jun 2020 18:36:05 +0000 (11:36 -0700)]
freedreno/ir3: add accessor for const_state

We are going to want to move this back to the variant, and come up with
a different strategy for binning/nonbinning to share the same constant
layout, in order to implement shader-cache support.  (Since then we
can have a mix of dynamically compiled variants and cache hits, so there
is no good place to serialize the const-state.)

To reduce the churn as we re-arrange things, move direct access to the
const-state to a helper fxn.  This patch is the boring churny part.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5508>

17 months agofreedreno/ir3: refactor out helper to compile shader from asm
Rob Clark [Wed, 17 Jun 2020 15:13:12 +0000 (08:13 -0700)]
freedreno/ir3: refactor out helper to compile shader from asm

Deduplicate a bit of hand-building of ir3_shader/_variant from
computerator and delay test.  This also removes the need for
external things to depend on generated ir3_parser header.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5508>

17 months agost/mesa: make texture views inherit compressed_data storage
Pierre-Eric Pelloux-Prayer [Fri, 5 Jun 2020 09:20:55 +0000 (11:20 +0200)]
st/mesa: make texture views inherit compressed_data storage

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/2775
Fixes: c3fafa127a0 ("st/mesa: generalize code for the compressed texture map/unmap fallback")
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5492>

17 months agoac/llvm: load 1 byte at a time if unaligned on gfx10
Pierre-Eric Pelloux-Prayer [Tue, 16 Jun 2020 12:46:08 +0000 (14:46 +0200)]
ac/llvm: load 1 byte at a time if unaligned on gfx10

If buffer or stride is unaligned we use the same trick as on gfx6:
load 1 byte at a time and recompose the output if needed.
This change fixes lots of deqp/glcts tests:
  - dEQP-GLES2.functional.draw.random.1, 10, ...
  - dEQP-GLES2.functional.vertex_arrays.multiple_attributes.stride.3_float2_0_float2_0_float2_17, ...
  - dEQP-GLES2.functional.vertex_arrays.single_attribute.first.byte_first24_offset1_stride2_quads256, ...
  - dEQP-GLES2.functional.vertex_arrays.single_attribute.strides.buffer_0_17_byte2_vec4_dynamic_draw_quads_1, ...
  - dEQP-GLES31.functional.draw_indirect.random.14, ...

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5502>

17 months agor600/sfn: Handle memory_barrier
Gert Wollny [Sat, 9 May 2020 09:15:04 +0000 (11:15 +0200)]
r600/sfn: Handle memory_barrier

I'm not sure whether this should actually be a barrier accross all
shader processing units, the TGSI code path seems to handle this
only by using GROUP_BARRIER, so let's do the same here.

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5206>

17 months agor600/sfn: Take SSBO buffer ID offset into account
Gert Wollny [Sun, 10 May 2020 11:38:17 +0000 (13:38 +0200)]
r600/sfn: Take SSBO buffer ID offset into account

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5206>

17 months agor600/sfn: Add support for reading cube image array dim.
Gert Wollny [Sat, 9 May 2020 13:09:36 +0000 (15:09 +0200)]
r600/sfn: Add support for reading cube image array dim.

The cube array size can't be queried directly, the number of array
elements must be passed via a constant buffer.

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5206>

17 months agor600/sfn: Add support for image_size
Gert Wollny [Sat, 9 May 2020 09:30:19 +0000 (11:30 +0200)]
r600/sfn: Add support for image_size

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5206>

17 months agor600/sfn: Add imageio support
Gert Wollny [Wed, 6 May 2020 22:08:15 +0000 (00:08 +0200)]
r600/sfn: Add imageio support

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5206>

17 months agor600/sfn: lower image derefs
Gert Wollny [Wed, 6 May 2020 22:11:33 +0000 (00:11 +0200)]
r600/sfn: lower image derefs

v2: Signal lowering image derefs by using the CAP

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5206>

17 months agoradv: require LLVM 11+ for GFX 10.3 if not using ACO
Samuel Pitoiset [Tue, 9 Jun 2020 06:10:56 +0000 (08:10 +0200)]
radv: require LLVM 11+ for GFX 10.3 if not using ACO

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5389>

17 months agoradv: add support for Sienna Cichlid
Samuel Pitoiset [Mon, 8 Jun 2020 16:16:13 +0000 (18:16 +0200)]
radv: add support for Sienna Cichlid

Bits copied from RadeonSI. Totally untested.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5389>

17 months agoaco: replace == GFX10 with >= GFX10 where it's needed
Samuel Pitoiset [Mon, 8 Jun 2020 16:45:35 +0000 (18:45 +0200)]
aco: replace == GFX10 with >= GFX10 where it's needed

Assume the GFX10.3 ISA is similar to GFX10 which is likely (except
possible minor changes and new instructions for raytracing).

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5389>

17 months agoradv: replace == GFX10 with >= GFX10 where it's needed
Samuel Pitoiset [Mon, 8 Jun 2020 16:38:57 +0000 (18:38 +0200)]
radv: replace == GFX10 with >= GFX10 where it's needed

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5389>

17 months agointel/tools: Add assembler tests for the cr0 register
Matt Turner [Wed, 17 Jun 2020 00:10:38 +0000 (17:10 -0700)]
intel/tools: Add assembler tests for the cr0 register

Reviewed-by: Sagar Ghuge <sagar.ghuge@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5514>

17 months agointel/tools: Disallow control subregisters > 3
Matt Turner [Wed, 17 Jun 2020 00:07:15 +0000 (17:07 -0700)]
intel/tools: Disallow control subregisters > 3

> 4 was probably a typo, since the documentation says that there are 4
subregisters (0-3).

Reviewed-by: Sagar Ghuge <sagar.ghuge@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5514>

17 months agointel/tools: Require explicit regions/types for special regs
Matt Turner [Tue, 16 Jun 2020 23:54:07 +0000 (16:54 -0700)]
intel/tools: Require explicit regions/types for special regs

The docs say that these registers should  only be read with a certain
type, and I'm inclined to believe that the hardware behaves that way,
but it makes the assembler a little more confusing and also confuses the
user of the assembler that some operands don't take types or regions.

Just always requiring regions and types seems like the sensible thing.

Reviewed-by: Sagar Ghuge <sagar.ghuge@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5514>

17 months agointel/tools: Drop srctype from ipreg
Matt Turner [Tue, 16 Jun 2020 23:53:05 +0000 (16:53 -0700)]
intel/tools: Drop srctype from ipreg

It's unused, and it would cause shift/reduce conflicts after the next
patch.

Reviewed-by: Sagar Ghuge <sagar.ghuge@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5514>

17 months agointel/tools: Remove unnecessary reg number checking
Matt Turner [Tue, 16 Jun 2020 23:53:57 +0000 (16:53 -0700)]
intel/tools: Remove unnecessary reg number checking

a0 is the only address register, and cr0 is the only control register,
so there's no need to return the register number, espcially since the
lexer explicitly consumes "a0" and "cr0".

Reviewed-by: Sagar Ghuge <sagar.ghuge@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5514>

17 months agoturnip: move enum translation functions to a common header
Jonathan Marek [Wed, 17 Jun 2020 20:05:07 +0000 (16:05 -0400)]
turnip: move enum translation functions to a common header

Instead of having these functions sprinkled around the driver (and ending
with a duplicated tu6_compare_func for example), move everything to a
common header (using the previously unused tu_util.h).

Also applied some simplifications: using a cast when the HW enum matches
the VK enum, and using a lookup table when it makes sense (which is IMO
nicer than the switch case way).

Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5538>

17 months agoaco: use the same regclass as the definition for undef phi operands
Rhys Perry [Thu, 18 Jun 2020 12:52:28 +0000 (13:52 +0100)]
aco: use the same regclass as the definition for undef phi operands

Subdword phis can't have SGPR operands on GFX6-8.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5544>

17 months agoaco: fix edge check with sub-dword temporaries
Rhys Perry [Thu, 18 Jun 2020 12:30:50 +0000 (13:30 +0100)]
aco: fix edge check with sub-dword temporaries

Fixes RA failure for a parallel-rdp shader on pitcairn.

fossil-db (Navi):
Totals from 2 (0.00% of 128733) affected shaders:
CodeSize: 203656 -> 205724 (+1.02%)
Instrs: 32267 -> 32529 (+0.81%)

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5544>

17 months agomesa/main: fix inverted condition
Erik Faye-Lund [Wed, 17 Jun 2020 21:50:06 +0000 (23:50 +0200)]
mesa/main: fix inverted condition

I accidentally got one of the conditions wrong here. Sorry for the
mixup.

See ttps://gitlab.freedesktop.org/mesa/mesa/-/issues/3134 for details.

Fixes: b112e62ba48 ("mesa/main: do not allow MESA_ycbcr_texture enums on gles")
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5532>

17 months agonv50/ir/nir: remove image uniform hack
Karol Herbst [Mon, 15 Jun 2020 23:08:39 +0000 (01:08 +0200)]
nv50/ir/nir: remove image uniform hack

Signed-off-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5480>

17 months agonv50/ir/nir: handle image atomic inc and dec
Karol Herbst [Mon, 15 Jun 2020 16:30:39 +0000 (18:30 +0200)]
nv50/ir/nir: handle image atomic inc and dec

Signed-off-by: Karol Herbst <kherbst@redhat.com>
Reviewed-by: Ben Skeggs <bskeggs@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5480>

17 months agonv50/ir/nir: move away from image_deref intrinsics
Karol Herbst [Mon, 15 Jun 2020 12:36:18 +0000 (14:36 +0200)]
nv50/ir/nir: move away from image_deref intrinsics

v2: fix lod source of image operation correctly

Signed-off-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5480>

17 months agonir/lower_images: handle dec and inc
Karol Herbst [Mon, 15 Jun 2020 16:30:12 +0000 (18:30 +0200)]
nir/lower_images: handle dec and inc

Signed-off-by: Karol Herbst <kherbst@redhat.com>
Reviewed-by: Gert Wollny <gert.wollny@collabora.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5480>

17 months agonir/lower_images: fix for array of arrays
Karol Herbst [Mon, 15 Jun 2020 16:29:58 +0000 (18:29 +0200)]
nir/lower_images: fix for array of arrays

Signed-off-by: Karol Herbst <kherbst@redhat.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5480>

17 months agost/mesa: lower images when needed
Karol Herbst [Mon, 15 Jun 2020 13:14:58 +0000 (15:14 +0200)]
st/mesa: lower images when needed

The "st/pbo download FS" builtin shader uses image derefs, so even with
PIPE_CAP_NIR_IMAGES_AS_DEREF set to 0 drivers ended up with those.

Signed-off-by: Karol Herbst <kherbst@redhat.com>
Reviewed-by: Gert Wollny <gert.wollny@collabora.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5480>

17 months agoaco: shrink mad_info
Rhys Perry [Mon, 1 Jun 2020 15:19:56 +0000 (16:19 +0100)]
aco: shrink mad_info

From 24 bytes to 16 bytes.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5281>

17 months agoaco: make ssa_info::label 64-bit
Rhys Perry [Mon, 1 Jun 2020 10:27:53 +0000 (11:27 +0100)]
aco: make ssa_info::label 64-bit

We'll probably need these extra bits in the future.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5281>

17 months agoaco: shrink ssa_info
Rhys Perry [Mon, 1 Jun 2020 15:13:09 +0000 (16:13 +0100)]
aco: shrink ssa_info

Reorder members so that it's 16 bytes instead of 24.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5281>

17 months agoradeon/vcn: bump vcn3.0 encode major version to 1
Boyuan Zhang [Thu, 11 Jun 2020 23:22:51 +0000 (19:22 -0400)]
radeon/vcn: bump vcn3.0 encode major version to 1

And add quality params for this version

Signed-off-by: Boyuan Zhang <boyuan.zhang@amd.com>
Signed-off-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Thong Thai <thong.thai@amd.com>
Reviewed-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: James Zhu <James.Zhu@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5501>

17 months agoradeon/vcn/enc: Re-write PPS encoding for HEVC
Boyuan Zhang [Thu, 11 Jun 2020 23:17:03 +0000 (19:17 -0400)]
radeon/vcn/enc: Re-write PPS encoding for HEVC

Due to hardware change on VCN3

Signed-off-by: Boyuan Zhang <boyuan.zhang@amd.com>
Signed-off-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Thong Thai <thong.thai@amd.com>
Reviewed-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: James Zhu <James.Zhu@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5501>

17 months agoradeon/vcn: add vcn 3.0 encode support
Thong Thai [Thu, 11 Jun 2020 23:02:27 +0000 (19:02 -0400)]
radeon/vcn: add vcn 3.0 encode support

Signed-off-by: Thong Thai <thong.thai@amd.com>
Signed-off-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Boyuan Zhang <boyuan.zhang@amd.com>
Reviewed-by: James Zhu <James.Zhu@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5501>

17 months agoradeon/vcn/dec: add db_aligned_height to message buffer
Leo Liu [Thu, 11 Jun 2020 23:27:57 +0000 (19:27 -0400)]
radeon/vcn/dec: add db_aligned_height to message buffer

This is required for Sienna

Signed-off-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Boyuan Zhang <boyuan.zhang@amd.com>
Reviewed-by: James Zhu <James.Zhu@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5501>

17 months agoradeon/vcn: add Sienna to use internal register offset
Leo Liu [Thu, 11 Jun 2020 22:40:07 +0000 (18:40 -0400)]
radeon/vcn: add Sienna to use internal register offset

And re-group them explicitly

Signed-off-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Boyuan Zhang <boyuan.zhang@amd.com>
Reviewed-by: James Zhu <James.Zhu@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5501>

17 months agoradeon/vcn: reset the decode flags from message buffer
Leo Liu [Thu, 11 Jun 2020 22:28:25 +0000 (18:28 -0400)]
radeon/vcn: reset the decode flags from message buffer

This flag was never used by VCN previously, and now
it's used for feature that is not applied to us.

Signed-off-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Boyuan Zhang <boyuan.zhang@amd.com>
Reviewed-by: James Zhu <James.Zhu@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5501>

17 months agoaco: fix WQM handling in nested loops
Daniel Schürmann [Wed, 17 Jun 2020 11:41:09 +0000 (12:41 +0100)]
aco: fix WQM handling in nested loops

If on a nested loop
- the outer loop needs WQM but
- the inner loop doesn't need WQM and
- the break condition of the inner loop is computed in the outer loop
then it could happen that we transitioned to Exact before entering the inner loop
which could create an empty exec mask and lead to an infinite loop.

Fixes a GPU hang with RDR2

Cc: 20.1 <mesa-stable@lists.freedesktop.org>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5518>

17 months agost/mesa: account for "loose", per-mipmap level textures in CopyImageSubData
Danylo Piliaiev [Fri, 12 Jun 2020 13:04:44 +0000 (16:04 +0300)]
st/mesa: account for "loose", per-mipmap level textures in CopyImageSubData

We may have "loose", per-image gallium resources. The src_image->Level
may not match the gallium resource texture level. In such case it is
prescribed (in st_AllocTextureImageBuffer) to specify mipmap level
as zero.

Fixes: f04f13622f3e71bee057d60a6be9c53b92b56cc9
Signed-off-by: Danylo Piliaiev <danylo.piliaiev@globallogic.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5477>

17 months agovirgl: apply bgra dest swizzle and add Portal 2
Gurchetan Singh [Mon, 15 Jun 2020 17:52:57 +0000 (10:52 -0700)]
virgl: apply bgra dest swizzle and add Portal 2

Apply the destination swizzle on GLES games based on HL2 engine.
Also add Portal 2 since some people are experiencing issues with
that.

Reviewed-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5481>

17 months agoturnip: set the API version
Jonathan Marek [Wed, 17 Jun 2020 13:57:56 +0000 (09:57 -0400)]
turnip: set the API version

Some CTS tests don't run because of this.

Fixes: 91c757b7963f458 ("turnip: use the common code for generating extensions and dispatch tables")
Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5522>

17 months agoradv: only requires LLVM 9 for GFX10 if not using ACO
Samuel Pitoiset [Sat, 13 Jun 2020 12:23:17 +0000 (14:23 +0200)]
radv: only requires LLVM 9 for GFX10 if not using ACO

In case someone links RADV with LLVM 8 and wants to use ACO.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5454>

17 months agoRevert "CI: Disable Panfrost Mali-T820 jobs"
Neil Armstrong [Fri, 24 Apr 2020 09:07:32 +0000 (11:07 +0200)]
Revert "CI: Disable Panfrost Mali-T820 jobs"

This reverts commit 46a32f0b6bf91279d001a4905babe4e50007696e.

The lab has recovered health, thus re-enable T820 Panfrost jobs.

Acked-by: Michel Dänzer <mdaenzer@redhat.com>
Reviewed-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4727>

17 months agoRevert "CI: Disable Lima jobs due to lab unhealthiness"
Neil Armstrong [Fri, 24 Apr 2020 09:07:31 +0000 (11:07 +0200)]
Revert "CI: Disable Lima jobs due to lab unhealthiness"

This reverts commit adeef43d15092a6910dceb3605f5ee3151dd2c47.

The lab has recovered health, thus re-enable Lima jobs.

Acked-by: Michel Dänzer <mdaenzer@redhat.com>
Reviewed-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4727>

17 months agoradv: compute CB_SHADER_MASK from the fragment shader outputs
Samuel Pitoiset [Thu, 11 Jun 2020 14:27:17 +0000 (16:27 +0200)]
radv: compute CB_SHADER_MASK from the fragment shader outputs

The fragment shader doesn't necessarily output the number of components
expected by the target format.

Fixes new dEQP-VK.draw.output_location.*.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5427>

17 months agoradv: make sure to set CB_SHADER_MASK correctly for internal CB operations
Samuel Pitoiset [Thu, 11 Jun 2020 13:39:46 +0000 (15:39 +0200)]
radv: make sure to set CB_SHADER_MASK correctly for internal CB operations

It should be always set to 0xf.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5427>

17 months agodocs/features: remove driver-list for forward-compatible context
Erik Faye-Lund [Thu, 18 Jun 2020 08:43:36 +0000 (10:43 +0200)]
docs/features: remove driver-list for forward-compatible context

This is something that's supported by the Gallium state-tracker, there's
nothing to be done per driver here.

17 months agodocs/features: update ARB_texture_buffer_object line
Erik Faye-Lund [Thu, 18 Jun 2020 08:41:43 +0000 (10:41 +0200)]
docs/features: update ARB_texture_buffer_object line

This extension isn't just exposed in OpenGL 3.1 contexts any longer, and
Zink supports it. Let's mark it as such.

17 months agodocs/features: mark GL3 as complete for zink
Erik Faye-Lund [Thu, 18 Jun 2020 08:40:27 +0000 (10:40 +0200)]
docs/features: mark GL3 as complete for zink

17 months agoradv: lower discards to demote to workaround a RDR2 game bug
Samuel Pitoiset [Wed, 17 Jun 2020 14:35:05 +0000 (16:35 +0200)]
radv: lower discards to demote to workaround a RDR2 game bug

This fixes some sort of LOD issue.

Cc: 20.1 <mesa-stable@lists.freedesktop.org>
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5525>

17 months agoglsl_to_nir: fix vote_any/vote_all
Rob Clark [Wed, 17 Jun 2020 00:46:43 +0000 (17:46 -0700)]
glsl_to_nir: fix vote_any/vote_all

Signed-off-by: Rob Clark <robdclark@chromium.org>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5505>

17 months agoglsl_to_nir: fix shader_clock
Rob Clark [Wed, 17 Jun 2020 00:45:59 +0000 (17:45 -0700)]
glsl_to_nir: fix shader_clock

Signed-off-by: Rob Clark <robdclark@chromium.org>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5505>