mesa.git
4 years agoetnaviv: remove flat shading workaround
Lucas Stach [Thu, 8 Jun 2017 15:06:02 +0000 (17:06 +0200)]
etnaviv: remove flat shading workaround

It turned out not to be a hardware bug, but the shader compiler
emitting wrong varying component use information. With that fixed
we can turn flat shading back on.

Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Reviewed-by: Philipp Zabel <p.zabel@pengutronix.de>
Reviewed-by: Wladimir J. van der Laan <laanwj@gmail.com>
4 years agoetnaviv: fix varying interpolation
Lucas Stach [Thu, 8 Jun 2017 15:01:40 +0000 (17:01 +0200)]
etnaviv: fix varying interpolation

It seems that newer cores don't use the PA_ATTRIBUTES to decide if the
varying should bypass the flat shading, but derive this from the component
use. This fixes flat shading on GC880+.

VARYING_COMPONENT_USE_POINTCOORD is a bit of a misnomer now, as it isn't
only used for pointcoords, but missing a better name I left it as-is.

Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Reviewed-by: Wladimir J. van der Laan <laanwj@gmail.com>
4 years agoetnaviv: fix bogus flush requests in transfer handling
Lucas Stach [Tue, 26 Sep 2017 16:27:55 +0000 (18:27 +0200)]
etnaviv: fix bogus flush requests in transfer handling

The logic to decide if we need to flush the GPU command stream was broken
and hard to reason about. Fix and clarify this.

Fixes the data sync subtests from piglit arb_vertex_buffer_object.

Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Reviewed-by: Wladimir J. van der Laan <laanwj@gmail.com>
4 years agoi965/tes: account for the fact that dvec3/4 inputs take two slots
Iago Toral Quiroga [Mon, 9 Oct 2017 12:17:43 +0000 (14:17 +0200)]
i965/tes: account for the fact that dvec3/4 inputs take two slots

When computing the total size of the URB for tessellation evaluation
inputs we were not accounting for this, and instead we were always
assuming that each input would take a single vec4 slot, which could
lead to computing a smaller read size than required. Specifically, this
is a problem when the last input is a dvec3/4 such that its XY components
are stored in the the second half of a payload register (which can happen
if the offset for the input in the URB is not 64-bit aligned because
there are 32-bit inputs mixed in) and the ZW components in the
first half of the next, as in this case we would fail to account for the
extra slot required for the ZW components.

Fixes (requires another fix in CTS currently in review):
KHR-GL45.enhanced_layouts.varying_locations
KHR-GL45.enhanced_layouts.varying_array_locations

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
4 years agoanv: fix null pointer dereference
Tapani Pälli [Mon, 9 Oct 2017 05:17:15 +0000 (08:17 +0300)]
anv: fix null pointer dereference

CID: 1419033

Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
4 years agoradv: export KHR_relaxed_block_layout
Dave Airlie [Fri, 6 Oct 2017 01:28:29 +0000 (11:28 +1000)]
radv: export KHR_relaxed_block_layout

This seems to pass all the cts tests it enables.

Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Acked-by: Jason Ekstrand <jason@jlekstrand.net>
Signed-off-by: Dave Airlie <airlied@redhat.com>
4 years agonv50/ir: fix 64-bit integer shifts
Ilia Mirkin [Tue, 10 Oct 2017 00:42:59 +0000 (20:42 -0400)]
nv50/ir: fix 64-bit integer shifts

TGSI was adjusted to always pass in 64-bit integers but nouveau was left
with the old semantics. Update to the new thing.

Fixes: d10fbe5159 (st/glsl_to_tgsi: fix 64-bit integer bit shifts)
Reported-by: Karol Herbst <karolherbst@gmail.com>
Cc: mesa-stable@lists.freedesktop.org
4 years agoi965: silence coverity warning
Lionel Landwerlin [Thu, 5 Oct 2017 17:13:37 +0000 (18:13 +0100)]
i965: silence coverity warning

Also makes this statement a bit clearer.

CID: 1418920
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Antia Puentes <apuentes@igalia.com>
4 years agoanv: Do not assert() on VK_ATTACHMENT_UNUSED
Józef Kucia [Mon, 9 Oct 2017 20:42:06 +0000 (22:42 +0200)]
anv: Do not assert() on VK_ATTACHMENT_UNUSED

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Cc: mesa-stable@lists.freedesktop.org
4 years agospirv: Fix SpvOpAtomicISub
Józef Kucia [Mon, 9 Oct 2017 20:33:30 +0000 (22:33 +0200)]
spirv: Fix SpvOpAtomicISub

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Cc: mesa-stable@lists.freedesktop.org
4 years agoglsl: tidy up IR after loop unrolling
Timothy Arceri [Thu, 21 Sep 2017 23:23:15 +0000 (09:23 +1000)]
glsl: tidy up IR after loop unrolling

c7affbf6875622a enabled GLSLOptimizeConservatively on some
drivers. The idea was to speed up compile times by running
the GLSL IR passes only once each time do_common_optimization()
is called. However loop unrolling can create a big mess and
with large loops can actually case compile times to increase
significantly due to a bunch of redundant if statements being
propagated to other IRs.

Here we make sure to clean things up before moving on.

There was no measureable difference in shader-db compile times,
but it makes compile times of some piglit tests go from a couple
of seconds to basically instant.

The shader-db results seemed positive also:

Totals:
SGPRS: 2829456 -> 2828376 (-0.04 %)
VGPRS: 1720793 -> 1721457 (0.04 %)
Spilled SGPRs: 7707 -> 7707 (0.00 %)
Spilled VGPRs: 33 -> 33 (0.00 %)
Private memory VGPRs: 3140 -> 2060 (-34.39 %)
Scratch size: 3308 -> 2180 (-34.10 %) dwords per thread
Code Size: 79441464 -> 79214616 (-0.29 %) bytes
LDS: 436 -> 436 (0.00 %) blocks
Max Waves: 558670 -> 558571 (-0.02 %)
Wait states: 0 -> 0 (0.00 %)

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Tested-by: Dieter Nützel <Dieter@nuetzel-hh.de>
4 years agoglsl: make loop unrolling more like the nir unrolling path
Timothy Arceri [Mon, 4 Sep 2017 03:11:49 +0000 (13:11 +1000)]
glsl: make loop unrolling more like the nir unrolling path

The old code assumed that loop terminators will always be at
the start of the loop, resulting in otherwise unrollable
loops not being unrolled at all. For example the current
code would unroll:

  int j = 0;
  do {
     if (j > 5)
        break;

     ... do stuff ...

     j++;
  } while (j < 4);

But would fail to unroll the following as no iteration limit was
calculated because it failed to find the terminator:

  int j = 0;
  do {
     ... do stuff ...

     j++;
  } while (j < 4);

Also we would fail to unroll the following as we ended up
calculating the iteration limit as 6 rather than 4. The unroll
code then assumed we had 3 terminators rather the 2 as it
wasn't able to determine that "if (j > 5)" was redundant.

  int j = 0;
  do {
     if (j > 5)
        break;

     ... do stuff ...

     if (bool(i))
        break;

     j++;
  } while (j < 4);

This patch changes this pass to be more like the NIR unrolling pass.
With this change we handle loop terminators correctly and also
handle cases where the terminators have instructions in their
branches other than a break.

V2:
- fixed regression where loops with a break in else were never
  unrolled in v1.
- fixed confusing/wrong naming of bools in complex unrolling.

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Tested-by: Dieter Nützel <Dieter@nuetzel-hh.de>
4 years agoglsl: check if induction var incremented before use in terminator
Timothy Arceri [Thu, 21 Sep 2017 03:55:56 +0000 (13:55 +1000)]
glsl: check if induction var incremented before use in terminator

do-while loops can increment the starting value before the
condition is checked. e.g.

  do {
    ndx++;
  } while (ndx < 3);

This commit changes the code to detect this and reduces the
iteration count by 1 if found.

V2: fix terminator spelling

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Reviewed-by: Elie Tournier <elie.tournier@collabora.com>
Tested-by: Dieter Nützel <Dieter@nuetzel-hh.de>
4 years agoglsl: don't drop instructions from unreachable terminators continue branch
Timothy Arceri [Tue, 5 Sep 2017 05:59:07 +0000 (15:59 +1000)]
glsl: don't drop instructions from unreachable terminators continue branch

These instructions will be executed on every iteration of the loop
we cannot drop them.

V2:
- move removal of unreachable terminators from the terminator list
  to the same place they are removed from the IR as suggested by
  Nicolai.

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Tested-by: Dieter Nützel <Dieter@nuetzel-hh.de>
4 years agotravis: Add a travis profile for meson dri drivers
Dylan Baker [Wed, 4 Oct 2017 00:36:17 +0000 (17:36 -0700)]
travis: Add a travis profile for meson dri drivers

Signed-off-by: Dylan Baker <dylanx.c.baker@intel.com>
4 years agotravis: don't run ninja test for meson
Dylan Baker [Wed, 4 Oct 2017 18:38:04 +0000 (11:38 -0700)]
travis: don't run ninja test for meson

This pulls in tons of extra dependencies because the tests are not
properly guarded.

v2: - Put this patch before the one that adds a loader/dri test for
      meson

Signed-off-by: Dylan Baker <dylanx.c.baker@intel.com>
4 years agomeson: build classic swrast
Dylan Baker [Wed, 4 Oct 2017 00:06:22 +0000 (17:06 -0700)]
meson: build classic swrast

This adds support for building the classic swrast implementation. This
driver has been tested with glxinfo and glxgears.

Signed-off-by: Dylan Baker <dylanx.c.baker@intel.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
4 years agomeson: build gbm
Dylan Baker [Thu, 28 Sep 2017 22:53:53 +0000 (15:53 -0700)]
meson: build gbm

This doesn't include egl support, just dri support.

v2: - when gbm is set to 'auto', only build if a dri driver is also
      enabled
    - Fix conditional to check for x11 modules with vulkan as well as
      with dri drivers
v3: - Set pkgconfig libraries.private value

Signed-off-by: Dylan Baker <dylanx.c.baker@intel.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
4 years agomeson: Add support for configuring dri drivers directory.
Dylan Baker [Thu, 28 Sep 2017 20:59:04 +0000 (13:59 -0700)]
meson: Add support for configuring dri drivers directory.

v2: - drop with_ from dri_drivers_path variable (Eric A)
v3: - Move HAVE_X11_PLATFORM to the proper patch (Eric A)

Signed-off-by: Dylan Baker <dylanx.c.baker@intel.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
4 years agomeson: build glx
Dylan Baker [Fri, 22 Sep 2017 19:55:00 +0000 (12:55 -0700)]
meson: build glx

This gets GLX and the loader building. The resulting GLX and i965 have
been tested on piglit and seem to work fine. This patch leaves a lot of
todo's in it's wake, GLX is quite complicated, and the build options
involved are many, and the goal at the moment is to get dri and gallium
drivers building.

v2: - fix typo "vaule" -> "value"
    - put the not on the correct element of the conditional
    - Put correct description of dri3 option in this patch not the next
      one (Eric A)
    - fix non glvnd version (Eric A)
    - build glx tests
    - move loader include variables to this patch (Eric A)
v3: - set the version correctly for GL_LIB_NAME in libglx
v4: - set pkgconfig private fields

Signed-off-by: Dylan Baker <dylanx.c.baker@intel.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
4 years agomeson: Build i965 and dri stack
Dylan Baker [Thu, 21 Sep 2017 03:11:32 +0000 (20:11 -0700)]
meson: Build i965 and dri stack

This gets pretty much the entire classic tree building, as well as
i965, including the various glapis. There are some workarounds for bugs
that are fixed in meson 0.43.0, which is due out on October 8th.

I have tested this with piglit using glx.

v2: - fix typo "vaule" -> "value"
    - use gtest dep instead of linking to libgtest (rebase error)
    - use gtest dep instead of linking against libgtest (rebase error)
    - copy the megadriver, then create hard links from that, then delete
      the megadriver. This matches the behavior of the autotools build.
      (Eric A)
    - Use host_machine instead of target_machine (Eric A)
    - Put a comment in the right place (Eric A)
    - Don't have two variables for the same information (Eric A)
    - Put pre_args at top of file in this patch (Eric A)
    - Fix glx generators in this patch instead of next (Eric A)
    - Remove -DMESON hack (Eric A)
    - add sha1_h to mesa in this patch (Eric A)
    - Put generators in loops when possible to reduce code in
      mapi/glapi/gen (Eric A)
v3: - put HAVE_X11_PLATFORM in this patch

Signed-off-by: Dylan Baker <dylanx.c.baker@intel.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
4 years agomeson: de-tabularize meson_options.txt
Dylan Baker [Wed, 4 Oct 2017 23:18:34 +0000 (16:18 -0700)]
meson: de-tabularize meson_options.txt

This ends up being unworkable as more options get added, and with
description wrapped onto a new line it doesn't improve readability
anyway.

Signed-off-by: Dylan Baker <dylanx.c.baker@intel.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
4 years agomeson: only require libelf if building radv
Dylan Baker [Wed, 4 Oct 2017 18:36:06 +0000 (11:36 -0700)]
meson: only require libelf if building radv

And add a todo about clover, r600, and radeonsi, which also need libelf.

Signed-off-by: Dylan Baker <dylanx.c.baker@intel.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
4 years agomeson: add nir_linking_helpers.c to libnir
Dylan Baker [Wed, 4 Oct 2017 23:50:50 +0000 (16:50 -0700)]
meson: add nir_linking_helpers.c to libnir

This was missed in a rebase, and doesn't affect radv or anv, only i965.

Signed-off-by: Dylan Baker <dylanx.c.baker@intel.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
4 years agomake: Fix test to be meson compatible
Dylan Baker [Wed, 4 Oct 2017 23:11:34 +0000 (16:11 -0700)]
make: Fix test to be meson compatible

This has the same problem as the previous commit, generated headers and
hardcoded paths.

Signed-off-by: Dylan Baker <dylanx.c.baker@intel.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
4 years agomake: Don't traverse backwards through include directories.
Dylan Baker [Wed, 4 Oct 2017 22:33:18 +0000 (15:33 -0700)]
make: Don't traverse backwards through include directories.

Traversing back through includes is bad idea and should be avoided.
In the case here - indirect_size.h is located in the build directory
$(top_builddir)/src/glx/.

v3: - Update commit message with message provided by Emil

Signed-off-by: Dylan Baker <dylanx.c.baker@intel.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
4 years agoeditorconfig: Add meson configuration
Dylan Baker [Sat, 30 Sep 2017 15:47:24 +0000 (08:47 -0700)]
editorconfig: Add meson configuration

Signed-off-by: Dylan Baker <dylanx.c.baker@intel.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
4 years agoetnaviv: call util_query_clear_result(..) in the generic layer
Christian Gmeiner [Sun, 8 Oct 2017 20:00:07 +0000 (22:00 +0200)]
etnaviv: call util_query_clear_result(..) in the generic layer

Saves us from calling util_query_clear_result(..) in every query
type implementation.

Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Reviewed-by: Wladimir J. van der Laan <laanwj@gmail.com>
4 years agoetnaviv: push query active handling into generic layer
Christian Gmeiner [Sun, 8 Oct 2017 20:00:06 +0000 (22:00 +0200)]
etnaviv: push query active handling into generic layer

We want the same active handling for every query type. So lets
handle it in the generic layer.

Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Reviewed-By: Wladimir J. van der Laan <laanwj@gmail.com>
4 years agor600: drop a bunch of post-cayman code. (v2)
Dave Airlie [Mon, 9 Oct 2017 03:30:02 +0000 (13:30 +1000)]
r600: drop a bunch of post-cayman code. (v2)

Now that Marek has split the two drivers apart, drop a bunch
of unnecessary code from the r600 half. There is probably a bunch
more hiding in the video code.

No piglit regressions on caicos.

v2: fix HAVE_LLVM protected code
Acked-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Acked-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
4 years agoamd: move r600d_common.h into r600g
Marek Olšák [Sat, 7 Oct 2017 22:41:04 +0000 (00:41 +0200)]
amd: move r600d_common.h into r600g

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
4 years agoradeonsi: shrink r600d_common.h and stop using it
Marek Olšák [Sat, 7 Oct 2017 22:03:10 +0000 (00:03 +0200)]
radeonsi: shrink r600d_common.h and stop using it

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
4 years agoradeonsi: import cayman_msaa.c from drivers/radeon
Marek Olšák [Sat, 7 Oct 2017 21:33:44 +0000 (23:33 +0200)]
radeonsi: import cayman_msaa.c from drivers/radeon

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
4 years agoradeonsi: remove r600_emit_reloc
Marek Olšák [Sat, 7 Oct 2017 21:08:33 +0000 (23:08 +0200)]
radeonsi: remove r600_emit_reloc

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
4 years agoradeonsi: merge si_set_streamout_targets with si_common_set_streamout_targets
Marek Olšák [Sat, 7 Oct 2017 21:06:11 +0000 (23:06 +0200)]
radeonsi: merge si_set_streamout_targets with si_common_set_streamout_targets

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
4 years agoradeonsi: add si_so_target_reference
Marek Olšák [Sat, 7 Oct 2017 21:04:25 +0000 (23:04 +0200)]
radeonsi: add si_so_target_reference

The src type is different on purpose.

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
4 years agoradeonsi: import r600_streamout from drivers/radeon
Marek Olšák [Sat, 7 Oct 2017 20:54:31 +0000 (22:54 +0200)]
radeonsi: import r600_streamout from drivers/radeon

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
4 years agoradeonsi: add performance thresholds for CP DMA, decrease it for clears
Marek Olšák [Sat, 7 Oct 2017 18:50:16 +0000 (20:50 +0200)]
radeonsi: add performance thresholds for CP DMA, decrease it for clears

The first one isn't used yet.

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
4 years agoradeonsi: disable primitive binning on Vega10 (v2)
Marek Olšák [Thu, 5 Oct 2017 23:01:11 +0000 (01:01 +0200)]
radeonsi: disable primitive binning on Vega10 (v2)

Our driver implementation is known to decrease performance for some tests,
but we don't know if any apps and benchmarks (e.g. those tested by Phoronix)
are affected. This disables the feature just to be safe.

Set this to enable partial primitive binning:
    R600_DEBUG=dpbb
Set this to enable full primitive binning:
    R600_DEBUG=dpbb,dfsm

v2: add new debug options

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
4 years agoradeonsi: enumerize DBG flags
Marek Olšák [Sat, 7 Oct 2017 16:10:26 +0000 (18:10 +0200)]
radeonsi: enumerize DBG flags

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
4 years agodrirc: whitelist glthread for Spec Ops: The Line
Marek Olšák [Mon, 9 Oct 2017 13:42:22 +0000 (15:42 +0200)]
drirc: whitelist glthread for Spec Ops: The Line

On i7 4790k and a 280X, there is a boost of about 10% more FPS.

Nominated by John Ettedgui.

4 years agoradv: configure VGT_VERTEX_REUSE at pipeline creation
Samuel Pitoiset [Fri, 6 Oct 2017 07:53:21 +0000 (09:53 +0200)]
radv: configure VGT_VERTEX_REUSE at pipeline creation

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
4 years agoradv: do not need to zero-init ds/raster states
Samuel Pitoiset [Fri, 6 Oct 2017 07:53:20 +0000 (09:53 +0200)]
radv: do not need to zero-init ds/raster states

Already done when creating the pipeline.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
4 years agoradv: remove unused fields in radv_raster_state
Samuel Pitoiset [Fri, 6 Oct 2017 07:53:19 +0000 (09:53 +0200)]
radv: remove unused fields in radv_raster_state

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
4 years agoradv: set ALPHA_TO_MASK_ENABLE at blend state init
Samuel Pitoiset [Fri, 6 Oct 2017 13:39:01 +0000 (15:39 +0200)]
radv: set ALPHA_TO_MASK_ENABLE at blend state init

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
4 years agoradv: emit PA_SU_POINT_{SIZE,MINMAX} in si_emit_config()
Samuel Pitoiset [Fri, 6 Oct 2017 13:39:00 +0000 (15:39 +0200)]
radv: emit PA_SU_POINT_{SIZE,MINMAX} in si_emit_config()

These registers don't change during the lifetime of the
command buffer, there is no need to re-emit them when
binding a new pipeline.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
4 years agoradv: allow launching waves out-of-order for compute
Samuel Pitoiset [Fri, 6 Oct 2017 14:03:15 +0000 (16:03 +0200)]
radv: allow launching waves out-of-order for compute

Ported from RadeonSI, and -pro seems to enable it as well.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Acked-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
4 years agoanv/wsi: Allocate enough memory for the entire image
Jason Ekstrand [Sat, 7 Oct 2017 21:37:50 +0000 (14:37 -0700)]
anv/wsi: Allocate enough memory for the entire image

Previously, we allocated memory for image->plane[0].surface.isl.size
which is great if there is no compression.  However, on BDW, we can do
CCS_D on X-tiled images so we also have to allocate space for the
auxiliary buffer.  This fixes hangs in some of the WSI CTS tests and
should also reduce hangs in real applications.  In particular, it fixes
the dEQP-VK.wsi.*.incremental_present.* test group.

When we hand the image off to X11 or Wayland, it will ignore the CCS
entirely which is ok because we do a resolve when it's transitioned to
VK_IMAGE_LAYOUT_PRESENT_SRC_KHR.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Cc: mesa-stable@lists.freedesktop.org
4 years agoanv: fix nir.h include
Lionel Landwerlin [Sat, 7 Oct 2017 18:29:18 +0000 (19:29 +0100)]
anv: fix nir.h include

All over mesa we include "nir/nir.h", we should probably do the same
here. This fixes the meson build that was broken by the ycbcr series.

Thanks to Dylan for finding the issue.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes: f3e91e78a337 ("anv: add nir lowering pass for ycbcr textures")
Reviewed-by: Dylan Baker <dylan@pnwbakers.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
4 years agospirv: Don't warn on the ImageCubeArray capability
Jason Ekstrand [Fri, 6 Oct 2017 03:47:29 +0000 (20:47 -0700)]
spirv: Don't warn on the ImageCubeArray capability

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
4 years agomesa: make glFramebuffer* check immutable texture level bounds
Kenneth Graunke [Sat, 7 Oct 2017 18:19:42 +0000 (11:19 -0700)]
mesa: make glFramebuffer* check immutable texture level bounds

When a texture is immutable, we can't tack on extra levels
after-the-fact like we could with glTexImage. So check against that
level limit and return an error if it's surpassed.

This fixes:
KHR-GL45.geometry_shader.layered_fbo.fb_texture_invalid_level_number

(Based on a patch by Ilia Mirkin.)

Reviewed-by: Antia Puentes <apuentes@igalia.com> [imirkin v2]
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
4 years agoradeonsi: don't change viewport for blits, use window-space positions
Marek Olšák [Thu, 5 Oct 2017 19:29:35 +0000 (21:29 +0200)]
radeonsi: don't change viewport for blits, use window-space positions

The viewport state was an identity anyway.

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
4 years agoradeonsi: set correct PA_SC_VPORT_ZMIN/ZMAX when viewport is disabled
Marek Olšák [Thu, 5 Oct 2017 22:19:22 +0000 (00:19 +0200)]
radeonsi: set correct PA_SC_VPORT_ZMIN/ZMAX when viewport is disabled

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
4 years agoradeonsi: minor cleanup of si_update_vs_writes_viewport_index
Marek Olšák [Thu, 5 Oct 2017 22:14:17 +0000 (00:14 +0200)]
radeonsi: minor cleanup of si_update_vs_writes_viewport_index

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
4 years agoradeonsi: don't save and restore vertex buffers and elements for u_blitter
Marek Olšák [Thu, 5 Oct 2017 18:36:34 +0000 (20:36 +0200)]
radeonsi: don't save and restore vertex buffers and elements for u_blitter

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
4 years agoradeonsi: use new VS blit shaders (VS inputs in SGPRs)
Marek Olšák [Thu, 5 Oct 2017 18:28:29 +0000 (20:28 +0200)]
radeonsi: use new VS blit shaders (VS inputs in SGPRs)

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
4 years agoradeonsi: add VS blit shader creation
Marek Olšák [Thu, 5 Oct 2017 18:05:44 +0000 (20:05 +0200)]
radeonsi: add VS blit shader creation

no users yet

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
4 years agoradeonsi: split declare_default_desc_pointers
Marek Olšák [Thu, 5 Oct 2017 01:12:21 +0000 (03:12 +0200)]
radeonsi: split declare_default_desc_pointers

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
4 years agogallium/u_blitter: let drivers decide which VS to use for draw_rectangle
Marek Olšák [Thu, 5 Oct 2017 02:02:05 +0000 (04:02 +0200)]
gallium/u_blitter: let drivers decide which VS to use for draw_rectangle

This approach allows drivers to set their own vertex shader and skip
compilation of u_blitter vertex shaders.

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
4 years agogallium/u_blitter: let drivers set the vertex elements state
Marek Olšák [Thu, 5 Oct 2017 00:38:35 +0000 (02:38 +0200)]
gallium/u_blitter: let drivers set the vertex elements state

radeonsi won't set it.

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
4 years agogallium/u_blitter: remove blitter_context_priv::viewport
Marek Olšák [Thu, 5 Oct 2017 00:08:05 +0000 (02:08 +0200)]
gallium/u_blitter: remove blitter_context_priv::viewport

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
4 years agoradeonsi: don't use util_draw_arrays_instanced in si_draw_rectangle
Marek Olšák [Wed, 4 Oct 2017 23:54:30 +0000 (01:54 +0200)]
radeonsi: don't use util_draw_arrays_instanced in si_draw_rectangle

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
4 years agoradeonsi: move si_draw_rectangle into si_state_draw.c
Marek Olšák [Wed, 4 Oct 2017 23:48:51 +0000 (01:48 +0200)]
radeonsi: move si_draw_rectangle into si_state_draw.c

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
4 years agoradeonsi: remove wrappers si_decompress_xx_textures
Marek Olšák [Thu, 5 Oct 2017 00:05:33 +0000 (02:05 +0200)]
radeonsi: remove wrappers si_decompress_xx_textures

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
4 years agogallium/radeon: remove r600_atom::num_dw
Marek Olšák [Wed, 4 Oct 2017 23:34:36 +0000 (01:34 +0200)]
gallium/radeon: remove r600_atom::num_dw

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
4 years agogallium/radeon: remove old r600g code checking chip_class and family
Marek Olšák [Wed, 4 Oct 2017 23:24:52 +0000 (01:24 +0200)]
gallium/radeon: remove old r600g code checking chip_class and family

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
4 years agost/va: Implement vaExportSurfaceHandle()
Mark Thompson [Sun, 1 Oct 2017 17:40:45 +0000 (18:40 +0100)]
st/va: Implement vaExportSurfaceHandle()

This is a new interface in libva2 to support wider use-cases of passing
surfaces to external APIs.  In particular, this allows export of NV12 and
P010 surfaces.

v2: Convert surfaces to progressive before exporting them (Christian).

v3: Set destination rectangle to match source when converting (Leo).
    Add guards to allow building with libva1.

Signed-off-by: Mark Thompson <sw@jkqxz.net>
Acked-by: Christian König <christian.koenig@amd.com>
Acked-and-Tested-by: Leo Liu <leo.liu@amd.com>
4 years agogallivm: don't use pabs intrinsic with llvm version >= 6
Roland Scheidegger [Fri, 6 Oct 2017 22:52:58 +0000 (00:52 +0200)]
gallivm: don't use pabs intrinsic with llvm version >= 6

The intrinsic is gone, causing shader compilation to crash.
While here, also change the fallback code to match what llvm's auto-updater
of these intrinsics would do (except that there will still be zext/trunc
instructions in there), which should ensure that the sequence gets recognized
and fused back into a pabs in the end (I didn't test this, and it's possible
even the old sequence would get recognized, but I don't see a reason why we
shouldn't use the same sequence in any case).

Tested-by: Vinson Lee <vlee@freedesktop.org>
4 years agoswr/rast: use proper alignment for debug transposedPrims
Tim Rowley [Tue, 3 Oct 2017 20:23:44 +0000 (15:23 -0500)]
swr/rast: use proper alignment for debug transposedPrims

Causing a crash in ParaView waveletcontour.py test when
_DEBUG defined due to vector aligned copy with unaligned
address.

Reviewed-by: Bruce Cherniak <bruce.cherniak@intel.com>
4 years agoanv/cmd_buffer: Reset state in cmd_buffer_destroy
Lionel Landwerlin [Thu, 28 Sep 2017 22:57:45 +0000 (23:57 +0100)]
anv/cmd_buffer: Reset state in cmd_buffer_destroy

This ensures that everything gets cleaned up properly. In particular,
it fixes a memory leak where we were leaking the push constants
structs.

Valgrind stats on
dEQP-VK.pipeline.push_constant.graphics_pipeline.range_size_128 :

Before:
HEAP SUMMARY:
    in use at exit: 2,467,513 bytes in 1,305 blocks
  total heap usage: 697,853 allocs, 696,530 frees, 138,466,600 bytes allocated

LEAK SUMMARY:
   definitely lost: 1,068 bytes in 11 blocks
   indirectly lost: 24,669 bytes in 412 blocks
     possibly lost: 0 bytes in 0 blocks
   still reachable: 2,441,776 bytes in 882 blocks
        suppressed: 0 bytes in 0 blocks

After:
HEAP SUMMARY:
    in use at exit: 2,467,381 bytes in 1,304 blocks
  total heap usage: 697,853 allocs, 696,531 frees, 138,466,600 bytes allocated

LEAK SUMMARY:
   definitely lost: 936 bytes in 10 blocks
   indirectly lost: 24,669 bytes in 412 blocks
     possibly lost: 0 bytes in 0 blocks
   still reachable: 2,441,776 bytes in 882 blocks
        suppressed: 0 bytes in 0 blocks

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Cc: "17.2 17.1" <mesa-stable@lists.freedesktop.org>
4 years agoanv/cmd_buffer: fix push descriptors with set > 0
Lionel Landwerlin [Wed, 27 Sep 2017 13:16:04 +0000 (14:16 +0100)]
anv/cmd_buffer: fix push descriptors with set > 0

When writing to set > 0, we were just wrongly writing to set 0. This
commit fixes this by lazily allocating each set as we write to them.

We didn't go for having them directly into the command buffer as this
would require an additional ~45Kb per command buffer.

v2: Allocate push descriptors from system memory rather than in BO
    streams. (Lionel)

Cc: "17.2 17.1" <mesa-stable@lists.freedesktop.org>
Fixes: 9f60ed98e501 ("anv: add VK_KHR_push_descriptor support")
Reported-by: Daniel Ribeiro Maciel <daniel.maciel@gmail.com>
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
4 years agoanv: enable VK_KHR_sampler_ycbcr_conversion
Lionel Landwerlin [Mon, 19 Jun 2017 15:57:00 +0000 (16:57 +0100)]
anv: enable VK_KHR_sampler_ycbcr_conversion

v2: Make GetImageMemoryRequirements2KHR() iterate over all pInfo
    structs (Lionel)
    Handle VkSamplerYcbcrConversionImageFormatPropertiesKHR (Andrew/Jason)
    Iterator over BindImageMemory2KHR's pNext structs correctly (Jason)

v3: Revert GetImageMemoryRequirements2KHR() change from v2 (Jason)

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
4 years agoanv: enable multiple planes per image/imageView
Lionel Landwerlin [Wed, 19 Jul 2017 11:14:19 +0000 (12:14 +0100)]
anv: enable multiple planes per image/imageView

This change introduce the concept of planes for image & views. It
matches the planes available in new formats.

We also refactor depth & stencil support through the usage of planes
for the sake of uniformity. In the backend (genX_cmd_buffer.c) we have
to take some care though with regard to auxilliary surfaces.
Multiplanar color buffers can have multiple auxilliary surfaces but
depth & stencil share the same HiZ one (only store in the depth
plane).

v2: by Jason
    Remove unused aspect parameters from anv_blorp.c
    Assert when attempting to resolve YUV images
    Drop redundant logic for plane offset in make_surface()
    Rework anv_foreach_plane_aspect_bit()

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
4 years agoanv: Take an image in can_sample_with_hiz
Jason Ekstrand [Thu, 5 Oct 2017 19:36:16 +0000 (12:36 -0700)]
anv: Take an image in can_sample_with_hiz

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
4 years agoanv: Take a single aspect in anv_layout_to_aux_usage
Jason Ekstrand [Thu, 5 Oct 2017 19:20:40 +0000 (12:20 -0700)]
anv: Take a single aspect in anv_layout_to_aux_usage

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
4 years agoanv/cmd_buffer: Make get_fast_clear_state return an address
Jason Ekstrand [Thu, 5 Oct 2017 18:42:33 +0000 (11:42 -0700)]
anv/cmd_buffer: Make get_fast_clear_state return an address

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
4 years agoanv/blorp: Add a concept of default aux usage
Jason Ekstrand [Thu, 5 Oct 2017 18:22:47 +0000 (11:22 -0700)]
anv/blorp: Add a concept of default aux usage

A good chunk of anv_blorp just wants the aux usage from the image.  This
magic aux_usage value means just that.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
4 years agoanv: add nir lowering pass for ycbcr textures
Lionel Landwerlin [Mon, 19 Jun 2017 15:56:47 +0000 (16:56 +0100)]
anv: add nir lowering pass for ycbcr textures

This pass implements all the implicit conversions required by the
VK_KHR_sampler_ycbcr_conversion specification.

It also inserts plane sources onto sampling instructions that we then
let the pipeline layout pass deal with, when mapping things correctly
to descriptors.

v2: Add new file to meson build (Lionel)
    Use nir_frcp() rather than (1.0f / x) (Jason)
    Reuse nir_tex_instr_dest_size() rather than handwritten one (Jason)
    Return progress (Jason)
    Account for array of samplers (Jason)

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
4 years agoanv: prepare sampler emission code for multiplanar images
Lionel Landwerlin [Mon, 25 Sep 2017 17:47:33 +0000 (18:47 +0100)]
anv: prepare sampler emission code for multiplanar images

New settings from the KHR_sampler_ycbcr_conversion specifications
might require different sampler settings for luma and chroma planes.
This change makes the sampler table emission ready to handle multiple
planes.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
4 years agoanv/apply_pipeline_layout: Prepare for multi-planar images
Lionel Landwerlin [Mon, 25 Sep 2017 17:46:16 +0000 (18:46 +0100)]
anv/apply_pipeline_layout: Prepare for multi-planar images

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
4 years agoanv: add new formats KHR_sampler_ycbcr_conversion
Lionel Landwerlin [Tue, 14 Mar 2017 17:22:36 +0000 (17:22 +0000)]
anv: add new formats KHR_sampler_ycbcr_conversion

Adding new downsampling factors for each planes.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
4 years agoanv: modify the internal concept of format to express multiple planes
Lionel Landwerlin [Tue, 14 Mar 2017 17:20:07 +0000 (17:20 +0000)]
anv: modify the internal concept of format to express multiple planes

A given Vulkan format can now be decomposed into a set of planes. We
now use 'struct anv_format_plane' to represent the format of those
planes.

v2: by Jason
    Rename anv_get_plane_format() to anv_get_format_plane()
    Don't rename anv_get_isl_format()
    Replace ds_fmt() by fmt2()
    Introduce fmt_unsupported()

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
4 years agoanv: prepare formats to handle disjoints sets
Lionel Landwerlin [Mon, 25 Sep 2017 17:10:20 +0000 (18:10 +0100)]
anv: prepare formats to handle disjoints sets

Newer format enums start at offset 1000000000, making it impossible to
have them all in one table. This change splits the formats into sets
that we then access through indirection.

v2: rename format_extract to vk_to_anv_format (Chad/Jason)

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
4 years agoisl: fill out layout descriptions for yuv formats
Lionel Landwerlin [Thu, 20 Jul 2017 19:40:41 +0000 (20:40 +0100)]
isl: fill out layout descriptions for yuv formats

Some description was missing.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
4 years agoisl: check whether a format is rgb if colorspace is yuv
Lionel Landwerlin [Tue, 3 Oct 2017 18:10:41 +0000 (19:10 +0100)]
isl: check whether a format is rgb if colorspace is yuv

Suggested by Chad.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
4 years agoisl: make format layout channels accessible by index
Lionel Landwerlin [Tue, 6 Jun 2017 19:00:46 +0000 (20:00 +0100)]
isl: make format layout channels accessible by index

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Chad Versace <chadversary@chromium.org>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
4 years agovulkan: util: add macros to extract extension/offset number from enums
Lionel Landwerlin [Tue, 14 Mar 2017 17:17:12 +0000 (17:17 +0000)]
vulkan: util: add macros to extract extension/offset number from enums

v2: Simplify offset enum computation (Jason)

v3: capitalize macros (Chad)

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
4 years agoradv: convert all COMPUTE operations to the RADV_META_SAVE_XXX flags
Samuel Pitoiset [Tue, 3 Oct 2017 13:11:21 +0000 (15:11 +0200)]
radv: convert all COMPUTE operations to the RADV_META_SAVE_XXX flags

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
4 years agoradv: add RADV_META_SAVE_COMPUTE_PIPELINE flag
Samuel Pitoiset [Tue, 3 Oct 2017 12:47:32 +0000 (14:47 +0200)]
radv: add RADV_META_SAVE_COMPUTE_PIPELINE flag

This will allow use to merge the compute save/restore helpers.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
4 years agoradv: add radv_meta_save() helper
Samuel Pitoiset [Tue, 3 Oct 2017 12:37:56 +0000 (14:37 +0200)]
radv: add radv_meta_save() helper

And merge radv_meta_save_novertex() with
radv_meta_save_graphics_reset_vport_scissor_novertex().

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
4 years agoradv: merge radv_meta_{save,restore}_pass() with RADV_META_SAVE_PASS
Samuel Pitoiset [Tue, 3 Oct 2017 12:26:38 +0000 (14:26 +0200)]
radv: merge radv_meta_{save,restore}_pass() with RADV_META_SAVE_PASS

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
4 years agoradv: convert all GFX operations to the RADV_META_SAVE_XXX flags
Samuel Pitoiset [Tue, 3 Oct 2017 12:23:48 +0000 (14:23 +0200)]
radv: convert all GFX operations to the RADV_META_SAVE_XXX flags

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
4 years agoradv: introduce the concept of meta save flags
Samuel Pitoiset [Tue, 3 Oct 2017 12:12:05 +0000 (14:12 +0200)]
radv: introduce the concept of meta save flags

This will allow us to save/restore the different states on-demand
based on the meta operation. For now, this saves/restores all
states. Compute will follow once the graphics part is done.

The main idea is to merge all save/restore helpers.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
4 years agoradv: remove unused RADV_META_VERTEX_BINDING_COUNT
Samuel Pitoiset [Tue, 3 Oct 2017 09:31:57 +0000 (11:31 +0200)]
radv: remove unused RADV_META_VERTEX_BINDING_COUNT

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
4 years agoradv: select the pipeline outside of the loop when decompressing htile
Samuel Pitoiset [Tue, 3 Oct 2017 09:08:03 +0000 (11:08 +0200)]
radv: select the pipeline outside of the loop when decompressing htile

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
4 years agoradv: add radv_htile_enabled() helper
Samuel Pitoiset [Tue, 3 Oct 2017 08:48:42 +0000 (10:48 +0200)]
radv: add radv_htile_enabled() helper

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
4 years agoi965: pass wanted format to intel_miptree_create_for_dri_image
Tapani Pälli [Wed, 4 Oct 2017 13:32:05 +0000 (16:32 +0300)]
i965: pass wanted format to intel_miptree_create_for_dri_image

Change b3a44ae7a4 caused regressions on Android where DRI and renderbuffer
can disagree on the format being used. This patch removes the colorspace
parameter and instead we pass renderbuffer format. For non-winsys images we
still do srgb/linear modification in same manner as change b3a44ae7a4 wanted
but take format from renderbuffer instead of DRI image.

This patch fixes regressions seen with following test sets:

   dEQP-EGL.functional.color_clears*
   dEQP-EGL.functional.render*

Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=102999
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
4 years agoradeonsi: add a drirc workaround for HTILE corruption in ARK: Survival Evolved
Marek Olšák [Tue, 3 Oct 2017 17:28:48 +0000 (19:28 +0200)]
radeonsi: add a drirc workaround for HTILE corruption in ARK: Survival Evolved

v2: use DB_META | PS_PARTIAL_FLUSH

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=102955
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com> (v1)
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com> (v1)
4 years agoradeonsi: inline struct si_sampler_views
Marek Olšák [Mon, 2 Oct 2017 15:07:52 +0000 (17:07 +0200)]
radeonsi: inline struct si_sampler_views

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
4 years agoradeonsi: rename si_textures_info -> si_samplers, si_images_info -> si_images
Marek Olšák [Mon, 2 Oct 2017 15:03:01 +0000 (17:03 +0200)]
radeonsi: rename si_textures_info -> si_samplers, si_images_info -> si_images

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>