mesa.git
5 years agonir: Merge redudant integer clamping.
Markus Wick [Sat, 9 Apr 2016 01:31:16 +0000 (03:31 +0200)]
nir: Merge redudant integer clamping.

Dolphin uses them a lot. Range tracking would be better in the long term,
but this two lines works fine for now.

Signed-off-by: Markus Wick <markus@selfnet.de>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
5 years agoi965: Port INTEL_PRECISE_TRIG=1 to NIR.
Kenneth Graunke [Thu, 7 Apr 2016 22:04:35 +0000 (15:04 -0700)]
i965: Port INTEL_PRECISE_TRIG=1 to NIR.

This makes the extra multiply visible to NIR's algebraic optimizations
(for constant reassociation) as well as constant folding.  This means
that when the result of sin/cos are multiplied by an constant, we can
eliminate the extra multiply altogether, reducing the cost of the
workaround.

It also means we only have to implement it one place, rather than in
both backends.

This makes INTEL_PRECISE_TRIG=1 cost nothing on GPUTest/Volplosion,
which has a ton of sin() calls, but always multiplies them by an
immediate constant.  The extra multiply gets folded away.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Eduardo Lima Mitev <elima@igalia.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Matt Turner <mattst88@gmail.com>
5 years agoi965: Pass brw_compiler into brw_preprocess_nir() instead of is_scalar.
Kenneth Graunke [Thu, 7 Apr 2016 22:09:56 +0000 (15:09 -0700)]
i965: Pass brw_compiler into brw_preprocess_nir() instead of is_scalar.

I want to be able to read other fields.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Reviewed-by: Eduardo Lima Mitev <elima@igalia.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Matt Turner <mattst88@gmail.com>
5 years agonir: Silence unused "options" warning in algebraic passes.
Kenneth Graunke [Thu, 7 Apr 2016 22:03:39 +0000 (15:03 -0700)]
nir: Silence unused "options" warning in algebraic passes.

Some passes may not refer to options->..., at which point the compiler
will warn about an unused variable.  Just cast to void unconditionally
to shut it up.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Eduardo Lima Mitev <elima@igalia.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Matt Turner <mattst88@gmail.com>
5 years agonir: Do basic constant reassociation.
Kenneth Graunke [Thu, 7 Apr 2016 05:34:39 +0000 (22:34 -0700)]
nir: Do basic constant reassociation.

Many shaders contain expression trees of the form:

    const_1 * (value * const_2)

Reorganizing these to

    (const_1 * const_2) * value

will allow constant folding to combine the constants.  Sometimes, these
constants are 2 and 0.5, so we can remove a multiply altogether.  Other
times, it can create more immediate constants, which can actually hurt.

Finding a good balance here is tricky.  While much more could be done,
this simple patch seems to have a lot of positive benefit while having
a low downside.

shader-db results on Broadwell:

total instructions in shared programs: 8963768 -> 8961369 (-0.03%)
instructions in affected programs: 438318 -> 435919 (-0.55%)
helped: 1502
HURT: 245

total cycles in shared programs: 71527354 -> 71421516 (-0.15%)
cycles in affected programs: 11541788 -> 11435950 (-0.92%)
helped: 3445
HURT: 1224

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Eduardo Lima Mitev <elima@igalia.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Matt Turner <mattst88@gmail.com>
5 years agoradeon/uvd: alignment fix for decode message buffer
Boyuan Zhang [Fri, 8 Apr 2016 15:31:15 +0000 (11:31 -0400)]
radeon/uvd: alignment fix for decode message buffer

Signed-off-by: Boyuan Zhang <boyuan.zhang@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
5 years agost/mesa: replace _mesa_sysval_to_semantic table with function
Brian Paul [Mon, 11 Apr 2016 22:29:02 +0000 (16:29 -0600)]
st/mesa: replace _mesa_sysval_to_semantic table with function

Instead of using an array indexed by SYSTEM_VALUE_x, just use a
switch statement.  This fixes a regression caused by inserting new
SYSTEM_VALUE_ enums but not updating the mapping to TGSI semantics.

v2: fix a few switch statement mistakes for compute-related enums

Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
5 years agonir/lower_system_values: Add support for several computed values
Jason Ekstrand [Fri, 25 Mar 2016 17:54:27 +0000 (10:54 -0700)]
nir/lower_system_values: Add support for several computed values

Reviewed-by: Rob Clark <robdclark@gmail.com>
5 years agoglsl/shader_enums: Add the other two compute builtins
Jason Ekstrand [Fri, 25 Mar 2016 17:51:23 +0000 (10:51 -0700)]
glsl/shader_enums: Add the other two compute builtins

These weren't added before because they are actually calculated values that
are computed from other inputs.  However, in order to handle them in
nir_lower_system_values, it's nice for them to have a cannonical locaiton.

Reviewed-by: Rob Clark <robdclark@gmail.com>
5 years agoglsl/shader_enums: Add an enum for Vulkan InstanceIndex
Jason Ekstrand [Fri, 25 Mar 2016 17:50:11 +0000 (10:50 -0700)]
glsl/shader_enums: Add an enum for Vulkan InstanceIndex

In Vulkan, you have InstanceIndex which begins at the base instance value
rather than the zero-based InstanceID of GL.

Reviewed-by: Rob Clark <robdclark@gmail.com>
5 years agomesa: add missing header to the tarball
Emil Velikov [Wed, 6 Apr 2016 12:07:04 +0000 (13:07 +0100)]
mesa: add missing header to the tarball

Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
5 years agodrivers/softpipe: add missing header to the tarball
Emil Velikov [Wed, 6 Apr 2016 12:06:26 +0000 (13:06 +0100)]
drivers/softpipe: add missing header to the tarball

Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
5 years agomesa: automake: update and reuse X86_SSE41_FILES list
Emil Velikov [Tue, 5 Apr 2016 14:50:28 +0000 (15:50 +0100)]
mesa: automake: update and reuse X86_SSE41_FILES list

Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
Acked-by: Jason Ekstrand <jason@jlekstrand.net>
5 years agocompiler: android: flesh out nir into separate makefile
Emil Velikov [Tue, 5 Apr 2016 13:48:20 +0000 (14:48 +0100)]
compiler: android: flesh out nir into separate makefile

Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
Acked-by: Jason Ekstrand <jason@jlekstrand.net>
5 years agocompiler: automake: flesh out NIR into separate makefile.
Emil Velikov [Tue, 5 Apr 2016 13:42:50 +0000 (14:42 +0100)]
compiler: automake: flesh out NIR into separate makefile.

Analogous to previous commit - improved readability at the expense of
an extra file.

Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
Acked-by: Jason Ekstrand <jason@jlekstrand.net>
5 years agocompiler: automake: split out glsl into separate makefile
Emil Velikov [Tue, 5 Apr 2016 13:40:42 +0000 (14:40 +0100)]
compiler: automake: split out glsl into separate makefile

Preserve the functionality while keeping the files smaller and
more readable.

v2: Do not include Makefile.sources from the GLSL makefile (silences
automake warnings)

Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Acked-by: Jason Ekstrand <jason@jlekstrand.net> (v1)
5 years agocompiler: remove {glsl,nir}/Makefile.sources
Emil Velikov [Mon, 11 Apr 2016 12:23:17 +0000 (13:23 +0100)]
compiler: remove {glsl,nir}/Makefile.sources

No longer used as of last commit.

v2: Rebase.

Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Acked-by: Jason Ekstrand <jason@jlekstrand.net> (v1)
5 years agoconfigure.ac: update the path of the generated files
Emil Velikov [Tue, 5 Apr 2016 13:29:41 +0000 (14:29 +0100)]
configure.ac: update the path of the generated files

... in order to determine if we need bison/flex. Failing to locate the
files will lead to mandating bison/flex even when building from a
release tarball.

CC: "11.2" <mesa-stable@lists.freedesktop.org>
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
Acked-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Matt Turner <mattst88@gmail.com>
5 years agoglsl: move the android build scripts a level up
Emil Velikov [Tue, 5 Apr 2016 13:25:19 +0000 (14:25 +0100)]
glsl: move the android build scripts a level up

Analogous to previous commit.

Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
Acked-by: Jason Ekstrand <jason@jlekstrand.net>
5 years agoglsl: move the scons build script a level up
Emil Velikov [Tue, 5 Apr 2016 13:05:19 +0000 (14:05 +0100)]
glsl: move the scons build script a level up

It will allow us to remove the duplicate glsl/Makefile.sources.

Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
Acked-by: Jason Ekstrand <jason@jlekstrand.net>
5 years agoPart revert "gallium/auxiliary: don't build NIR sources with MSVC2008 flags"
Emil Velikov [Tue, 5 Apr 2016 12:00:52 +0000 (13:00 +0100)]
Part revert "gallium/auxiliary: don't build NIR sources with MSVC2008 flags"

This reverts commit 41c7912d04111a7e3b75a438c5cbbd7edc0fee25 but leaves
out the pragma [that inspired the original commit].

Building mesa requires MSVC2013 or later, thus we no longer need this.

v2: Use correct include path (src/glsl/nir -> src/compiler/nir)

Conflicts:
src/gallium/auxiliary/Makefile.am

Acked-by: Jason Ekstrand <jason@jlekstrand.net> (v1)
5 years agoGL3: ARB_shader_image_load_store/size is done for radeonsi also in GLES
Nicolai Hähnle [Mon, 11 Apr 2016 17:48:10 +0000 (12:48 -0500)]
GL3: ARB_shader_image_load_store/size is done for radeonsi also in GLES

Trivial.

5 years agodocs: fix Coverity URL
Brian Paul [Mon, 11 Apr 2016 15:10:29 +0000 (09:10 -0600)]
docs: fix Coverity URL

5 years agotgsi/doc: fix spelling error
Oded Gabbay [Sun, 20 Mar 2016 08:41:40 +0000 (10:41 +0200)]
tgsi/doc: fix spelling error

Signed-off-by: Oded Gabbay <oded.gabbay@gmail.com>
Reviewed-by: Rob Clark <robdclark@gmail.com>
5 years agonir: add a pass for lowering (un)pack_double_2x32
Connor Abbott [Thu, 12 Nov 2015 10:40:34 +0000 (11:40 +0100)]
nir: add a pass for lowering (un)pack_double_2x32

v2: Undo unintended change to the signature of
    nir_normalize_cubemap_coords (Iago).

v3: Move to compiler/nir (Iago)

v4: Remove Authors from copyright header (Michael Schellenberger)

v5 (Sam):
- Use nir_channel() and nir_ssa_for_alu_src() helpers (Jason)
- Inline lower_double_pack_instr() code into lower_double_pack_block()
  (Jason).
- Initialize nir_builder at lower_double_pack_impl() (Jason).

Signed-off-by: Iago Toral Quiroga <itoral@igalia.com>
Signed-off-by: Samuel Iglesias Gonsálvez <siglesias@igalia.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
5 years agonir: add split versions of (un)pack_double_2x32
Connor Abbott [Fri, 7 Aug 2015 15:37:38 +0000 (08:37 -0700)]
nir: add split versions of (un)pack_double_2x32

v2 (Sam):
- Use uint64 instead of float64 for sources and destinations. (Connor)

Signed-off-by: Samuel Iglesias Gonsálvez <siglesias@igalia.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
5 years agonir: don't try to scalarize unpack_double_2x32
Connor Abbott [Fri, 31 Jul 2015 17:52:25 +0000 (10:52 -0700)]
nir: don't try to scalarize unpack_double_2x32

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
5 years agonir: add support for (un)pack_double_2x32
Connor Abbott [Fri, 14 Aug 2015 19:20:37 +0000 (12:20 -0700)]
nir: add support for (un)pack_double_2x32

v2 (Sam):
- Use uint64 instead of float64 for sources and destinations. (Connor)

Signed-off-by: Samuel Iglesias Gonsálvez <siglesias@igalia.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
5 years agonir: add i2d and u2d opcodes
Iago Toral Quiroga [Tue, 12 Jan 2016 13:03:08 +0000 (14:03 +0100)]
nir: add i2d and u2d opcodes

v2:
- Assert supports_int and don't fallback to nir_fmov (Jason)

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
5 years agonir: add d2i, d2u, d2b opcodes
Iago Toral Quiroga [Tue, 12 Jan 2016 11:39:58 +0000 (12:39 +0100)]
nir: add d2i, d2u, d2b opcodes

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
5 years agonir: add support for d2f and f2d
Connor Abbott [Thu, 30 Jul 2015 06:46:20 +0000 (23:46 -0700)]
nir: add support for d2f and f2d

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
5 years agonir/glsl_to_nir: set bit_size on ssbo_load result
Iago Toral Quiroga [Thu, 21 Jan 2016 12:23:55 +0000 (13:23 +0100)]
nir/glsl_to_nir: set bit_size on ssbo_load result

v2 (Sam):
- Add missing bit_size assignment when ssbo_load destination is a boolean.

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
5 years agonir/glsl_to_nir: add bit-size info to add_instr()
Samuel Iglesias Gonsálvez [Mon, 4 Apr 2016 08:16:11 +0000 (10:16 +0200)]
nir/glsl_to_nir: add bit-size info to add_instr()

Signed-off-by: Samuel Iglesias Gonsálvez <siglesias@igalia.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
5 years agonir/split_var_copies: handle doubles
Connor Abbott [Tue, 4 Aug 2015 21:04:54 +0000 (14:04 -0700)]
nir/split_var_copies: handle doubles

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
5 years agonir/instr_set: handle 64-bit bit-sizes
Connor Abbott [Mon, 3 Aug 2015 22:05:38 +0000 (15:05 -0700)]
nir/instr_set: handle 64-bit bit-sizes

v2: Revert spurious change in nir_opt_cse.c (Iago)

Signed-off-by: Iago Toral Quiroga <itoral@igalia.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
5 years agonir: handle doubles in nir_deref_get_const_initializer_load()
Connor Abbott [Fri, 14 Aug 2015 17:40:03 +0000 (10:40 -0700)]
nir: handle doubles in nir_deref_get_const_initializer_load()

v2 (Sam):
- Use proper bitsize value when calling to nir_load_const_instr_create()
  (Jason).

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
5 years agonir/print: add support for printing doubles and bitsize
Connor Abbott [Fri, 14 Aug 2015 17:37:18 +0000 (10:37 -0700)]
nir/print: add support for printing doubles and bitsize

v2:
- Squash the printing doubles related patches into one patch (Sam).

v3:
- Print using PRIx64 format: long is 32-bit on some 32-bit platforms but long
long is basically always 64-bit (Jason).

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
5 years agonir/glsl_to_nir: support doubles
Connor Abbott [Thu, 12 Nov 2015 10:18:50 +0000 (11:18 +0100)]
nir/glsl_to_nir: support doubles

v2:
- Don't set sized types to the destination of texture related opcodes.
  (Jason)

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
5 years agonir/lower_load_const_to_scalar: support doubles and multiple bit sizes
Iago Toral Quiroga [Wed, 10 Feb 2016 15:05:11 +0000 (16:05 +0100)]
nir/lower_load_const_to_scalar: support doubles and multiple bit sizes

v2 (Sam):
- Add assert to detect bitsizes differents than 32 and 64 (Jason).

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
5 years agonir/lower_to_source_mods: Handle different bit sizes
Iago Toral Quiroga [Fri, 6 Nov 2015 10:19:58 +0000 (11:19 +0100)]
nir/lower_to_source_mods: Handle different bit sizes

v2 (Sam):
- Use helper to get base type from nir_alu_type.

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
5 years agonir: add bit_size info to nir_load_const_instr_create()
Samuel Iglesias Gonsálvez [Wed, 23 Mar 2016 07:04:18 +0000 (08:04 +0100)]
nir: add bit_size info to nir_load_const_instr_create()

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
5 years agonir/lower_vec: adapt to different bit sizes
Connor Abbott [Mon, 2 Nov 2015 23:33:46 +0000 (18:33 -0500)]
nir/lower_vec: adapt to different bit sizes

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
5 years agonir: add bit_size info to nir_ssa_undef_instr_create()
Samuel Iglesias Gonsálvez [Wed, 23 Mar 2016 07:04:09 +0000 (08:04 +0100)]
nir: add bit_size info to nir_ssa_undef_instr_create()

v2:
- Make the users to give the right bit_sizes as arguments (Jason).

Signed-off-by: Samuel Iglesias Gonsálvez <siglesias@igalia.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
5 years agonir/locals_to_regs: adapt to different bit sizes
Connor Abbott [Tue, 17 Nov 2015 14:50:00 +0000 (15:50 +0100)]
nir/locals_to_regs: adapt to different bit sizes

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
5 years agonir/from_ssa: adapt to different bit sizes
Connor Abbott [Tue, 17 Nov 2015 14:49:29 +0000 (15:49 +0100)]
nir/from_ssa: adapt to different bit sizes

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
5 years agoi965: fix struct type in comment
Timothy Arceri [Sun, 10 Apr 2016 02:28:00 +0000 (12:28 +1000)]
i965: fix struct type in comment

Reviewed-by: Eduardo Lima Mitev <elima@igalia.com>
5 years agonir: Add a pass for gathering various bits of shader info
Jason Ekstrand [Fri, 25 Mar 2016 17:23:25 +0000 (10:23 -0700)]
nir: Add a pass for gathering various bits of shader info

Reviewed-by: Rob Clark <robdclark@gmail.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
5 years agoi965: enable OES_texture_buffer on gen7+
Ilia Mirkin [Tue, 29 Mar 2016 23:30:31 +0000 (19:30 -0400)]
i965: enable OES_texture_buffer on gen7+

It will only end up getting exposed on gen8+ since it requires GL ES
3.1, but it should be ready to go on gen7 when support for GL ES 3.1 is
completed there.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Tested-by: Kenneth Graunke <kenneth@whitecape.org>
5 years agodocs: add some missing softpipe entries.
Dave Airlie [Mon, 11 Apr 2016 03:10:36 +0000 (13:10 +1000)]
docs: add some missing softpipe entries.

I just forgot these when I added this stuff.

Signed-off-by: Dave Airlie <airlied@redhat.com>
5 years agoglsl: Don't remove XFB-only varyings.
Kenneth Graunke [Sun, 3 Apr 2016 07:48:03 +0000 (00:48 -0700)]
glsl: Don't remove XFB-only varyings.

Consider the case of linking a program with both a vertex and fragment
shader.  The VS may compute output varyings that are intended for
transform feedback, and not read by the fragment shader.

In this case, var->data.is_unmatched_generic_inout will be true,
but we still cannot eliminate the varyings.  We need to also check
!var->data.is_xfb_only.

Fixes failures in ES31-CTS.gpu_shader5.fma_precision_*, which happen
to use transform feedback in a way we apparently hadn't seen before.

Cc: mesa-stable@lists.freedesktop.org
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Timothy Arceri <timothy.arceri@collabora.com>
5 years agoi965/disasm: Decode per-slot offsets.
Kenneth Graunke [Fri, 8 Apr 2016 20:52:30 +0000 (13:52 -0700)]
i965/disasm: Decode per-slot offsets.

We just never bothered to decode this.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Ben Widawsky <ben@bwidawsk.net>
5 years agoi965/disasm: Decode "channel mask present" bit correctly.
Kenneth Graunke [Fri, 8 Apr 2016 20:48:46 +0000 (13:48 -0700)]
i965/disasm: Decode "channel mask present" bit correctly.

Bit 15 means "interleave" for most messages, but for SIMD8 messages it
means "use channel masks".

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Ben Widawsky <ben@bwidawsk.net>
5 years agoi965/disasm: Simplify the URB opcode printing with ?:.
Kenneth Graunke [Fri, 8 Apr 2016 20:38:54 +0000 (13:38 -0700)]
i965/disasm: Simplify the URB opcode printing with ?:.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Ben Widawsky <ben@bwidawsk.net>
5 years agoglsl: allow usage of the keyword buffer before GLSL 430 / ESSL 310
Ilia Mirkin [Sat, 9 Apr 2016 17:11:42 +0000 (13:11 -0400)]
glsl: allow usage of the keyword buffer before GLSL 430 / ESSL 310

The GLSL 4.20 and ESSL 3.00 specs don't list 'buffer' as a reserved
keyword. Make the parser ignore it unless GLSL 4.30 / ESSL 3.10 are
used, or ARB_shader_storage_buffer_objects is enabled.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Timothy Arceri <timothy.arceri@collabora.com>
Cc: mesa-stable@lists.freedesktop.org
5 years agonvc0: handle the case where there are no framebuffer attachments
Ilia Mirkin [Sat, 23 Jan 2016 13:37:03 +0000 (08:37 -0500)]
nvc0: handle the case where there are no framebuffer attachments

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
5 years agonv50,nvc0: support sending string markers down into the command stream
Ilia Mirkin [Sun, 3 Apr 2016 20:02:59 +0000 (16:02 -0400)]
nv50,nvc0: support sending string markers down into the command stream

This should hopefully make it a little easier to debug with GL
applications like glretrace and looking at command streams.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
5 years agonv50,nvc0: add invalidate_resource support for buffer resources
Ilia Mirkin [Sun, 3 Apr 2016 19:11:39 +0000 (15:11 -0400)]
nv50,nvc0: add invalidate_resource support for buffer resources

Provide a callback to reallocate the underlying storage of a resource so
that it is not bound to any existing fences.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
5 years agovc4: Move FRAG_X/Y/REV_FLAG to a QFILE like VPM or TLB color writes.
Eric Anholt [Mon, 21 Mar 2016 21:11:10 +0000 (14:11 -0700)]
vc4: Move FRAG_X/Y/REV_FLAG to a QFILE like VPM or TLB color writes.

This gives us one less set of special instruction generation cases, and
instead just the case for returning the correct register to read.

5 years agovc4: Allow TLB Z/color/stencil writes from any ALU operation in QIR.
Eric Anholt [Mon, 21 Mar 2016 20:12:41 +0000 (13:12 -0700)]
vc4: Allow TLB Z/color/stencil writes from any ALU operation in QIR.

This lets us write the Z directly from the FTOI for computed Z, and may
let us coalesce color writes in the future.

No change in my shader-db, but clearly drops an instruction in piglit's
early-z test.

5 years agovc4: Add a helper function for the construction of qregs.
Eric Anholt [Mon, 21 Mar 2016 21:17:45 +0000 (14:17 -0700)]
vc4: Add a helper function for the construction of qregs.

The separate declaration of the struct is not helping clarity, and I was
going to be writing a whole lot more of these in the upcoming patches.

5 years agovc4: Add missing scheduling dependency for MS color writes.
Eric Anholt [Mon, 21 Mar 2016 19:58:48 +0000 (12:58 -0700)]
vc4: Add missing scheduling dependency for MS color writes.

5 years agovc4: Drop the multi_instruction distinction for QIR instructions.
Eric Anholt [Mon, 21 Mar 2016 19:49:08 +0000 (12:49 -0700)]
vc4: Drop the multi_instruction distinction for QIR instructions.

It wasn't correctly flagged everywhere, and QPU generation now handles the
only remaining case that was paying attention to it.

No change on shader-db.

5 years agovc4: Handle SF on instructions that write r4.
Eric Anholt [Mon, 21 Mar 2016 19:44:31 +0000 (12:44 -0700)]
vc4: Handle SF on instructions that write r4.

Normal SFU writes couldn't have SF because they were marked as
multi_instruction, but tex_result and tlb_color_read weren't.  This ended
up not being a problem according to anything in shader-db, but it seems
possible.

5 years agovc4: Allow multi-instruction QIR nodes to get VPM optimization.
Eric Anholt [Mon, 21 Mar 2016 19:18:07 +0000 (12:18 -0700)]
vc4: Allow multi-instruction QIR nodes to get VPM optimization.

There used to be multi-instruction operations that would use src[] twice,
which is why we couldn't do some optimizations on them.  This is no longer
the case.

total instructions in shared programs: 77973 -> 77969 (-0.01%)
instructions in affected programs:     84 -> 80 (-4.76%)
total estimated cycles in shared programs: 234165 -> 234157 (-0.00%)
estimated cycles in affected programs:     92 -> 84 (-8.70%)

5 years agovc4: Switch to using NIR_PASS macros.
Eric Anholt [Fri, 8 Apr 2016 21:05:22 +0000 (14:05 -0700)]
vc4: Switch to using NIR_PASS macros.

This gets us better validation of our NIR transformations.

5 years agovc4: Handle nir_intrinsic_load_user_clip_plane as a vec4.
Eric Anholt [Fri, 8 Apr 2016 21:53:55 +0000 (14:53 -0700)]
vc4: Handle nir_intrinsic_load_user_clip_plane as a vec4.

I liked having all my NIR be scalar, but nir_validate() complains that the
intrinsic writes 4 components but the destination we set up was only 1
component.  I could generate a new scalar variant, but it's a lot easier
to just leave it as a vec4.  This doesn't hurt codegen since we GC unused
uniforms, and UCP dot products use all the components anyway.

5 years agovc4: Emit a warning and proceed for handling loops in NIR.
Rhys Kidd [Wed, 16 Mar 2016 03:00:28 +0000 (23:00 -0400)]
vc4: Emit a warning and proceed for handling loops in NIR.

We don't really suppor control flow yet, but it's a lot nicer to render
something and warn on stderr than to crash.

Fixes the following piglit tests:
- shaders/complex-loop-analysis-bug
- shaders/glsl-fs-discard-04

Converts the following piglit tests from crash to fail:
- shaders/glsl-fs-continue-inside-do-while
- shaders/glsl-fs-loop
- shaders/glsl-fs-loop-continue
- shaders/glsl-fs-loop-nested
- shaders/glsl-texcoord-array
- shaders/glsl-vs-continue-inside-do-while
- shaders/glsl-vs-loop
- shaders/glsl-vs-loop-continue
- shaders/glsl-vs-loop-nested

No piglit regressions.

v2 (Eric): Add stronger stderr warning.

Signed-off-by: Rhys Kidd <rhyskidd@gmail.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
5 years agovc4: Add a stub for NIR->QIR of control flow function nodes
Rhys Kidd [Sat, 12 Mar 2016 23:34:02 +0000 (18:34 -0500)]
vc4: Add a stub for NIR->QIR of control flow function nodes

We shouldn't have any NIR functions present since all GLSL functions get
inlined, but this would be a more informative error if it does happen.

Signed-off-by: Rhys Kidd <rhyskidd@gmail.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
5 years agovc4: Add better debug of NIR->QIR control flow graph failure
Rhys Kidd [Sat, 12 Mar 2016 23:34:01 +0000 (18:34 -0500)]
vc4: Add better debug of NIR->QIR control flow graph failure

Ensure NIR control flow graph nodes that are unhandled in QIR
are reported with sufficient verbosity to aid debugging.

This improves piglit outputs, amongst other tools.

There are no other remaining uses of assert(0) as a blunt tool
within vc4.

Signed-off-by: Rhys Kidd <rhyskidd@gmail.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
5 years agovc4: Remove unused include from vc4_program.c
Rhys Kidd [Fri, 1 Apr 2016 23:46:30 +0000 (19:46 -0400)]
vc4: Remove unused include from vc4_program.c

Found with grep and inspection. Test compiled on RPi hw.
Assists any future effort to remove TGSI as an intermediate stage.

Signed-off-by: Rhys Kidd <rhyskidd@gmail.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
5 years agoglsl: handle unsigned int wraparound in link_shaders()
Lars Hamre [Fri, 8 Apr 2016 14:06:23 +0000 (10:06 -0400)]
glsl: handle unsigned int wraparound in link_shaders()

v2: change check_explicit_uniform_locations() to return an
    unsigned 0 (Timothy Arceri)

We were storing the int result of check_explicit_uniform_locations()
in num_explicit_uniform_locs as an unsigned int which caused it to
be 4294967295 when a -1 was returned.

This in turn would cause the following error during linking:
error: count of uniform locations > MAX_UNIFORM_LOCATIONS(4294967295 > 98304)

Results from running piglit tests/all with this patch
and when ARB_explicit_uniform_location disabled:

changes:     178
fixes:       176
regressions: 2

The two regressions are for the following tests:
glean@glsl1-matrix column check (1)
glean@glsl1-matrix column check (2)
which regress from FAIL to CRASH.

The regressions are acceptable because the tests are currently failing due to
the aforementioned linker error.

Signed-off-by: Lars Hamre <chemecse@gmail.com>
Reviewed-by: Timothy Arceri <timothy.arceri@collabora.com>
5 years agoi965/tiled_memcopy: Get rid of the direction parameter to get_memcpy
Jason Ekstrand [Thu, 7 Apr 2016 18:36:47 +0000 (11:36 -0700)]
i965/tiled_memcopy: Get rid of the direction parameter to get_memcpy

Now that we can use the much simpler rgba8_copy function, we don't need to
hand different functions out based on direction.

Reviewed-by: Matt Turner <mattst88@gmail.com>
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Reviewed-by: Chad Versace <chad.versace@intel.com>
5 years agoi965/tiled_memcpy: Rework the RGBA -> BGRA mem_copy functions
Jason Ekstrand [Thu, 7 Apr 2016 18:21:19 +0000 (11:21 -0700)]
i965/tiled_memcpy: Rework the RGBA -> BGRA mem_copy functions

This splits the two copy functions into three: One for unaligned copies,
one for aligned sources, and one for aligned destinations.  Thanks to the
previous commit, we are now guaranteed that the aligned ones will *only*
operate on aligned memory so they should be safe.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=93962
Cc: "11.1 11.2" <mesa-stable@lists.freedesktop.org>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Reviewed-by: Chad Versace <chad.versace@intel.com>
5 years agoi965/tiled_memcopy: Add aligned mem_copy parameters to the [de]tiling functions
Jason Ekstrand [Thu, 7 Apr 2016 17:52:28 +0000 (10:52 -0700)]
i965/tiled_memcopy: Add aligned mem_copy parameters to the [de]tiling functions

Each of the [de]tiling functions has three mem_copy calls:

 1) Left edge to tile boundary
 2) Tile boundary to tile boundary in a loop
 3) Tile boundary to right edge

Copies 2 and 3 start at a tile edge so the pointer to tiled memory is
guaranteed to be at least 16-byte aligned.  Copy 1, on the other hand,
starts at some arbitrary place in the tile so it doesn't have any such
alignment guarantees.

Cc: "11.1 11.2" <mesa-stable@lists.freedesktop.org>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Reviewed-by: Chad Versace <chad.versace@intel.com>
5 years agoi965: Check eu/subslices are > 0
Ben Widawsky [Thu, 7 Apr 2016 17:53:14 +0000 (10:53 -0700)]
i965: Check eu/subslices are > 0

Now that the check is restricted to gen8+, we should always get back a non-zero
positive value for the EU and subslice counts.

Signed-off-by: Ben Widawsky <benjamin.widawsky@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
5 years agoi965: Fix eu/subslice warning
Ben Widawsky [Thu, 7 Apr 2016 17:53:13 +0000 (10:53 -0700)]
i965: Fix eu/subslice warning

Older gen platforms do not actually return a value for sublice and eu total
(IMO, confusingly) they return -ENODEV. This patch defers the SSEU setup until
we have the actual GPU generation to avoid useless warnings when running on
older platforms with older kernels.

Reported-by: Mark Janes <mark.a.janes@intel.com>
Signed-off-by: Ben Widawsky <benjamin.widawsky@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
5 years agoi965: Extract SSEU configuration info
Ben Widawsky [Thu, 7 Apr 2016 17:53:12 +0000 (10:53 -0700)]
i965: Extract SSEU configuration info

Signed-off-by: Ben Widawsky <benjamin.widawsky@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
5 years agost/mesa: fix glReadBuffer() assertion failure
Brian Paul [Thu, 7 Apr 2016 23:38:41 +0000 (17:38 -0600)]
st/mesa: fix glReadBuffer() assertion failure

If the first call in a GL app is glReadPixels(GL_FRONT) we'd fail the
assert(st->ctx->FragmentProgram._Current) at st_atom_shader.c:114 in
update_fp().

This is because we were calling st_validate_state() without first
updating Mesa state with _mesa_update_state().

The regression came from commit 83b589301f4a150f4 "st/mesa: fix
frontbuffer glReadPixels regressions".

The new piglit gl-1.0-simple-readbuffer test exercises this.

Cc: "11.1 11.2" <mesa-stable@lists.freedesktop.org>
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
5 years agost/va: avoid dereference after free in vlVaDestroyImage
Thomas Hindoe Paaboel Andersen [Sat, 5 Mar 2016 12:07:07 +0000 (13:07 +0100)]
st/va: avoid dereference after free in vlVaDestroyImage

Cc: "11.1 11.2" <mesa-stable@lists.freedesktop.org>
Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>
Tested-by: Julien Isorce <j.isorce@samsung.com>
5 years agoradeonsi: do per-pixel clipping based on viewport states
Marek Olšák [Sun, 3 Apr 2016 01:21:47 +0000 (03:21 +0200)]
radeonsi: do per-pixel clipping based on viewport states

In other words, vport scissors are derived from viewport states.
If the scissor test is enabled, the intersection of both is used.

The guard band will disable clipping, so we have to clip per-pixel.

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
5 years agonv50/ir: do not try to attach JOIN ops to ATOM
Samuel Pitoiset [Thu, 7 Apr 2016 20:38:47 +0000 (22:38 +0200)]
nv50/ir: do not try to attach JOIN ops to ATOM

This might result in an INVALID_OPCODE dmesg error in case a join is
attached to an atomic operation.

Spotted with arb_shader_image_load_store-host-mem-barrier on GK104.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Acked-by: Ilia Mirkin <imirkin@alum.mit.edu>
Cc: mesa-stable@lists.freedesktop.org
5 years agoradeonsi: raise number of samplers per shader to 32
Nicolai Hähnle [Wed, 6 Apr 2016 17:00:08 +0000 (12:00 -0500)]
radeonsi: raise number of samplers per shader to 32

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=94835
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
5 years agoradeonsi: expand the compressed color and depth texture masks to 64 bits
Nicolai Hähnle [Wed, 6 Apr 2016 16:58:42 +0000 (11:58 -0500)]
radeonsi: expand the compressed color and depth texture masks to 64 bits

This is in preparation of raising the number of exposed sampler views to 32
bits, which will raise the total number of sampler views to 33 for the
polygon stipple texture. That texture should never be compressed (and it's
certainly not a depth texture), but this approach seems cleaner to me than
special-casing the last slot in all affected code paths.

Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
5 years agoradeonsi: replace magic 16 by SI_NUM_USER_SAMPLERS
Nicolai Hähnle [Wed, 6 Apr 2016 16:45:37 +0000 (11:45 -0500)]
radeonsi: replace magic 16 by SI_NUM_USER_SAMPLERS

Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
5 years agogallium: raise PIPE_MAX_SAMPLERS to 32
Nicolai Hähnle [Wed, 6 Apr 2016 16:51:47 +0000 (11:51 -0500)]
gallium: raise PIPE_MAX_SAMPLERS to 32

The previous value of 18 was motivated by having drivers that want to expose
16 samplers but also use some additional samplers for internal use. Raising
the value even higher isn't going to hurt that case.

On the other hand, some drivers actually use PIPE_MAX_SAMPLERS as the number
of samplers they expose externally, so raising this number above 32 is fragile
(because several places in the code use bitfields, and tracking down and
widening all of them is prone to miss some case).

Reviewed-by: Brian Paul <brianp@vmware.com>
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
5 years agost/glsl_to_tgsi: make samplers_used an uint32_t (v2)
Nicolai Hähnle [Wed, 6 Apr 2016 21:21:28 +0000 (16:21 -0500)]
st/glsl_to_tgsi: make samplers_used an uint32_t (v2)

It is used as a bitfield, so it seems cleaner to keep it unsigned.

The literal 1 is a (signed) int, and shifting into the sign bit is undefined
in C, so change occurences of 1 to 1u.

v2: add an assert for bitfield size and use 1u << idx

Reviewed-by: Brian Paul <brianp@vmware.com>
Reviewed-by: Roland Scheidegger <sroland@vmware.com> (v1)
Reviewed-by: Marek Olšák <marek.olsak@amd.com> (v1)
5 years agotgsi/scan: add an assert for the size of the samplers_declared bitfield
Nicolai Hähnle [Thu, 7 Apr 2016 17:19:56 +0000 (12:19 -0500)]
tgsi/scan: add an assert for the size of the samplers_declared bitfield

The literal 1 is a (signed) int, and shifting into the sign bit is undefined
in C, so change occurences of 1 to 1u.

Reviewed-by: Brian Paul <brianp@vmware.com>
5 years agodraw/aaline: stronger guard against no free samplers (v2)
Nicolai Hähnle [Wed, 6 Apr 2016 21:27:21 +0000 (16:27 -0500)]
draw/aaline: stronger guard against no free samplers (v2)

Line anti-aliasing will fail when there is no free sampler available. Make
the corresponding guard more robust in preparation of raising
PIPE_MAX_SAMPLERS to 32.

The literal 1 is a (signed) int, and shifting into the sign bit is undefined
in C, so change occurences of 1 to 1u.

v2: add an assert for bitfield size and use 1u << idx

Reviewed-by: Brian Paul <brianp@vmware.com>
Reviewed-by: Roland Scheidegger <sroland@vmware.com> (v1)
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl> (v1)
Reviewed-by: Marek Olšák <marek.olsak@amd.com> (v1)
5 years agoutil/pstipple: stronger guard against no free samplers (v2)
Nicolai Hähnle [Wed, 6 Apr 2016 17:57:51 +0000 (12:57 -0500)]
util/pstipple: stronger guard against no free samplers (v2)

When hasFixedUnit is false, polygon stippling will fail when there is no free
sampler available. Make the corresponding guard more robust in preparation
of raising PIPE_MAX_SAMPLERS to 32.

The literal 1 is a (signed) int, and shifting into the sign bit is undefined
in C, so change occurences of 1 to 1u.

v2: add an assert for bitfield size and use 1u << idx

Reviewed-by: Brian Paul <brianp@vmware.com>
Reviewed-by: Roland Scheidegger <sroland@vmware.com> (v1)
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl> (v1)
Reviewed-by: Marek Olšák <marek.olsak@amd.com> (v1)
5 years agosvga: new SVGA_MSAA env var to disable/enable MSAA pixel formats
Brian Paul [Tue, 5 Apr 2016 01:39:58 +0000 (19:39 -0600)]
svga: new SVGA_MSAA env var to disable/enable MSAA pixel formats

On by default.

Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
5 years agosvga: add some trivial null pointer checks
Brian Paul [Tue, 5 Apr 2016 15:56:49 +0000 (09:56 -0600)]
svga: add some trivial null pointer checks

These small mallocs will probably never fail, but static analysis tools
may complain about the missing checks.

Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
5 years agotrace: add missing set_shader_images()
Samuel Pitoiset [Tue, 5 Apr 2016 17:37:16 +0000 (19:37 +0200)]
trace: add missing set_shader_images()

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
5 years agoradeonsi: disable perfect ZPASS counts for PIPE_QUERY_OCCLUSION_PREDICATE
Marek Olšák [Thu, 7 Apr 2016 00:27:01 +0000 (02:27 +0200)]
radeonsi: disable perfect ZPASS counts for PIPE_QUERY_OCCLUSION_PREDICATE

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
5 years agoradeonsi: don't use the real barrier instruction in tess ctrl shaders
Marek Olšák [Wed, 6 Apr 2016 22:49:32 +0000 (00:49 +0200)]
radeonsi: don't use the real barrier instruction in tess ctrl shaders

Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
5 years agoRevert "clover: Fix build against clang SVN >= r265359"
Michel Dänzer [Thu, 7 Apr 2016 06:05:33 +0000 (15:05 +0900)]
Revert "clover: Fix build against clang SVN >= r265359"

This reverts commit 0daab9878d2b96356cf667591a2c877d912be52d.

The corresponding clang change was reverted.

Trivial.

5 years agonir/types: Add a wrapper for count_attribute_slots
Jason Ekstrand [Fri, 25 Mar 2016 23:12:19 +0000 (16:12 -0700)]
nir/types: Add a wrapper for count_attribute_slots

Reviewed-by: Rob Clark <robdclark@gmail.com>
5 years agor600: use radeon_emit in a few more places in evergreen_compute
Dave Airlie [Wed, 6 Apr 2016 21:38:21 +0000 (22:38 +0100)]
r600: use radeon_emit in a few more places in evergreen_compute

This is just a cleanup of the code.

Acked-by: Tom Stellard <thomas.stellard@amd.com>
Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
5 years agor600: make compute global buffer functions static.
Dave Airlie [Wed, 6 Apr 2016 21:35:53 +0000 (22:35 +0100)]
r600: make compute global buffer functions static.

This moves things around so that the global buffer handling
functions in evergreen_compute.c are static.

Acked-by: Tom Stellard <thomas.stellard@amd.com>
Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
5 years agor600: make two compute functions static.
Dave Airlie [Wed, 6 Apr 2016 21:35:12 +0000 (22:35 +0100)]
r600: make two compute functions static.

These aren't used outside evergreen_compute.c

Acked-by: Tom Stellard <thomas.stellard@amd.com>
Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
5 years agor600: using pipe_grid_info more in evergreen_compute.
Dave Airlie [Wed, 6 Apr 2016 21:28:23 +0000 (22:28 +0100)]
r600: using pipe_grid_info more in evergreen_compute.

No reason to pull the pieces apart here, also make
one of the functions static as it's unused outside this.

Acked-by: Tom Stellard <thomas.stellard@amd.com>
Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>