turnip: refactor draw states and dynamic states

This reworks dynamic states to use draw states, and reworks draw states.

This moves towards doing as little as possible in bind_draw_states.

Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5446>

turnip: delete dead dynamic state code

Remove unused code, split this out to reduce the diff in the next patch.

Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5446>

turnip: improve dirty bit handling a bit

This moves some logic out of bind_draw_states, moving towards the eventual
goal of doing very little in bind_draw_states.

Split this out as a separate patch to make the DIRTY_INPUT_ATTACHMENTS more
visible: it can be safely removed because pipelines are subpass specific,
so there will always be a pipeline change to go with the CmdBeginRenderPass
and CmdNextSubpass (the CmdBindPipeline may not be in the subpass, but the
draw that flushes the pipeline update will be).

Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5446>

turnip: move descriptor set BO tracking to CmdBindDescriptorSets

This avoids the duplicated code.

Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5446>

turnip: compute and graphics have completely separate state

The comment about fragment shader state overwriting compute shader state
is wrong, if either path is overwriting the other's state then it is a
mistake.

Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5446>

tu: Actually remove dead variables after io lowering

I forgot that their derefs would still be lying around, so we need to
eliminate them first.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5519>

ir3: Don't calculate num_samp ourselves

In addition to duplicating what core NIR does better, this was wrong for
Vulkan, where it should be 0 as there are no non-bindless samplers.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5519>

tu: Set num_components to 0 when building bindless intrinsics

Fixes: 167fa288 (" nir/validate: validate intr->num_components")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5520>

tu: Remove tu_shader_compile_options

The only two fields were always true, and I don't think we'd ever have
use for them. If we want to disable optimizations then we'd need a
different approach, and I don't even know what include_binning_pass was
for.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5500>

tu: Use the ir3 shader API

This will be necessary once we start compiling multiple variants due to
different const size limits, and it will also be necessary for properly
implementing the pipeline cache.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5500>

tu: Remove num_samp hack

Delete the variables so that ir3 thinks there are no samplers and
images instead.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5500>

ir3: Pass reserved_user_consts to ir3_shader_from_nir()

ir3_shader_from_nir() calls ir3_optimize_nir(), which currently sets up
the const state. However, we need to know the number of user consts
reserved by the driver before setting up the const state, which means
that this information needs to be passed into ir3_shader_from_nir()
somehow rather than being set in the shader.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5500>

pan/mdg: Reassociate adds for multiply-by-two

Only a single shader-db change it looks like, and not even from
scheduling, no fun.

instructions helped:   shader31 MESA_SHADER_FRAGMENT:                    64 -> 63 (-1.56%)
quadwords helped:   shader31 MESA_SHADER_FRAGMENT:                    66 -> 65 (-1.52%)
registers HURT:   shader31 MESA_SHADER_FRAGMENT:                    2 -> 3 (50.00%)

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5475>

pan/mdg: Canonicalize (x * 2.0) to (x + x)

This lets the previous commit kick in to schedule to either a multiply
or an add. GLES2 shader-db:

total instructions in shared programs: 50514 -> 50459 (-0.11%)
instructions in affected programs: 7436 -> 7381 (-0.74%)
helped: 14
HURT: 7
helped stats (abs) min: 2 max: 8 x̄: 5.00 x̃: 5
helped stats (rel) min: 0.95% max: 1.14% x̄: 1.07% x̃: 1.08%
HURT stats (abs)   min: 2 max: 3 x̄: 2.14 x̃: 2
HURT stats (rel)   min: 0.85% max: 8.57% x̄: 2.73% x̃: 1.26%
95% mean confidence interval for instructions value: -4.37 -0.87
95% mean confidence interval for instructions %-change: -0.91% 1.31%
Inconclusive result (%-change mean confidence interval includes 0).

total bundles in shared programs: 25680 -> 25573 (-0.42%)
bundles in affected programs: 6148 -> 6041 (-1.74%)
helped: 37
HURT: 7
helped stats (abs) min: 1 max: 9 x̄: 3.14 x̃: 2
helped stats (rel) min: 0.63% max: 8.33% x̄: 2.02% x̃: 2.13%
HURT stats (abs)   min: 1 max: 2 x̄: 1.29 x̃: 1
HURT stats (rel)   min: 0.88% max: 11.11% x̄: 3.92% x̃: 1.30%
95% mean confidence interval for bundles value: -3.32 -1.54
95% mean confidence interval for bundles %-change: -2.00% -0.14%
Bundles are helped.

total quadwords in shared programs: 40887 -> 40815 (-0.18%)
quadwords in affected programs: 14203 -> 14131 (-0.51%)
helped: 61
HURT: 2
helped stats (abs) min: 1 max: 4 x̄: 1.21 x̃: 1
helped stats (rel) min: 0.16% max: 11.11% x̄: 1.11% x̃: 0.57%
HURT stats (abs)   min: 1 max: 1 x̄: 1.00 x̃: 1
HURT stats (rel)   min: 2.86% max: 4.00% x̄: 3.43% x̃: 3.43%
95% mean confidence interval for quadwords value: -1.32 -0.96
95% mean confidence interval for quadwords %-change: -1.46% -0.48%
Quadwords are helped.

total registers in shared programs: 3916 -> 3913 (-0.08%)
registers in affected programs: 46 -> 43 (-6.52%)
helped: 5
HURT: 1
helped stats (abs) min: 1 max: 1 x̄: 1.00 x̃: 1
helped stats (rel) min: 10.00% max: 33.33% x̄: 14.89% x̃: 10.00%
HURT stats (abs)   min: 2 max: 2 x̄: 2.00 x̃: 2
HURT stats (rel)   min: 50.00% max: 50.00% x̄: 50.00% x̃: 50.00%
95% mean confidence interval for registers value: -1.79 0.79
95% mean confidence interval for registers %-change: -33.51% 25.37%
Inconclusive result (value mean confidence interval includes 0).

total threads in shared programs: 2455 -> 2454 (-0.04%)
threads in affected programs: 5 -> 4 (-20.00%)
helped: 1
HURT: 1
helped stats (abs) min: 1 max: 1 x̄: 1.00 x̃: 1
helped stats (rel) min: 100.00% max: 100.00% x̄: 100.00% x̃: 100.00%
HURT stats (abs)   min: 2 max: 2 x̄: 2.00 x̃: 2
HURT stats (rel)   min: 50.00% max: 50.00% x̄: 50.00% x̃: 50.00%

total loops in shared programs: 6 -> 6 (0.00%)
loops in affected programs: 0 -> 0
helped: 0
HURT: 0

total spills in shared programs: 168 -> 168 (0.00%)
spills in affected programs: 0 -> 0
helped: 0
HURT: 0

total fills in shared programs: 186 -> 186 (0.00%)
fills in affected programs: 0 -> 0
helped: 0
HURT: 0

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5475>

pan/mdg: Allow scheduling "x + x" to multipliers

One of the neat things with Midgard's wacky VLIW... on VADD/SADD this is
(x + x) literally, on VMUL/SMUL/VLUT this is (x * 2.0) where the 2.0 is
exactly representable in FP16 so it fits nicely as an inline constant.
So we don't need to restrict its scheduling.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5475>

pan/mdg: Factor out unit check

We'd like to do something a bit more complicated.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5475>

aco: fix sub-dword opsel/sdwa checks

These should all check if the operand has a regclass. The opsel check
should also be skipped post-RA.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5504>

aco: fix validation error from vgpr spill/restore code

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5504>

turnip: fix cubic filtering with CmdBlitImage

This fixes the newly added cubic blit_image tests for A650, by falling back
to the 3D path and setting the filter correctly.

Note: there are still failures with the texture filtering tests.

Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5509>

turnip: fix 3D path always being used for CmdBlitImage

This change accidentally made it into 72d7df40a5e5b50, and started causing
blit_image flakes (because of the issue fixed in the previous patch)

Fixes: 72d7df40a5e5b50 ("turnip: add layered 3D path clear for CmdClearAttachments")
Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5509>

turnip: set VFD_INDEX_OFFSET in 3D clear/blit path

This was missing an causing flakes when used after a test that set it to
a non-zero value.

Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5509>

spirv: do not set num_components for non-vectorized mbcnt_amd intrinsic

Fixes: 167fa2887f0 ("nir/validate: validate intr->num_components")
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Rob Clark <robdclark@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5493>

st_glsl_to_nir: fix potential use after free

When updating the shader info used by GL for the API we must
remember to make sure to restore the pointers to its own name
and label strings. There are a number of ways in which the nir
copy of these strings can be freed before GL is finished with
them.

Fixes: 36be8c2fcf94 ("st/glsl_to_nir: use nir_shader_gather_info()")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/2875
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5488>

glsl: small optimisation fix for uniform array resizing

The fix in the previous patch removed an erronous attempt to skip
resizing variable types in each stage. Now that has been removed
iterating over each shader stage is no longer required here.

Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5487>

glsl: fix uniform array resizing in the nir linker

The initial support tried to match uniform variables from different
shaders based on the variables pointer. This will obviously never
work, instead here we use the variables name whcih also means we
must disable this optimisation for spirv.

Using the base variable name works because when collecting uniform
references we never iterate past the first array dimension, and
only support resizing 1D arrays (we also don't support resizing
arrays inside structs).

We also drop the resized bool as we can't skip processing the var
just because is was resized in another shader, we must resize
the var in all shaders.

Fixes: a34cc97ca3e1 ("glsl: when NIR linker enable use it to resize uniform arrays")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/3130
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5487>

anv: Add VK_EXT_custom_border_color to relnotes

Missed it on 5425968d2e46eb3311a75f4bf7bedb1d9dd59459

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5136>

anv: enable VK_EXT_pipeline_creation_cache_control

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5136>

anv: implement VK_PIPELINE_CREATE_FAIL_ON_PIPELINE_COMPILE_REQUIRED_BIT_EXT

v2:
* Set pPipeline to NULL in the corresponding
  graphics/compute_create_pipeline function.
* Keep current ANV behavior of bailing on the first real error.

v3:
* Don't return early if the pipeline succeeded.

v:4(5?):
* Simplify return conditions.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5136>

anv: support externally synchronized pipeline caches

Implement the VK_PIPELINE_CACHE_CREATE_EXTERNALLY_SYNCHRONIZED_BIT_EXT
bits of the VK_EXT_pipeline_creation_cache_control extension.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5136>

intel/compiler: Remove unnecessary optimization for MUL

2 source instruction only support immediate for src1 operand, so no
point in adding optimization condition for src0 oprand.

v2:
- Update commit message and don't remove ADD optimization (Matt Turner)

Signed-off-by: Sagar Ghuge <sagar.ghuge@intel.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5341>

intel/compiler: Optimize integer add with 0 into mov

Kaby Lake
total instructions in shared programs: 326560 -> 323616 (-0.90%)
instructions in affected programs: 178062 -> 175118 (-1.65%)
helped: 129
HURT: 0
helped stats (abs) min: 1 max: 118 x̄: 22.82 x̃: 8
helped stats (rel) min: 0.35% max: 6.56% x̄: 2.57% x̃: 2.47%
95% mean confidence interval for instructions value: -27.71 -17.93
95% mean confidence interval for instructions %-change: -2.81% -2.32%
Instructions are helped.

total cycles in shared programs: 43741127 -> 45397851 (3.79%)
cycles in affected programs: 40880261 -> 42536985 (4.05%)
helped: 94
HURT: 34
helped stats (abs) min: 5 max: 6160 x̄: 598.91 x̃: 45
helped stats (rel) min: 0.20% max: 34.86% x̄: 2.52% x̃: 1.09%
HURT stats (abs)   min: 1 max: 76198 x̄: 50383.00 x̃: 69677
HURT stats (rel)   min: 0.07% max: 48.41% x̄: 15.65% x̃: 6.49%
95% mean confidence interval for cycles value: 8023.10 17863.21
95% mean confidence interval for cycles %-change: <.01% 4.60%
Cycles are HURT.

total spills in shared programs: 1086 -> 978 (-9.94%)
spills in affected programs: 897 -> 789 (-12.04%)
helped: 24
HURT: 0

total fills in shared programs: 1686 -> 1584 (-6.05%)
fills in affected programs: 1371 -> 1269 (-7.44%)
helped: 24
HURT: 0

v2:
- Use brw_reg_type_is_integer (Matt Turner)

Signed-off-by: Sagar Ghuge <sagar.ghuge@intel.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5341>

meson: unbreak sysctl.h detection on BSDs

Code:
 #include <sys/sysctl.h>
Compiler stdout:

Compiler stderr:
 In file included from testfile.c:1:
/usr/include/sys/sysctl.h:1184:40: error: unknown type name 'size_t'
int     sysctl(const int *, u_int, void *, size_t *, const void *, size_t);
                                           ^
/usr/include/sys/sysctl.h:1185:40: error: unknown type name 'size_t'
int     sysctlbyname(const char *, void *, size_t *, const void *, size_t);
                                           ^
/usr/include/sys/sysctl.h:1186:42: error: unknown type name 'size_t'
int     sysctlnametomib(const char *, int *, size_t *);
                                             ^
3 errors generated.

Checking if "sys/sysctl.h" compiles: NO

<https://gitlab.freedesktop.org/mesa/drm/-/commit/1f8ada802391>
<https://gitlab.freedesktop.org/mesa/drm/-/commit/4083e8f2c659>

Reviewed-by: Niclas Zeising <zeising@daemonic.se>
Reviewed-by: Eric Engestrom <eric@engestrom.ch>
Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5462>

docs: Add dri-devel to the mailing lists and drop the DRI wiki link.

The DRI wiki is a wasteland at this point, let's just fold the one bit of
useful information in here.

Reviewed-by: Eric Engestrom <eric@engestrom.ch>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5507>

util: enable futex usage on BSDs after 7dc2f4788288

Reviewed-by: Eric Engestrom <eric@engestrom.ch>
Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5460>

freedreno/ir3: add post-scheduler cp pass

A pass to eliminate extra mov's from an array.  We need to do this after
scheduling so we know that there are not any potentially conflicting
array writes between the original `mov` and it's use(s).

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/2124
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5280>

freedreno/ir3/cp: extract valid_flags

We'll also need this in the postsched-cp pass.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5280>

freedreno/ir3: delay test support for vectorish instructions

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5280>

freedreno/ir3: add helpers to move instructions

A bit cleaner than open coding the list manipulation.  Plus I want to
use it in the next patch, rather than adding more open coded list
futzing.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5280>

freedreno/ir3/delay: calculate delay properly for (rptN)'d instructions

When a sequence of same instruction is encoded with repeat flag,
destination registers are written on successive cycles.  Teach the
delay calculation about this.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5280>

freedreno/ir3: add test for delay slot calculation

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5280>

freedreno/ir3/print: print (r) flag

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5280>

freedreno/ir3/legalize: don't allow (nopN) if (rptN)

These two encodings are mutually exclusive.  If the instruction is a
vector(ish) `(rptN)` instruction, then we can't fold a `(nopN)` post-
delay into it.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5280>

freedreno/a6xx: emit shader names in debug builds

To simplify mapping a shader in a cmdstream trace back to glsl.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5280>

freedreno: splitup emit_string_marker

So that we can use it internally to emit string markers into a specified
rb.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5280>

freedreno/ir3/cp: properly handle already-folded RELATIV

In the `try_swap_mad_two_srcs()` case, valid_flags() gets called both
for the src that we want to try to fold, and for the other src that we
are trying to swap to make that possible.  It can happen in the 2nd case
that a RELATIV src has already been folded.  Since `ssa()` returns non-
null in both the `IR3_REG_SSA` and `IR3_REG_ARRAY` cases (in the later
case, it is the dependent array access that the current instruction
cannot be moved ahead of), we need to explicitly check that the src
reg we are looking at is still an SSA src.

Reported-by: Jonathan Marek <jonathan@marek.ca>
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5280>

freedreno/ir3/validate: also check instr->address

Verify that instructions which have a relative src and/or dest, have
`instr->address`.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5280>

freedreno/sched: reset delay counters at start of block

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5280>

freedreno/log-parser: fix compute times

We also need to clear the table of compute times at the end of the
frame, otherwise results shown will include all the compute jobs since
the beginning of the trace.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5280>

docs: Replace ancient swrast conformance docs with more current information.

I don't think Mesa 4.0 swrast conformance is relevant at this point, just
point people to the current Khronos list.  Also, add some more information
on submitting results.

Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5482>

docs/relnotes: update internal references

This time, let's use proper Sphinx roles for the referenes, so we can
reference documents and inline refs.

Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5471>

docs: update internal references

This time, let's use proper Sphinx roles for the referenes, so we can
reference documents and inline refs.

Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5471>

anv: add an option to disable secondary command buffer calls

Those are currently hurting Felix' ability to look at the batches.

We can probably detect this in the aubinator but that's a bit more
work than falling back to the previous behavior.

v2: Condition VK_KHR_performance_query to not using this variable (Jason)

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5391>

nir/intrinsics: Put the _intel intrinsics together at the end

All the other driver-specific intrinsics are at the end of the file so
Intel's should go there too.

Reviewed-by: Sagar Ghuge<sagar.ghuge@intel.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5503>

softpipe: change vendor name to something more generic.

For consistency with the llvmpipe driver.

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Reviewed by: Jose Fonseca <jfonseca@vmware.com>

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5483>

llvmpipe: change vendor to be more generic.

If submitting for conformance it is probably better to have a generic
name for vendor here.

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Reviewed by: Jose Fonseca <jfonseca@vmware.com>

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5483>

virgl: change vendor id to reflect reality more.

virgl vendor id should probably be little more generic now.

I think I picked this becuase the virtio pci id space was under
RH's name and they did pay for it, but at this point I think it's
better to just use something generic.

Reviewed-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5483>

anv: Add anv_pipeline_init/finish helpers

This cleans up pipline create/destroy a bit after the compute/gfx split.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5457>

anv: Add an anv_batch_set_storage helper

Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5457>

anv,iris: unbreak on BSDs after 812cf5f522ab,abf8aed68047

../src/intel/vulkan/anv_gem.c:31:10: fatal error: 'linux/sync_file.h' file not found
 #include <linux/sync_file.h>
          ^~~~~~~~~~~~~~~~~~~
../src/gallium/drivers/iris/iris_fence.c:29:10: fatal error: 'linux/sync_file.h' file not found
 #include <linux/sync_file.h>
          ^~~~~~~~~~~~~~~~~~~

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5463>

drm-uapi: Add sync_file.h

Based on <linux/sync_file.h> with BSD portability conditional.
At least FreeBSD supports SYNC_IOC_* via LinuxKPI in DRM.

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5463>

aco: don't allow SGPRs on logical phis

aco_validate() is called after phi lowering, now.

Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5496>

aco: reorder calls to aco_validate() and cleanup aco_compile_shader()

The first call of aco_validate should happen after phi lowering.
Otherwise, subdword restrictions might be violated

Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5496>

panfrost: Implement ARB_depth_clamp

This significantly improves the quality of shadows in OpenMW.

Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5453>

panfrost: Clean up panfrost_frag_meta_rasterizer_update

Create a pointer to ctx->rasterizer->base so it isn't repeatedly
referred to.

Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5453>

iris: Fix documentation for _iris_batch_flush

_iris_batch_flush has no in_fence and out_fence parameters

Signed-off-by: Rohan Garg <rohan.garg@collabora.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5470>

zink: expose GLSL 1.30

Reviewed-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5479>

zink: enable cull-distance if supported

This is already implemented, and we just need to flip the switch to turn
it on.

Reviewed-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5479>

gallium/hud: don't use user vertex buffers

This gains back some performance lost in the previous commit, by
bypassing u_vbuf.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5417>

Revert "gallium/hud: don't use user vertex buffers"

The approach taken in this commit only works on drivers that expose
the PIPE_CAP_BUFFER_MAP_PERSISTENT_COHERENT capability. For drivers
that don't, the buffer has been unmapped by the time we get to
hud_draw_colored_prims, leading to crashes.

It's not easy to fix the code, but drivers that do support coherent
mapping will most likely do the right think themseleves, so let's just
go back to using user-buffers here.

This reverts commit 4fe1fd4df40ac91b2783e3604fd81e6a6faf0cd2.

Fixes: 4fe1fd4df40 ("gallium/hud: don't use user vertex buffers")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/3106
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5417>

nir/validate: validate intr->num_components

Validate that num_components is only set for vectorized instructions, to
prevent other nir passes or driver backends from mistakenly relying on
num_components for non-vectorized instructions.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5371>

vc4: don't relay on intr->num_components for non-vectorized intrinsics

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5371>

v3d: don't use intr->num_components for non-vectorized intrinsics

Squashed-in-fix-from: Jose Maria Casanova Crespo <jmcasanova@igalia.com>
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5371>

spriv: don't set num_components for non-vectorised intrinsics

Signed-off-by: Rob Clark <robdclark@chromium.org>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5371>

nir/lower-atomics-to-ssbo: don't set num_components

Of the possible intrinsics generated, only load_ssbo is vectorized (and
store_ssbo is never generated)

Signed-off-by: Rob Clark <robdclark@chromium.org>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5371>

nir/builder: don't set intr->num_components

The "load-sysval" intrinsics are not vectorized.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5371>

radv: don't set num_components for non-vectorized intrinsics

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5371>

freedreno/ir3: don't rely on intr->num_components

It is better to use `nir_intrinsic_dest_components()` which also handles
the case of intrinsics with a fixed number of dest components.

Somehow this starts showing up with a nir_serialize round-trip with
shader-cache.  But we really shouldn't have been relying on
`intr->num_components` directly.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5371>

mesa/gles3: add support for GL_EXT_shader_group_vote

This is the GLES equivalent to ARB_shader_group_vote.

Passes: KHR-GLES31.core.shader_group_vote.*
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5490>

gallivm/cache: don't require a null terminator for cache data.

Fixes crashes seen with
./bin/egl_ext_device_base
since cache support was added.

Fixes: 4962d3e10733 ("gallivm: add cache interface to mcjit")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/3118
Tested-by: Michel Dänzer <mdaenzer@redhat.com>
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5467>

panfrost: Simplify AFBC format check

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5484>

panfrost: Enable AFBC for RGB565

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5484>

panfrost: Correctly calculate tiled stride

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Fixes: bde19c0e7ba ("panfrost: Fix tiled texture "stride"s on Bifrost")
Tested-by: Christian Hewitt <christianshewitt@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5474>

panfrost: Fix level_2

We're not sure what this is but I've always seen it equal to levels.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Tested-by: Christian Hewitt <christianshewitt@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5474>

panfrost: Update sampler view in Bifrost path

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Fixes: fafc305600c ("panfrost: Create a new sampler view bo when the layout changes")
Tested-by: Christian Hewitt <christianshewitt@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5474>

panfrost: Merge bifrost_bo/midgard_bo

The content is difference but a BO is a BO. Let's reduce code repition
between Midgard and Bifrost paths.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Tested-by: Christian Hewitt <christianshewitt@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5474>

llvmpipe/setup: add planes for draw regions if no scissor.

Some tests were using a 1x1 fb bound, with a 2x2 viewport,
and all 4 pixels were getting rendered. Test if the fb bounds
need planes added or not.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/3101
v2: add lines support

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5394>

turnip: simplify stage2 helpers

Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5455>

turnip: remove duplicated stage2opcode and stage2shaderdb

Reduce 3 copies of this same logic into a single one.

Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5455>

aco: fix encoding of certain s_setreg_imm32_b32 instructions

If the mode is too small, the operand will be an inline constant and the
literal dword won't be written.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5245>

aco: improve check for moving temporaries out of fixed definitions

No fossil-db changes.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5245>

aco: allow GFX9 partial writes with instructions which use opsel

Some instructions such as v_mad_f16 can do partial writes on GFX9.

No fossil-db changes.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5245>

aco: add more opcodes to can_swap_operands

fossil-db (Navi, fp16 enabled):
Totals from 310 (0.24% of 127638) affected shaders:
CodeSize: 1290508 -> 1289716 (-0.06%)

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5245>

aco: allow to swap operands for some 16-bit float instructions

No fossil-db changes.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5245>

aco: validate sub-dword pseudo instructions

No fossil-db changes.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5245>

aco: optimize 16-bit and 64-bit float comparisons

No fossil-db changes.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5245>

aco: copy-propagate constants through p_extract_vector/p_split_vector

fossil-db (Navi, fp16 enabled):
Totals from 1 (0.00% of 127638) affected shaders:
CodeSize: 4388 -> 4392 (+0.09%)
VMEM: 465 -> 458 (-1.51%)
Copies: 54 -> 55 (+1.85%)

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5245>

aco: improve 8/16-bit constants

fossil-db (Navi, fp16 enabled):
Totals from 1 (0.00% of 127638) affected shaders:
CodeSize: 4540 -> 4388 (-3.35%)
Instrs: 861 -> 830 (-3.60%)
Cycles: 3444 -> 3320 (-3.60%)
VMEM: 489 -> 465 (-4.91%)
SMEM: 107 -> 110 (+2.80%)
SClause: 31 -> 30 (-3.23%)
Copies: 58 -> 54 (-6.90%)

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5245>

aco: use 32-bit inline constants for 16-bit integer instructions

See https://reviews.llvm.org/D81841

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5245>

aco: fix half_pi constant for 16-bit fsin/fcos

This worked because the optimizer didn't consider that the 16-bit
instruction would interpret the inline constant differently. This will
change in the next commit.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5245>

aco: improve sub-dword check for sgpr/constant propagation

p_create_vector can have sub-dword operands with a v1 definition.

No fossil-db changes.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5245>