mesa.git
3 years agoetnaviv: fix typo in cflush_all description
Guido Günther [Mon, 7 Jan 2019 14:00:00 +0000 (15:00 +0100)]
etnaviv: fix typo in cflush_all description

Signed-off-by: Guido Günther <guido.gunther@puri.sm>
Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
3 years agoradv: remove a few more unnecessary KHR suffixes
Eric Engestrom [Wed, 9 Jan 2019 12:11:48 +0000 (12:11 +0000)]
radv: remove a few more unnecessary KHR suffixes

Cc: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Signed-off-by: Eric Engestrom <eric.engestrom@intel.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com> (v1)
3 years agonir: fix copy-paste error in nir_lower_constant_initializers
Rhys Perry [Thu, 10 Jan 2019 11:23:04 +0000 (11:23 +0000)]
nir: fix copy-paste error in nir_lower_constant_initializers

Fixes: 393b59e0772e7bf0426bdf61c740752c4e09dde1
    ('nir: Rework nir_lower_constant_initializers() to handle functions')
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
3 years agodocs: complete the calendar and release schedule documentation
Andres Gomez [Mon, 7 Jan 2019 17:04:34 +0000 (19:04 +0200)]
docs: complete the calendar and release schedule documentation

As suggested by Emil Velikov.

Cc: Dylan Baker <dylan.c.baker@intel.com>
Cc: Juan A. Suarez <jasuarez@igalia.com>
Cc: Emil Velikov <emil.velikov@collabora.com>
Signed-off-by: Andres Gomez <agomez@igalia.com>
Acked-by: Dylan Baker <dylan@pnwbakers.com>
Reviewed-by: Eric Engestrom <eric@engestrom.ch>
3 years agoglsl/linker: specify proper direction in location aliasing error
Andres Gomez [Mon, 7 Jan 2019 14:11:44 +0000 (16:11 +0200)]
glsl/linker: specify proper direction in location aliasing error

The check for location aliasing was always asuming output variables
but this validation is also called for input variables.

Fixes: e2abb75b0e4 ("glsl/linker: validate explicit locations for SSO programs")
Cc: Iago Toral Quiroga <itoral@igalia.com>
Signed-off-by: Andres Gomez <agomez@igalia.com>
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
3 years agoeditorconfig: Add max_line_length property
Andres Gomez [Mon, 7 Jan 2019 13:49:00 +0000 (15:49 +0200)]
editorconfig: Add max_line_length property

The property is supported by the most of the editors, but not all:
https://github.com/editorconfig/editorconfig/wiki/EditorConfig-Properties#max_line_length

Cc: Eric Engestrom <eric@engestrom.ch>
Cc: Eric Anholt <eric@anholt.net>
Signed-off-by: Andres Gomez <agomez@igalia.com>
Reviewed-by: Dylan Baker <dylan@pnwbakers.com>
Reviewed-by: Eric Engestrom <eric.engestrom@intel.com>
3 years agointel/isl: move tiled_memcpy static libs from i965 to isl
Tapani Pälli [Mon, 17 Dec 2018 12:17:15 +0000 (14:17 +0200)]
intel/isl: move tiled_memcpy static libs from i965 to isl

Patch moves intel_tiled_memcpy[_sse41] libraries to isl, renames some
functions and types and makes the required build system changes for
meson, automake and Android. No functional changes are introduced.

v2: code cleanups, move isl_get_memcpy_type to i965 (Jason)
v3: move isl_mem_copy_fn to priv header, cleanups (Jason, Dylan)

Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Dylan Baker <dylan@pnwbakers.com>
Acked-by: Kenneth Graunke <kenneth@whitecape.org>
3 years agoi965: Enable 64-bit GLSL extensions
Matt Turner [Thu, 18 Oct 2018 16:51:51 +0000 (09:51 -0700)]
i965: Enable 64-bit GLSL extensions

Now that we have software implementations of ARB_gpu_shader_int64 and
ARB_gpu_shader_fp64 we can unconditionally enable these extensions.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
3 years agoi965: Compile fp64 software routines and lower double-ops
Matt Turner [Mon, 10 Dec 2018 19:06:16 +0000 (11:06 -0800)]
i965: Compile fp64 software routines and lower double-ops

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
3 years agointel/compiler: Heap-allocate temporary storage
Matt Turner [Mon, 10 Dec 2018 19:50:55 +0000 (11:50 -0800)]
intel/compiler: Heap-allocate temporary storage

Shaders containing software implementations of double-precision
operations can be very large such that we cannot stack-allocate
an array of grf_count*16.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
3 years agointel/compiler: Expand size of the 'nr' field
Matt Turner [Mon, 10 Dec 2018 19:48:54 +0000 (11:48 -0800)]
intel/compiler: Expand size of the 'nr' field

Shaders containing software implementations of double-precision
operations can be very large such that we have more the 2^16 virtual
registers during optimization.

Move the 'nr' field to the union containing the immediate storage and
expand it to 32-bits.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
3 years agointel/compiler: Prevent warnings in the following patch
Matt Turner [Mon, 10 Dec 2018 22:49:49 +0000 (14:49 -0800)]
intel/compiler: Prevent warnings in the following patch

The next patch replaces an unsigned bitfield with a plain unsigned,
which triggers gcc to begin warning on signed/unsigned comparisons.

Keeping this patch separate from the actual move allows bisectablity and
generates no additional warnings temporarily.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
3 years agointel/compiler: Rearrange code to avoid future problems
Matt Turner [Wed, 12 Dec 2018 06:04:42 +0000 (22:04 -0800)]
intel/compiler: Rearrange code to avoid future problems

A follow on commit will move nr to the same union as the immediate
data, so we should assert these invariants before we overwrite the nr
field.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
3 years agointel/compiler: Avoid false positive assertions
Matt Turner [Mon, 10 Dec 2018 19:42:44 +0000 (11:42 -0800)]
intel/compiler: Avoid false positive assertions

A follow on patch will move the 'nr' field to the union containing the
immediate field, so prepare by checking that we're only testing these
assertions if the .file is correct.

The assertions with != ARF were kind of silly to begin with because the
<128 check is specifically only for things in the GRF.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
3 years agointel/compiler: Split 64-bit MOV-indirects if needed
Matt Turner [Tue, 27 Nov 2018 19:20:20 +0000 (11:20 -0800)]
intel/compiler: Split 64-bit MOV-indirects if needed

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
3 years agointel/compiler: Lower 64-bit MOV/SEL operations
Matt Turner [Thu, 11 Oct 2018 16:55:38 +0000 (09:55 -0700)]
intel/compiler: Lower 64-bit MOV/SEL operations

3 years agonir: Unset metadata debug bit if no progress made
Matt Turner [Mon, 10 Sep 2018 21:31:29 +0000 (14:31 -0700)]
nir: Unset metadata debug bit if no progress made

NIR metadata validation verifies that the debug bit was unset (by a call
to nir_metadata_preserve) if a NIR optimization pass made progress on
the shader. With the expectation that the NIR shader consists of only a
single main function, it has been safe to call nir_metadata_preserve()
iff progress was made.

However, most optimization passes calculate progress per-function and
then return the union of those calculations. In the case that an
optimization pass makes progress only on a subset of the functions in
the shader metadata validation will detect the debug bit is still set on
any unchanged functions resulting in a failed assertion.

This patch offers a quick solution (short of a larger scale refactoring
which I do not wish to undertake as part of this series) that simply
unsets the debug bit on unchanged functions.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
3 years agonir: Add lowering support for 64-bit operations to software
Matt Turner [Mon, 10 Dec 2018 19:05:02 +0000 (11:05 -0800)]
nir: Add lowering support for 64-bit operations to software

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
3 years agonir: Create nir_builder in nir_lower_doubles_impl()
Matt Turner [Mon, 7 Jan 2019 23:35:31 +0000 (15:35 -0800)]
nir: Create nir_builder in nir_lower_doubles_impl()

We're going to use it more in a future patch, and this avoids a lot of
gross code.

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
3 years agonir: Add and set info::uses_64bit
Matt Turner [Mon, 10 Dec 2018 19:01:39 +0000 (11:01 -0800)]
nir: Add and set info::uses_64bit

Will be used to communicate that a shader uses 64-bit operations to the
concerned lowering passes.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
3 years agonir: Implement lowering of 64-bit shift operations
Matt Turner [Fri, 13 Jul 2018 00:22:16 +0000 (17:22 -0700)]
nir: Implement lowering of 64-bit shift operations

Reviewed-by: Elie Tournier <tournier.elie@gmail.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
3 years agonir: Wire up int64 lowering functions
Matt Turner [Thu, 11 Oct 2018 17:16:25 +0000 (10:16 -0700)]
nir: Wire up int64 lowering functions

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
3 years agonir: Add some more int64 lowering helpers
Jason Ekstrand [Fri, 24 Feb 2017 05:40:55 +0000 (21:40 -0800)]
nir: Add some more int64 lowering helpers

[mattst88]: Found in an old branch of Jason's.

Jason implemented: inot, iand, ior, iadd, isub, ineg, iabs, compare,
                   imin, imax, umin, umax
Matt implemented:  ixor, bcsel, b2i, i2b, i2i8, i2i16, i2i32, i2i64,
                   u2u8, u2u16, u2u32, u2u64, and fixed ilt

Reviewed-by: Elie Tournier <tournier.elie@gmail.com>
3 years agonir: Tag entrypoint for easy recognition by nir_shader_get_entrypoint()
Matt Turner [Thu, 6 Sep 2018 18:12:24 +0000 (11:12 -0700)]
nir: Tag entrypoint for easy recognition by nir_shader_get_entrypoint()

We're going to have multiple functions, so nir_shader_get_entrypoint()
needs to do something a little smarter.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
3 years agonir: Rework nir_lower_constant_initializers() to handle functions
Matt Turner [Wed, 9 Jan 2019 03:49:14 +0000 (19:49 -0800)]
nir: Rework nir_lower_constant_initializers() to handle functions

Previously it assumed that only a single function (the entrypoint)
existed and attempted to lower constant initializers of shader outputs
for each function, for instance.

3 years agoglsl: Add "built-in" functions to do fp32_to_int64(fp32)
Sagar Ghuge [Tue, 11 Dec 2018 20:58:36 +0000 (12:58 -0800)]
glsl: Add "built-in" functions to do fp32_to_int64(fp32)

Reviewed-by: Elie Tournier <tournier.elie@gmail.com>
Signed-off-by: Sagar Ghuge <sagar.ghuge@intel.com>
3 years agoglsl: Add "built-in" functions to do fp32_to_uint64(fp32)
Sagar Ghuge [Tue, 11 Dec 2018 21:39:32 +0000 (13:39 -0800)]
glsl: Add "built-in" functions to do fp32_to_uint64(fp32)

Reviewed-by: Elie Tournier <tournier.elie@gmail.com>
Signed-off-by: Sagar Ghuge <sagar.ghuge@intel.com>
3 years agoglsl: Add "built-in" functions to do fp64_to_int64(fp64)
Sagar Ghuge [Tue, 11 Dec 2018 19:25:19 +0000 (11:25 -0800)]
glsl: Add "built-in" functions to do fp64_to_int64(fp64)

Reviewed-by: Elie Tournier <tournier.elie@gmail.com>
Signed-off-by: Sagar Ghuge <sagar.ghuge@intel.com>
3 years agoglsl: Add utility function to round and pack int64_t value
Sagar Ghuge [Tue, 11 Dec 2018 19:19:38 +0000 (11:19 -0800)]
glsl: Add utility function to round and pack int64_t value

Reviewed-by: Elie Tournier <tournier.elie@gmail.com>
Signed-off-by: Sagar Ghuge <sagar.ghuge@intel.com>
3 years agoglsl: Add "built-in" functions to do fp64_to_uint64(fp64)
Sagar Ghuge [Fri, 7 Dec 2018 23:07:57 +0000 (15:07 -0800)]
glsl: Add "built-in" functions to do fp64_to_uint64(fp64)

Reviewed-by: Elie Tournier <tournier.elie@gmail.com>
Signed-off-by: Sagar Ghuge <sagar.ghuge@intel.com>
3 years agoglsl: Add utility function to round and pack uint64_t value
Sagar Ghuge [Fri, 7 Dec 2018 23:05:39 +0000 (15:05 -0800)]
glsl: Add utility function to round and pack uint64_t value

Reviewed-by: Elie Tournier <tournier.elie@gmail.com>
Signed-off-by: Sagar Ghuge <sagar.ghuge@intel.com>
3 years agoglsl: Add "built-in" functions to do int64_to_fp32(int64_t)
Sagar Ghuge [Thu, 6 Dec 2018 06:37:18 +0000 (22:37 -0800)]
glsl: Add "built-in" functions to do int64_to_fp32(int64_t)

Reviewed-by: Elie Tournier <tournier.elie@gmail.com>
Signed-off-by: Sagar Ghuge <sagar.ghuge@intel.com>
3 years agoglsl: Add "built-in" functions to do uint64_to_fp32(uint64_t)
Sagar Ghuge [Thu, 6 Dec 2018 01:02:42 +0000 (17:02 -0800)]
glsl: Add "built-in" functions to do uint64_to_fp32(uint64_t)

Reviewed-by: Elie Tournier <tournier.elie@gmail.com>
Signed-off-by: Sagar Ghuge <sagar.ghuge@intel.com>
3 years agoglsl: Add "built-in" functions to do int64_to_fp64(int64_t)
Sagar Ghuge [Mon, 3 Dec 2018 20:09:38 +0000 (12:09 -0800)]
glsl: Add "built-in" functions to do int64_to_fp64(int64_t)

Reviewed-by: Elie Tournier <tournier.elie@gmail.com>
Signed-off-by: Sagar Ghuge <sagar.ghuge@intel.com>
3 years agoglsl: Add "built-in" functions to do uint64_to_fp64(uint64_t)
Sagar Ghuge [Fri, 30 Nov 2018 19:50:44 +0000 (11:50 -0800)]
glsl: Add "built-in" functions to do uint64_to_fp64(uint64_t)

Reviewed-by: Elie Tournier <tournier.elie@gmail.com>
Signed-off-by: Sagar Ghuge <sagar.ghuge@intel.com>
3 years agoglsl: Add "built-in" functions to convert bool to double
Matt Turner [Fri, 9 Nov 2018 06:12:16 +0000 (22:12 -0800)]
glsl: Add "built-in" functions to convert bool to double

And vice versa.

Reviewed-by: Elie Tournier <tournier.elie@gmail.com>
3 years agoglsl: Add "built-in" functions to do ffract(fp64)
Matt Turner [Fri, 9 Nov 2018 06:05:56 +0000 (22:05 -0800)]
glsl: Add "built-in" functions to do ffract(fp64)

Reviewed-by: Elie Tournier <tournier.elie@gmail.com>
3 years agoglsl: Add "built-in" function to do ffloor(fp64)
Matt Turner [Fri, 9 Nov 2018 05:59:42 +0000 (21:59 -0800)]
glsl: Add "built-in" function to do ffloor(fp64)

Reviewed-by: Elie Tournier <tournier.elie@gmail.com>
3 years agoglsl: Add "built-in" functions to do fmin/fmax(fp64)
Matt Turner [Fri, 9 Nov 2018 05:34:05 +0000 (21:34 -0800)]
glsl: Add "built-in" functions to do fmin/fmax(fp64)

Reviewed-by: Elie Tournier <tournier.elie@gmail.com>
3 years agoglsl: Add "built-in" functions to do ffma(fp64)
Matt Turner [Wed, 31 Oct 2018 04:48:01 +0000 (21:48 -0700)]
glsl: Add "built-in" functions to do ffma(fp64)

Definitely not actually a fused-multiply add.

Reviewed-by: Elie Tournier <tournier.elie@gmail.com>
3 years agoglsl: Add "built-in" functions to do round(fp64)
Elie Tournier [Fri, 11 Aug 2017 13:29:48 +0000 (14:29 +0100)]
glsl: Add "built-in" functions to do round(fp64)

Signed-off-by: Elie Tournier <elie.tournier@collabora.com>
3 years agoglsl: Add "built-in" functions to do trunc(fp64)
Elie Tournier [Fri, 11 Aug 2017 13:09:01 +0000 (14:09 +0100)]
glsl: Add "built-in" functions to do trunc(fp64)

v2: use mix.

Signed-off-by: Elie Tournier <elie.tournier@collabora.com>
3 years agoglsl: Add "built-in" functions to do sqrt(fp64)
Elie Tournier [Wed, 9 Aug 2017 22:44:18 +0000 (23:44 +0100)]
glsl: Add "built-in" functions to do sqrt(fp64)

Signed-off-by: Elie Tournier <elie.tournier@collabora.com>
3 years agoglsl: Add "built-in" functions to do fp32_to_fp64(fp32)
Elie Tournier [Wed, 9 Aug 2017 22:11:08 +0000 (23:11 +0100)]
glsl: Add "built-in" functions to do fp32_to_fp64(fp32)

Signed-off-by: Elie Tournier <elie.tournier@collabora.com>
3 years agoglsl: Add "built-in" functions to do fp64_to_fp32(fp64)
Elie Tournier [Wed, 9 Aug 2017 21:36:28 +0000 (22:36 +0100)]
glsl: Add "built-in" functions to do fp64_to_fp32(fp64)

Signed-off-by: Elie Tournier <elie.tournier@collabora.com>
3 years agoglsl: Add "built-in" functions to do int_to_fp64(int)
Elie Tournier [Wed, 9 Aug 2017 16:39:23 +0000 (17:39 +0100)]
glsl: Add "built-in" functions to do int_to_fp64(int)

v2: use mix
Signed-off-by: Elie Tournier <elie.tournier@collabora.com>
3 years agoglsl: Add "built-in" functions to do fp64_to_int(fp64)
Elie Tournier [Wed, 9 Aug 2017 13:22:47 +0000 (14:22 +0100)]
glsl: Add "built-in" functions to do fp64_to_int(fp64)

v2: use mix

Signed-off-by: Elie Tournier <elie.tournier@collabora.com>
3 years agoglsl: Add "built-in" functions to do uint_to_fp64(uint)
Elie Tournier [Wed, 9 Aug 2017 10:41:13 +0000 (11:41 +0100)]
glsl: Add "built-in" functions to do uint_to_fp64(uint)

Signed-off-by: Elie Tournier <elie.tournier@collabora.com>
3 years agoglsl: Add "built-in" functions to do fp64_to_uint(fp64)
Elie Tournier [Tue, 8 Aug 2017 18:13:45 +0000 (19:13 +0100)]
glsl: Add "built-in" functions to do fp64_to_uint(fp64)

Signed-off-by: Elie Tournier <elie.tournier@collabora.com>
3 years agoglsl: Add "built-in" functions to do mul(fp64, fp64)
Elie Tournier [Tue, 8 Aug 2017 17:12:42 +0000 (18:12 +0100)]
glsl: Add "built-in" functions to do mul(fp64, fp64)

v2: use mix
Signed-off-by: Elie Tournier <elie.tournier@collabora.com>
3 years agoglsl: Add "built-in" functions to do add(fp64, fp64)
Elie Tournier [Tue, 8 Aug 2017 14:39:58 +0000 (15:39 +0100)]
glsl: Add "built-in" functions to do add(fp64, fp64)

v2: use mix and findMSB to optimise.
v3: [Sagar] Fix zFrac0 == 0u case in __normalizeRoundAndPackFloat64

Signed-off-by: Elie Tournier <elie.tournier@collabora.com>
3 years agoglsl: Add "built-in" functions to do lt(fp64, fp64)
Elie Tournier [Tue, 8 Aug 2017 13:42:56 +0000 (14:42 +0100)]
glsl: Add "built-in" functions to do lt(fp64, fp64)

Signed-off-by: Elie Tournier <elie.tournier@collabora.com>
3 years agoglsl: Add utility function to extract 64-bit sign
Elie Tournier [Tue, 8 Aug 2017 13:28:48 +0000 (14:28 +0100)]
glsl: Add utility function to extract 64-bit sign

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
3 years agoglsl: Add "built-in" functions to do eq/ne(fp64, fp64)
Elie Tournier [Tue, 8 Aug 2017 13:23:26 +0000 (14:23 +0100)]
glsl: Add "built-in" functions to do eq/ne(fp64, fp64)

3 years agoglsl: Add "built-in" function to do sign(fp64)
Elie Tournier [Tue, 8 Aug 2017 13:12:35 +0000 (14:12 +0100)]
glsl: Add "built-in" function to do sign(fp64)

v2: use mix.

Signed-off-by: Elie Tournier <elie.tournier@collabora.com>
3 years agoglsl: Add "built-in" functions to do neg(fp64)
Elie Tournier [Tue, 8 Aug 2017 12:55:30 +0000 (13:55 +0100)]
glsl: Add "built-in" functions to do neg(fp64)

v2: use mix.

Signed-off-by: Elie Tournier <elie.tournier@collabora.com>
3 years agoglsl: Add "built-in" function to do abs(fp64)
Elie Tournier [Tue, 8 Aug 2017 12:39:18 +0000 (13:39 +0100)]
glsl: Add "built-in" function to do abs(fp64)

Signed-off-by: Elie Tournier <elie.tournier@collabora.com>
3 years agoglsl: Create file to contain software fp64 functions
Matt Turner [Thu, 15 Nov 2018 18:18:12 +0000 (10:18 -0800)]
glsl: Create file to contain software fp64 functions

The following patches will add implementations of various
double-precision operations to this file.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
3 years agoglsl: Add utility to convert text files to C strings
Ian Romanick [Tue, 23 Oct 2018 23:01:12 +0000 (16:01 -0700)]
glsl: Add utility to convert text files to C strings

Will be used to convert the .glsl source file containing software fp64
routines to a .h file that can be included while building the compiler.

This commit contains two squashed together: the first from Ian adding
the utility (with the existing title), and the second from Dylan making
the code both python2 and python3 compatible.

This is somewhat modeled after the xxd utility that comes with Vim.

Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
xxd.py: Make python2 and 3 compatible

This makes use of unicode_literals, so that undecorated strings are
considered text (python2 unicode, python3 str) and not bytes in python2
and text in python3. It makes use of io.open, which provides python2
with python3's open behavior (it's an alias in python3), in particular
support for the 't' and 'b' option. Finally, it decorates all of the
string literals with the 'b' prefix, so that python interprets them as
bytes.

I've removed the stdin and stdout options, as python2 always requires
these to be bytes, but python3 always treats them as text (there is a
way to get at the underlying bytes buffer, but that's even more
complexity), and makes the input files required arguments.

In the meson we use the '@INPUT@' shorthand instead of listing each
input, as meson will expand that to [prog_python, '@INPUT0@', @INPUT1@,
..., @OUTPUT@, ...]

3 years agoglsl: Copy function out to temp if we don't directly ref a variable
Timothy Arceri [Mon, 9 Apr 2018 04:40:40 +0000 (14:40 +1000)]
glsl: Copy function out to temp if we don't directly ref a variable

Otherwise we can end up with IR that looks like this:

    (
      (declare (temporary ) vec4 f@8)
      (assign  (xyzw) (var_ref f@8)  (var_ref f) )
      (call f16  ((swiz y (var_ref f@8) )))

      (assign  (xyzw) (var_ref f)  (var_ref f@8) )
    ))

When we really need:

      (declare (temporary ) float inout_tmp)
      (assign  (x) (var_ref inout_tmp)  (swiz y (var_ref f) ))
      (call f16  ((var_ref inout_tmp) ))

      (assign  (y) (var_ref f)  (swiz y (swiz xxxx (var_ref inout_tmp) )))
      (declare (temporary ) void void_var)

The GLSL IR function inlining code seemed to produce correct code
even without this but we need the correct IR for GLSL IR -> NIR to
be able to understand whats going on.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
3 years agoglsl: Add function support to glsl_to_nir
Matt Turner [Mon, 10 Dec 2018 18:58:43 +0000 (10:58 -0800)]
glsl: Add function support to glsl_to_nir

Based on a patch from Tim Arceri, but I had to substantially rewrite it
as a result of the NIR derefs rework.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
3 years agointel/fs: Remove FS_OPCODE_UNPACK_HALF_2x16_SPLIT opcodes.
Francisco Jerez [Fri, 7 Dec 2018 22:03:51 +0000 (14:03 -0800)]
intel/fs: Remove FS_OPCODE_UNPACK_HALF_2x16_SPLIT opcodes.

These are broken on a future platform, but it turns out we don't need
to fix them, since they're just type-converting moves with strided
source.  Kill them.

Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
3 years agointel/fs: Remove nasty open-coded CHV/BXT 64-bit workarounds.
Francisco Jerez [Fri, 7 Dec 2018 23:40:43 +0000 (15:40 -0800)]
intel/fs: Remove nasty open-coded CHV/BXT 64-bit workarounds.

Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
3 years agointel/fs: Remove existing lower_conversions pass.
Francisco Jerez [Sat, 8 Dec 2018 07:56:27 +0000 (23:56 -0800)]
intel/fs: Remove existing lower_conversions pass.

It's redundant with the functionality provided by lower_regioning now.

Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
3 years agointel/fs: Introduce regioning lowering pass.
Francisco Jerez [Sat, 29 Dec 2018 12:00:13 +0000 (04:00 -0800)]
intel/fs: Introduce regioning lowering pass.

This legalization pass is meant to handle situations where the source
or destination regioning controls of an instruction are unsupported by
the hardware and need to be lowered away into separate instructions.
This should be more reliable and future-proof than the current
approach of handling CHV/BXT restrictions manually all over the
visitor.  The same mechanism is leveraged to lower unsupported type
conversions easily, which obsoletes the lower_conversions pass.

v2: Give conditional modifiers the same treatment as predicates for
    SEL instructions in lower_dst_modifiers() (Iago).  Special-case a
    couple of other instructions with inconsistent conditional mod
    semantics in lower_dst_modifiers() (Curro).

Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
3 years agointel/fs: Constify fs_inst::can_do_source_mods().
Francisco Jerez [Sat, 29 Dec 2018 09:41:09 +0000 (01:41 -0800)]
intel/fs: Constify fs_inst::can_do_source_mods().

Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
3 years agointel/fs: Respect CHV/BXT regioning restrictions in copy propagation pass.
Francisco Jerez [Fri, 7 Dec 2018 22:26:23 +0000 (14:26 -0800)]
intel/fs: Respect CHV/BXT regioning restrictions in copy propagation pass.

Currently the visitor attempts to enforce the regioning restrictions
that apply to double-precision instructions on CHV/BXT at NIR-to-i965
translation time.  It is possible though for the copy propagation pass
to violate this restriction if a strided move is propagated into one
of the affected instructions.  I've only reproduced this issue on a
future platform but it could affect CHV/BXT too under the right
conditions.

Cc: mesa-stable@lists.freedesktop.org
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
3 years agointel/eu/gen7: Fix brw_MOV() with DF destination and strided source.
Francisco Jerez [Fri, 7 Dec 2018 22:05:52 +0000 (14:05 -0800)]
intel/eu/gen7: Fix brw_MOV() with DF destination and strided source.

I triggered this bug while prototyping code for a future platform on
IVB.  Could be a problem today though if a strided move is
copy-propagated into a type-converting move with DF destination.

Cc: mesa-stable@lists.freedesktop.org
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
3 years agointel/fs: Fix bug in lower_simd_width while splitting an instruction which was alread...
Francisco Jerez [Fri, 7 Dec 2018 22:15:50 +0000 (14:15 -0800)]
intel/fs: Fix bug in lower_simd_width while splitting an instruction which was already split.

This seems to be a problem in combination with the lower_regioning
pass introduced by a future commit, which can modify a SIMD-split
instruction causing its execution size to become illegal again.  A
subsequent call to lower_simd_width() would hit this bug on a future
platform.

Cc: mesa-stable@lists.freedesktop.org
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
3 years agointel/fs: Implement quad swizzles on ICL+.
Francisco Jerez [Thu, 6 Dec 2018 22:11:34 +0000 (14:11 -0800)]
intel/fs: Implement quad swizzles on ICL+.

Align16 is no longer a thing, so a new implementation is provided
using Align1 instead.  Not all possible swizzles can be represented as
a single Align1 region, but some fast paths are provided for
frequently used swizzles that can be represented efficiently in Align1
mode.

Fixes ~90 subgroup quad swap Vulkan CTS tests.

Cc: mesa-stable@lists.freedesktop.org
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
3 years agointel/fs: Handle source modifiers in lower_integer_multiplication().
Francisco Jerez [Sat, 29 Dec 2018 09:44:00 +0000 (01:44 -0800)]
intel/fs: Handle source modifiers in lower_integer_multiplication().

lower_integer_multiplication() implements 32x32-bit multiplication on
some platforms by bit-casting one of the 32-bit sources into two
16-bit unsigned integer portions.  This can give incorrect results if
the original instruction specified a source modifier.  Fix it by
emitting an additional MOV instruction implementing the source
modifiers where necessary.

Cc: mesa-stable@lists.freedesktop.org
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
3 years agoanv/pipeline: remove unnecessary null-pointer check
Andrii Simiklit [Wed, 9 Jan 2019 13:39:45 +0000 (15:39 +0200)]
anv/pipeline: remove unnecessary null-pointer check

Looks like it is impossible that 'last' variable is a null
because at least the get_vs_prog_data shouldn't return a null pointer.
So this check is unnecessary starts from commit:
99d497c5b691 "anv/pipeline: Replace get_fs_input_map with ..."

This small issue is found by cppcheck.

Signed-off-by: Andrii Simiklit <andrii.simiklit@globallogic.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
3 years agost/va: Return correct status from vlVaQuerySurfaceStatus
Indrajit Das [Thu, 3 Jan 2019 09:06:33 +0000 (14:36 +0530)]
st/va: Return correct status from vlVaQuerySurfaceStatus

This ensures that during encoding, applications can get
the correct status of the surface before submitting
more operations on the same.

Reviewed-by: Leo Liu <leo.liu@amd.com>
Signed-off-by: Indrajit Das <indrajit-kumar.das@amd.com>
3 years agoRevert "llvmpipe: Always return some fence in flush (v2)"
Roland Scheidegger [Wed, 9 Jan 2019 16:25:52 +0000 (17:25 +0100)]
Revert "llvmpipe: Always return some fence in flush (v2)"

This reverts commit f6a6da8131383d8eeee07cd59326a70f4b15866b.

With this commit we see massive amounts of asserts triggering
in lp_fence_wait(), assert(f->issued), for instance with libgl_xlib
state tracker and piglit. Not entirely sure if the assert could
just be removed.

3 years agost/mesa: don't leak pipe_surface if pipe_context is not current
Marek Olšák [Tue, 8 Jan 2019 16:12:05 +0000 (11:12 -0500)]
st/mesa: don't leak pipe_surface if pipe_context is not current

We have found some pipe_surface leaks internally.

This is the same code as surface_destroy in radeonsi.
Ideally, surface_destroy would be in pipe_screen.

Cc: 18.3 <mesa-stable@lists.freedesktop.org>
Reviewed-by: Brian Paul <brianp@vmware.com>
3 years agost/mesa: don't reference pipe_surface locally in PBO code
Marek Olšák [Tue, 8 Jan 2019 15:47:31 +0000 (10:47 -0500)]
st/mesa: don't reference pipe_surface locally in PBO code

Reviewed-by: Brian Paul <brianp@vmware.com>
3 years agost/mesa: unify window-system renderbuffer initialization
Marek Olšák [Tue, 8 Jan 2019 15:44:29 +0000 (10:44 -0500)]
st/mesa: unify window-system renderbuffer initialization

Reviewed-by: Brian Paul <brianp@vmware.com>
3 years agoradeonsi: Fix use of 1- or 2- component GL_DOUBLE vbo's.
Mario Kleiner [Mon, 7 Jan 2019 18:42:29 +0000 (19:42 +0100)]
radeonsi: Fix use of 1- or 2- component GL_DOUBLE vbo's.

With Mesa 18.1, commit be973ed21f6e, si_llvm_load_input_vs()
changed the number of source 32-bit wide dword components
used for fetching vertex attributes into the vertex shader
from a constant 4 to a variable num_channels number, depending
on input data format, with some special case handling for
input data formats like 64-Bit doubles.

In the case of a GL_DOUBLE input data format with one
or two components though, e.g, submitted via ...

a) glTexCoordPointer(1, GL_DOUBLE, 0, buffer);
b) glTexCoordPointer(2, GL_DOUBLE, 0, buffer);

... the input format would be SI_FIX_FETCH_RG_64_FLOAT,
but no special case handling was implemented for that
case, so in the default path the number of 32-bit
dwords would be set to the number of float input components
derived from info->input_usage_mask. This ends with corrupted
input to the vertex shader, because fetching a 64-bit double
from the vbo requires fetching two 32-bit dwords instead of 1,
and fetching a two double input requires 4 dword fetches
instead of 2, so in these cases the vertex shader receives
incomplete/truncated input data:

a) float v = gl_MultiTexCoord0.x;  -> v.x is corrupted.
b) vec2  v = gl_MultiTexCoord0.xy; -> v.x is assigned
   correctly, but v.y is corrupted.

This happens with the standard TGSI IR compiled shaders.
Under NIR with R600_DEBUG=nir, we got correct behavior
because the current radeonsi nir code always assigns
info->input_usage_mask = TGSI_WRITEMASK_XYZW, thereby
always fetches 4 dwords regardless of what the shader
actually needs.

Fix this by properly assigning 2 or 4 dword fetches for
one or two component GL_DOUBLE input.

Fixes: be973ed21f6e ("radeonsi: load the right number of
       components for VS inputs and TBOs")

Signed-off-by: Mario Kleiner <mario.kleiner.de@gmail.com>
Cc: mesa-stable@lists.freedesktop.org
Cc: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Marek Olšák <marek.olsak@amd.com>
3 years agoac/nir,radv,radeonsi/nir: use correct indices for interpolation intrinsics
Rhys Perry [Wed, 9 Jan 2019 11:09:33 +0000 (11:09 +0000)]
ac/nir,radv,radeonsi/nir: use correct indices for interpolation intrinsics

Fixes artifacts in World of Warcraft when Multi-sample Alpha-Test is
enabled with DXVK.
It also fixes artifacts with Fallout 4's god rays with DXVK.
Various piglit interpolateAt*() tests under NIR are also fixed.

v2: formatting fix
    update commit message to include Fallout 4 and the Fixes tag

Fixes: f4e499ec791 ('radv: add initial non-conformant radv vulkan driver')
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=106595
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
3 years agoradv: skip draws with instance_count == 0
Samuel Pitoiset [Wed, 9 Jan 2019 09:06:08 +0000 (10:06 +0100)]
radv: skip draws with instance_count == 0

Loosely based on RadeonSI.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
3 years agoradv: enable variable pointers
Samuel Pitoiset [Wed, 9 Jan 2019 11:31:48 +0000 (12:31 +0100)]
radv: enable variable pointers

The Vulkan spec 1.1.97 says:
   "variablePointers specifies whether the implementation supports
    the SPIR-V VariablePointers capability. When this feature is
    not enabled, shader modules must not declare the
    VariablePointers capability."

As the SPIR-V feature is enabled, we should turn on the
extension feature as well.

All dEQP-VK.spirv_assembly.instruction.compute.variable_pointers.*
pass with the khronos internal repo. Note that a bunch of them
fails with the public repo, but it's expected as they violate the
specification.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
3 years agoradv: get rid of bunch of KHR suffixes
Samuel Pitoiset [Tue, 8 Jan 2019 13:30:32 +0000 (14:30 +0100)]
radv: get rid of bunch of KHR suffixes

Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Acked-by: Eric Engestrom <eric.engestrom@intel.com>
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
3 years agoradeon: fix printf format specifier.
Maya Rashish [Sun, 6 Jan 2019 16:39:36 +0000 (18:39 +0200)]
radeon: fix printf format specifier.

From glibc printf(3):

Z      A nonstandard synonym for z that predates the appearance of z.
       Do not use in new code.

Z may not exist on non-glibc systems. Prefer the standard symbol.

Reviewed-by: Eric Engestrom <eric.engestrom@intel.com>
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
3 years agollvmpipe: Always return some fence in flush (v2)
Tomasz Figa [Fri, 14 Dec 2018 08:17:40 +0000 (17:17 +0900)]
llvmpipe: Always return some fence in flush (v2)

If there is no last fence, due to no rendering happening yet, just
create a new signaled fence and return it, to match the expectations of
the EGL sync fence API.

Fixes random "Could not create sync fence 0x3003" assertion failures from
Skia on Android, coming from the following code:

https://android.googlesource.com/platform/frameworks/base/+/master/libs/hwui/pipeline/skia/SkiaOpenGLPipeline.cpp#427

Reproducible especially with thread count >= 4.

One could make the driver always keep the reference to the last fence,
but:

 - the driver seems to explicitly destroy the fence whenever a rendering
   pass completes and changing that would require a significant functional
   change to the code. (Specifically, in lp_scene_end_rasterization().)

 - it still wouldn't solve the problem of an EGL sync fence being created
   and waited on without any rendering happening at all, which is
   also likely to happen with Android code pointed to in the commit.

Therefore, the simple approach of always creating a fence is taken,
similarly to other drivers, such as radeonsi.

Tested with piglit llvmpipe suite with no regressions and following
tests fixed:

egl_khr_fence_sync
 conformance
  eglclientwaitsynckhr_flag_sync_flush
  eglclientwaitsynckhr_nonzero_timeout
  eglclientwaitsynckhr_zero_timeout
  eglcreatesynckhr_default_attributes
  eglgetsyncattribkhr_invalid_attrib
  eglgetsyncattribkhr_sync_status

v2:
 - remove the useless lp_fence_reference() dance (Nicolai),
 - explain why creating the dummy fence is the right approach.

Signed-off-by: Tomasz Figa <tfiga@chromium.org>
3 years agoglsl: Fix buffer overflow with an atomic buffer binding out of range.
Eric Anholt [Tue, 8 Jan 2019 19:45:16 +0000 (11:45 -0800)]
glsl: Fix buffer overflow with an atomic buffer binding out of range.

The binding is checked against the limits later in the function, so we
need to make sure we don't overflow before the check here.

Fixes this valgrind warning (and sometimes segfault):

==1460== Invalid write of size 4
==1460==    at 0x74C98DD: ast_declarator_list::hir(exec_list*, _mesa_glsl_parse_state*) (ast_to_hir.cpp:4943)
==1460==    by 0x74C054F: _mesa_ast_to_hir(exec_list*, _mesa_glsl_parse_state*) (ast_to_hir.cpp:159)
==1460==    by 0x7435C12: _mesa_glsl_compile_shader (glsl_parser_extras.cpp:2130)

in

dEQP-GLES31.functional.debug.negative_coverage.get_error.compute.
   exceed_atomic_counters_limit

Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
3 years agonir: Make nir_deref_instr_build/get_const_offset actually use size_align.
Eric Anholt [Sat, 5 Jan 2019 00:52:32 +0000 (16:52 -0800)]
nir: Make nir_deref_instr_build/get_const_offset actually use size_align.

I think this was copy-and-paste mistake -- nir_opt_large_constants was
passing in glsl_get_natural_size_align_bytes() given brw_nir.c's arguments
to the opt pass.

I wanted to reuse this function for handling constant offsets of arrays of
images in V3D.

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Rob Clark <robdclark@gmail.com>
3 years agoglsl/linker: Fix unmatched TCS outputs being reduced to local variable
Danylo Piliaiev [Wed, 2 Jan 2019 13:55:08 +0000 (15:55 +0200)]
glsl/linker: Fix unmatched TCS outputs being reduced to local variable

Always match TCS outputs since they are shared by all invocations
within the patch and should not be converted to local variables.

This is one of the issues found in Downward.

Signed-off-by: Danylo Piliaiev <danylo.piliaiev@globallogic.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=104297

3 years agov3d: Enable GL_ARB_texture_gather on V3D 4.x.
Eric Anholt [Thu, 27 Dec 2018 07:04:10 +0000 (23:04 -0800)]
v3d: Enable GL_ARB_texture_gather on V3D 4.x.

This is part of GLES 3.1, and with the NIR lowering we're now passing the
GLES31 testcases.

3 years agonir: Add nir_lower_tex support for Broadcom's swizzled TG4 results.
Eric Anholt [Thu, 27 Dec 2018 06:45:04 +0000 (22:45 -0800)]
nir: Add nir_lower_tex support for Broadcom's swizzled TG4 results.

V3D returns the texels in a different order in the resulting vec4 from
what GLSL wants, so we need to put in a swizzle.  Fixes
dEQP-GLES31.functional.texture.gather.basic.2d.rgba8.base_level.level_1

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
3 years agofreedreno: Move register constant files to src/freedreno.
Bas Nieuwenhuizen [Fri, 28 Dec 2018 14:20:13 +0000 (15:20 +0100)]
freedreno: Move register constant files to src/freedreno.

This way they can be shared. Build tested with meson, but not too sure
on the autotools stuff though.

Reviewed-by: Dylan Baker <dylan@pnwbakers.com>
Acked-by: Rob Clark <robdclark@gmail.com>
3 years agonir: fix warning in nir_lower_io.c
Caio Marcelo de Oliveira Filho [Tue, 8 Jan 2019 17:31:29 +0000 (09:31 -0800)]
nir: fix warning in nir_lower_io.c

Initialize the variable with NULL.  Fixes the following

    In file included from ../src/compiler/nir/nir_lower_io.c:34:
    ../src/compiler/nir/nir_lower_io.c: In function ‘nir_lower_explicit_io’:
    ../src/compiler/nir/nir.h:668:11: warning: ‘addr’ may be used uninitialized in this function [-Wmaybe-uninitialized]
        return src;
               ^~~
    ../src/compiler/nir/nir_lower_io.c:735:17: note: ‘addr’ was declared here
        nir_ssa_def *addr;
                     ^~~~

v2: Avoid using a 'default' case so we get help from the compiler when
    new deref types are added. (Lionel)

Acked-by: Jason Ekstrand <jason@jlekstrand.net>
3 years agofreedreno/drm: sync uapi again
Chia-I Wu [Tue, 8 Jan 2019 00:26:53 +0000 (16:26 -0800)]
freedreno/drm: sync uapi again

"pad" was missing in Mesa's msm_drm.h.  sizeof(drm_msm_gem_info)
remains the same, but now the compiler initializes the field to
zero.

Buffer allocation results in EINVAL without this for me.

Cc: Rob Clark <robdclark@gmail.com>
Cc: Kristian Høgsberg <hoegsberg@gmail.com>
Signed-off-by: Chia-I Wu <olvaffe@gmail.com>
Reviewed-by: Kristian H. Kristensen <hoegsberg@gmail.com>
3 years agomeson: fix EGL/X11 build without GLX
Chia-I Wu [Mon, 7 Jan 2019 20:54:19 +0000 (12:54 -0800)]
meson: fix EGL/X11 build without GLX

dep_xcb and others were not set under this configuration.

Signed-off-by: Chia-I Wu <olvaffe@gmail.com>
Reviewed-by: Dylan Baker <dylan@pnwbakers.com>
3 years agowsi: drop unneeded KHR suffix
Eric Engestrom [Tue, 8 Jan 2019 18:06:01 +0000 (18:06 +0000)]
wsi: drop unneeded KHR suffix

Signed-off-by: Eric Engestrom <eric.engestrom@intel.com>
Acked-by: Jason Ekstrand <jason@jlekstrand.net>
3 years agoanv: drop unneeded KHR suffix
Eric Engestrom [Tue, 8 Jan 2019 18:04:54 +0000 (18:04 +0000)]
anv: drop unneeded KHR suffix

Signed-off-by: Eric Engestrom <eric.engestrom@intel.com>
Acked-by: Jason Ekstrand <jason@jlekstrand.net>
3 years agonir: rename global/local to private/function memory
Karol Herbst [Tue, 23 Oct 2018 21:26:22 +0000 (23:26 +0200)]
nir: rename global/local to private/function memory

the naming is a bit confusing no matter how you look at it. Within SPIR-V
"global" memory is memory accessible from all threads. glsl "global" memory
normally refers to shader thread private memory declared at global scope. As
we already use "shared" for memory shared across all thrads of a work group
the solution where everybody could be happy with is to rename "global" to
"private" and use "global" later for memory usually stored within system
accessible memory (be it VRAM or system RAM if keeping SVM in mind).
glsl "local" memory is memory only accessible within a function, while SPIR-V
"local" memory is memory accessible within the same workgroup.

v2: rename local to function as well
v3: rename vtn_variable_mode_local as well

Signed-off-by: Karol Herbst <kherbst@redhat.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
3 years agoautotools: Remove tegra vdpau driver
Dylan Baker [Tue, 18 Dec 2018 22:37:52 +0000 (14:37 -0800)]
autotools: Remove tegra vdpau driver

This has never functioned and probably wont ever function, due to the
way gallium media state trackers are architected and the tegra video
decoder is architected.

Cc: Thierry Reding <thierry.reding@gmail.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Fixes: 1755f608f5201e0a23f00cc3ea1b01edd07eb6ef
       ("tegra: Initial support")

3 years agoclover/meson: Ignore 'svn' suffix when computing CLANG_RESOURCE_DIR
Pierre Moreau [Mon, 7 Jan 2019 20:30:17 +0000 (21:30 +0100)]
clover/meson: Ignore 'svn' suffix when computing CLANG_RESOURCE_DIR

The version exported by LLVM in its CMake configuration files can
include the “svn” suffix when building a development version (for
example “8.0.0svn”). However the exported clang headers are still found
under “lib/clang/8.0.0/”, without the “svn” suffix.
Meson takes care of removing the “svn” suffix from the version when
using the dependency’s `version()` method.

This processing is already performed in “configure.ac” when using
autotools.

Signed-off-by: Pierre Moreau <pierre.morrow@free.fr>
Reviewed-by: Dylan Baker <dylan@pnwbakers.com>
3 years agoanv: flush fast clear colors into compressed surfaces
Lionel Landwerlin [Sun, 23 Dec 2018 17:49:23 +0000 (17:49 +0000)]
anv: flush fast clear colors into compressed surfaces

In the following scenario :

   1. Create image format R8G8B8A8_UNORM
   2. Create image view format R8G8B8A8_SRGB
   3. Clear the view through a sub pass to a particular color
   4. Barrier on the image to from color attachment to source transfer
   5. Copy the image into a linear buffer to check the content

The step 4 resolving the clear color is unaware of the SRGB format of
the view, because the blorp resolve operations operate on images the
color associated with the resolve will not operate on SRGB format but
UNORM. Leading to the wrong color being written into surfaces.

This change forces a clear color resolve at the end of the render pass
so following resolves won't have to deal with the clear color with a
format that doesn't match the image's format.

On gfxbench vulkan_5_normal 1280x720, this appear to cost us ~0.5fps,
from 49.316 down to 48.949.

v2: Only fast clear resolve when image & view have different formats
    (Lionel)

v3: Update warning (Jason)

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=108911
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Suggested-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Samuel Iglesias Gonsálvez <siglesias@igalia.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Cc: mesa-stable@lists.freedesktop.org
3 years agoanv: explictly specify format for blorp ccs/mcs op
Lionel Landwerlin [Mon, 24 Dec 2018 10:11:59 +0000 (10:11 +0000)]
anv: explictly specify format for blorp ccs/mcs op

Resolve operations can happen when dealing with view (begin/end
subpasses) in which case the view's format needs to apply, not the
image's format.

v2: Relayout arguments of a ccs_op() call (Jason)

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Suggested-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=108911
Cc: mesa-stable@lists.freedesktop.org