Bas Nieuwenhuizen [Sun, 17 May 2020 00:44:13 +0000 (02:44 +0200)]
radv: Support VK_PIPELINE_CACHE_CREATE_EXTERNALLY_SYNCHRONIZED_BIT_EXT.
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5072>
Bas Nieuwenhuizen [Sun, 17 May 2020 00:36:44 +0000 (02:36 +0200)]
radv: Support VK_PIPELINE_CREATE_EARLY_RETURN_ON_FAILURE_BIT_EXT.
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5072>
Bas Nieuwenhuizen [Sat, 16 May 2020 23:49:43 +0000 (01:49 +0200)]
radv: Support VK_PIPELINE_COMPILE_REQUIRED_EXT.
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5072>
Alyssa Rosenzweig [Fri, 15 May 2020 23:21:52 +0000 (19:21 -0400)]
panfrost: Enable AFBC for Z24X8
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5069>
Alyssa Rosenzweig [Fri, 15 May 2020 23:16:56 +0000 (19:16 -0400)]
panfrost: Fix Z24 vs Z32 mixup
We don't actually support Z32_UNORM; the format we've been using as such
is in fact Z24X8 / Z24S8. Fix that and drop Z32_UNORM.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5069>
Alyssa Rosenzweig [Fri, 15 May 2020 22:43:41 +0000 (18:43 -0400)]
panfrost: Switch formats to table
Rather than heuristically guessing what PIPE formats correspond to what
in the hardware, hardcode a table. This is more verbose, but a lot more
obvious -- the previous format support code was a source of endless
silent bugs.
v2: Don't report RGB233 (icecream95). Allow RGB5 for texturing
(icecream95).
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5069>
Alyssa Rosenzweig [Sat, 16 May 2020 00:33:06 +0000 (20:33 -0400)]
pan/mfbd: Add format codes for PIPE_FORMAT_B5G5R5A1_UNORM
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5069>
Rhys Perry [Mon, 27 Apr 2020 10:53:50 +0000 (11:53 +0100)]
nir/opt_if: use nir_src_as_bool in opt_peel_loop_initial_if helper
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4757>
Rhys Perry [Tue, 12 May 2020 10:10:18 +0000 (11:10 +0100)]
nir/opt_if: run opt_peel_loop_initial_if after all other optimizations
Fixes dEQP-VK.graphicsfuzz.loops-ifs-continues-call with RADV.
opt_if_loop_terminator can cause this optimization or
opt_if_simplification to be run on the non-SSA code.
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Fixes: 52c8bc0130a ('nir: make opt_if_loop_terminator() less strict')
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/2943
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4757>
Jason Ekstrand [Mon, 18 May 2020 19:26:30 +0000 (14:26 -0500)]
nir: Add documentation for each jump instruction type
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5101>
Jason Ekstrand [Fri, 15 May 2020 20:31:50 +0000 (15:31 -0500)]
nir: Use a switch statement in nir_handle_add_jump
Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5101>
Jason Ekstrand [Fri, 15 May 2020 19:57:40 +0000 (14:57 -0500)]
nir: Validate jump instructions as an instruction type
This has the downside of putting block successor validation in two
places that are a bit further apart. However, handling them as a
special case makes the code more confusing than needed. At least two
different people have not noticed that we don't have jump instruction
validation in the last week or two and added it. Being able to search
for validate_jump_instr is useful.
Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5101>
Samuel Pitoiset [Thu, 7 May 2020 09:41:01 +0000 (11:41 +0200)]
radv/aco: enable storageInputOutput16 on GFX9+
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4966>
Samuel Pitoiset [Fri, 8 May 2020 16:02:12 +0000 (18:02 +0200)]
aco: fix off-by-one error with 16-bit MTBUF opcodes on GFX10
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4966>
Samuel Pitoiset [Fri, 8 May 2020 14:22:53 +0000 (16:22 +0200)]
aco: implement 16-bit interp
For 16-bit bank LDS (ie. Kabini/Stoney) we need a slightly different
path. It's completely untested though because I don't have these
chips but according to vkpipeline-db the generated assembly seems fine.
Note that 16-bit I/O is currently only exposed on GFX9+ for both
compiler backends.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4966>
Samuel Pitoiset [Fri, 8 May 2020 14:21:07 +0000 (16:21 +0200)]
aco: emit v_interp_*_f16 instructions as VOP3 instead of VINTRP
This adds a separate emission path in the assembly for the 16-bit
interp instructions.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4966>
Samuel Pitoiset [Fri, 8 May 2020 14:18:55 +0000 (16:18 +0200)]
aco: validate v_interp_*_f16 as VOP3 instructions instead of VINTRP
16-bit interp instructions are considered VINTRP by the compiler
but they are emitted as VOP3 by the assembler.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4966>
Samuel Pitoiset [Fri, 8 May 2020 07:25:18 +0000 (09:25 +0200)]
aco: implement 16-bit vertex fetches with tbuffer_load_format_d16_*
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4966>
Samuel Pitoiset [Thu, 7 May 2020 18:51:02 +0000 (20:51 +0200)]
aco: implement 8-bit/16-bit mov's with p_create_vector
ACO doesn't lower 8-bit/16-bit mov's in NIR.
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/2997
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4966>
Samuel Pitoiset [Thu, 7 May 2020 16:57:04 +0000 (18:57 +0200)]
aco: allow to load/store 16-bit values in VMEM for tess and geom
We only have to adjust some assertions to allow storing/loading
16-bit values.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4966>
Samuel Pitoiset [Fri, 8 May 2020 07:31:03 +0000 (09:31 +0200)]
aco: convert 16-bit values before exporting MRTs
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4966>
Samuel Pitoiset [Fri, 8 May 2020 07:30:33 +0000 (09:30 +0200)]
aco: store 16-bit temporary outputs as v2b
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4966>
Emmanuel Gil Peyrot [Fri, 8 May 2020 17:23:03 +0000 (19:23 +0200)]
Expose EGL_KHR_platform_* when EXT is supported
On EGL 1.4, one had to check for the existence of EGL_EXT_platform_base
before querying the eglGetPlatformDisplayEXT() and
eglCreatePlatformWindowSurfaceEXT() symbols, to then use them if the
EGL_EXT_platform_* extension for the given platform was exposed.
Since EGL 1.5, the platform functionality was made core, which means we
can obtain the symbols unconditionally, but we can't know the EGL
version before having created a display, at which point we've already
done a platform selection by passing an EGLNativeDisplay. The
EGL_KHR_platform_* extensions thus are used by clients to know whether
it's safe or not to dlsym() the EGL 1.5 symbols.
This commit adds those extensions when the given platform is enabled.
Acked-by: Alyssa Rosenzweig <alyssa@collabora.com>
Reviewed-by: Eric Engestrom <eric@engestrom.ch>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5052>
Alyssa Rosenzweig [Mon, 11 May 2020 22:54:05 +0000 (18:54 -0400)]
pan/decode: Fix min/max_tile_coord mixup
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5099>
Alyssa Rosenzweig [Fri, 15 May 2020 16:57:38 +0000 (12:57 -0400)]
pan/decode: Use a page table for tracking mmaps
We create a hash table mapping GPU va's to mmap structures, such that
searching for a mapped address is effectively O(1) rather than O(N) to
the number of mapped entries as with the previous linked list approach.
This is a memory-time tradeoff, but the speed-up is tracing is notable.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5099>
Rob Clark [Sat, 16 May 2020 20:32:14 +0000 (13:32 -0700)]
freedreno/ir3/validate: add checking for types and opcodes
For cases where instructions have a src and/or dst type, validate that
it matches the src/dst register types. And for cases where there are
different opcodes for half vs full, validate that the opcode matches.
Now that we maintain this properly throughout the stages of the ir, we
can drop the fixups from the RA pass.
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5048>
Rob Clark [Sat, 16 May 2020 21:24:45 +0000 (14:24 -0700)]
freedreno/ir3: add helpers to deal with src/dst types
Add some helpers to properly maintain src/dst types, and in the cases
where opcode depends on src or dst type, maintain that as well.
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5048>
Rob Clark [Fri, 15 May 2020 23:14:47 +0000 (16:14 -0700)]
freedreno/ir3: add simple validate pass
We can add to this as we notice other things that are worth validating
between ir3 passes.
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5048>
Rob Clark [Sun, 17 May 2020 17:28:52 +0000 (10:28 -0700)]
freedreno/ir3: fix mismatched wrmask for overlapping VS inputs
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5048>
Rob Clark [Sun, 17 May 2020 01:03:25 +0000 (18:03 -0700)]
freedreno/ir3/cp: fix cmps folding
When we start doing cp iteratively, we hit the case that we've already
`cmps.s.*` into a `cmps.s.ne p0.x, ...`.. when we try to do that again
we can invert the logic condition. So check specifically the condition
to prevent this.
TODO we could maybe be more clever about this to combine conditions.
But why isn't that happening in nir? For example, see
dEQP-GLES31.functional.ssbo.layout.single_basic_array.packed.bool
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5048>
Rob Clark [Sun, 17 May 2020 00:47:49 +0000 (17:47 -0700)]
freedreno/ir3/print: print cat2 condition
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5048>
Rob Clark [Sat, 16 May 2020 22:58:04 +0000 (15:58 -0700)]
freedreno/ir3: fix immed type in create_addr0()
We can also remove a bunch of manual src/dst flag munging, since the
instruction builders handle this automatically now.
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5048>
Rob Clark [Sat, 16 May 2020 00:12:25 +0000 (17:12 -0700)]
freedreno/ir3/cf: handle multiple cov's properly
There can be multiple (for ex.) f32f16's from a single source, in
particular appearing in different blocks. We need to update all uses
of the src which had conversion folded in, not all the uses of the
individual cov. Also, to avoid invalidating the ssa use info that was
gathered at the beginning of the pass, don't actually eliminate the
cov, but instead change it to a simple mov that the cp pass can gobble
up.
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5048>
Rob Clark [Fri, 15 May 2020 23:44:29 +0000 (16:44 -0700)]
freedreno/ir3: fix mismatched flags on split
We have to fixup the meta:split half flag, because `ir3_split_dest()` is
called before we fixup the dest type. But we should fixup both the
split src and dest, as well as the thing it is splitting.
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5048>
Rob Clark [Fri, 15 May 2020 22:48:06 +0000 (15:48 -0700)]
freedreno/ir3/group: fix for half-regs
If we're inserting a mov to resolve a conflict between meta:collect's
(ie. for .zyx type swizzles, etc), we should use the correct precision.
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5048>
Rob Clark [Sat, 16 May 2020 19:15:23 +0000 (12:15 -0700)]
freedreno/ir3: make input/output iterators declare cursor ptr
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5048>
Rob Clark [Sat, 16 May 2020 19:08:26 +0000 (12:08 -0700)]
freedreno/ir3: make foreach_ssa_src declar cursor ptr
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5048>
Rob Clark [Sat, 16 May 2020 19:01:08 +0000 (12:01 -0700)]
freedreno/ir3: make foreach_src declare cursor ptr
To match how the newer iterators work.
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5048>
Rob Clark [Thu, 14 May 2020 19:09:35 +0000 (12:09 -0700)]
freedreno/ir3: be iterative
It does pick up a few more cf/cp opportunities, according to sharder-db.
But don't think it will be measurable.
But this will allow some future simplification to cp by pulling out it's
internal iteration.
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5048>
Rob Clark [Thu, 14 May 2020 21:28:52 +0000 (14:28 -0700)]
freedreno/ir3: move where we preserve binning pass inputs
For a6xx, since we use same VBO state for binning and VS, we need to
preserve potentially unused inputs. This needs to be done before DCE.
So move it before we add earlier DCE passes.
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5048>
Rob Clark [Thu, 14 May 2020 19:02:54 +0000 (12:02 -0700)]
freedreno/ir3: add IR3_PASS() macro
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5048>
Rob Clark [Thu, 14 May 2020 23:09:07 +0000 (16:09 -0700)]
freedreno/ir3/postsched: report progress
Or do the easy thing and claim we always changed something. It is kinda
hard and not worth the effort to determine for real.
Also rip out unused error handling. This pass should never fail. And
we weren't even actually checking the return.
And while we're at it, switch over to taking the 'struct ir3 ir*`
instead of ctx, to standardize with the other passes.
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5048>
Rob Clark [Thu, 14 May 2020 23:02:55 +0000 (16:02 -0700)]
freedreno/ir3/legalize: report progress
It always does something. Just return true for IR3_PASS()
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5048>
Rob Clark [Thu, 14 May 2020 23:01:29 +0000 (16:01 -0700)]
freedreno/ir3/group: report progress
Not iterative, but this will let IR3_PASS() macro know if there are any
changes to print.
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5048>
Rob Clark [Thu, 14 May 2020 22:43:31 +0000 (15:43 -0700)]
freedreno/ir3/deps: report progress
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5048>
Rob Clark [Thu, 14 May 2020 18:52:02 +0000 (11:52 -0700)]
freedreno/ir3/cp: report progress
Later when we do this pass iteratively, we can drop some of the internal
iteration and just rely on this pass getting run until there is no more
progress.
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5048>
Rob Clark [Thu, 14 May 2020 18:42:11 +0000 (11:42 -0700)]
freedreno/cf: report progress
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5048>
Rob Clark [Thu, 14 May 2020 18:39:14 +0000 (11:39 -0700)]
freedreno/ir3/dce: report progress
Eventually we'll pull the iteration out of the pass itself, but the
first step is to just report progress.
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5048>
Rob Clark [Thu, 14 May 2020 18:36:05 +0000 (11:36 -0700)]
freedreno/ir3: juggle around ir3_debug_print()
In a later patch, this will get folded into an IR3_PASS() macro, at
least for most passes. But to do that, it is better to standardize
on printing the ir3 after the pass.
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5048>
Rob Clark [Thu, 14 May 2020 22:35:28 +0000 (15:35 -0700)]
freedreno/ir3: remove Sethi-Ullman numbering pass
We haven't used this for a while.
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5048>
Samuel Pitoiset [Tue, 19 May 2020 09:53:13 +0000 (11:53 +0200)]
radv: fix missing break in radv_GetPhysicalDeviceProperties2()
Fixes: 57e796a12a8 ("radv: Implement VK_EXT_custom_border_color")
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5097>
Rhys Perry [Fri, 15 May 2020 20:31:35 +0000 (21:31 +0100)]
aco: fix disassembly with LLVM 11
SymbolInfoTy was modified in LLVM 11. It is also in MCDisassembler.h now
and we don't have to duplicate it anymore.
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5060>
Gert Wollny [Mon, 18 May 2020 18:34:06 +0000 (20:34 +0200)]
r600/sfn: Fix printing ALU op without dest
e.g. GROUP_BARRIER doesn't have a dest.
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Reviewed-by: Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5085>
Gert Wollny [Wed, 6 May 2020 22:01:11 +0000 (00:01 +0200)]
r600/sfn: Don't reorder outputs by location
This was wrong, if anything it should be sorted by device_location, and NIR usually
provides this.
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Reviewed-by: Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5085>
Gert Wollny [Sat, 16 May 2020 18:39:45 +0000 (20:39 +0200)]
r600/sfn: Fix splitting constants that come from different kcache banks.
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Reviewed-by: Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5085>
Gert Wollny [Sat, 16 May 2020 14:44:27 +0000 (16:44 +0200)]
r600/sfn: Fix clip vertex output as possible stream variable
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Reviewed-by: Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5085>
Gert Wollny [Sun, 10 May 2020 18:19:25 +0000 (20:19 +0200)]
r600/sfn: SSBO: Fix query of dest components
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Reviewed-by: Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5085>
Gert Wollny [Sat, 9 May 2020 17:39:40 +0000 (19:39 +0200)]
r600/sfn: use the per shader atomic base
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Reviewed-by: Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5085>
Gert Wollny [Sat, 9 May 2020 13:21:01 +0000 (15:21 +0200)]
r600/sfn: Add support for texture_samples
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Reviewed-by: Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5085>
Gert Wollny [Sat, 9 May 2020 08:40:58 +0000 (10:40 +0200)]
r600/sfn: support indirect sampler buffer reads.
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Reviewed-by: Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5085>
Gert Wollny [Fri, 8 May 2020 15:46:49 +0000 (17:46 +0200)]
r600/sfn: assert when alu dest is missing
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Reviewed-by: Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5085>
Gert Wollny [Fri, 8 May 2020 14:24:37 +0000 (16:24 +0200)]
r600/sfn: remove pointless check
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Reviewed-by: Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5085>
Gert Wollny [Thu, 7 May 2020 17:19:32 +0000 (19:19 +0200)]
r600/sfn: Don't reject VARYING_SLOT_PCNT
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Reviewed-by: Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5085>
Gert Wollny [Wed, 6 May 2020 22:09:02 +0000 (00:09 +0200)]
r600/sfn: Add FS output sample_mask
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Reviewed-by: Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5085>
Gert Wollny [Wed, 6 May 2020 22:03:29 +0000 (00:03 +0200)]
r600/sfn: Handle loading sample_pos
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Reviewed-by: Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5085>
Gert Wollny [Wed, 6 May 2020 22:01:48 +0000 (00:01 +0200)]
r600/sfn: Take FOGC, and backcolors into account im GS outputs
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Reviewed-by: Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5085>
Gert Wollny [Wed, 6 May 2020 21:59:34 +0000 (23:59 +0200)]
r600/sfn: Add support for viewport index output
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Reviewed-by: Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5085>
Gert Wollny [Wed, 6 May 2020 21:58:25 +0000 (23:58 +0200)]
r600/sfn: Make 3vec loads skip possible moves
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Reviewed-by: Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5085>
Gert Wollny [Wed, 6 May 2020 21:55:56 +0000 (23:55 +0200)]
r600/sfn: Fix handling of output register index
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Reviewed-by: Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5085>
Gert Wollny [Wed, 6 May 2020 21:54:38 +0000 (23:54 +0200)]
r600/sfn: Make allocate_reserved_registers forward to a virtual function
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Reviewed-by: Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5085>
Gert Wollny [Wed, 6 May 2020 21:51:42 +0000 (23:51 +0200)]
r600/sfn: Fix RAT instruction assembly emission
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Reviewed-by: Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5085>
Gert Wollny [Wed, 6 May 2020 21:51:09 +0000 (23:51 +0200)]
r600/sfn: Fix GDS assembly emission
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Reviewed-by: Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5085>
Gert Wollny [Wed, 6 May 2020 21:50:38 +0000 (23:50 +0200)]
r600/sfn: Fix RING instruction assembly emission
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Reviewed-by: Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5085>
Gert Wollny [Wed, 6 May 2020 21:39:06 +0000 (23:39 +0200)]
r600/sfn: Fix memring print output
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Reviewed-by: Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5085>
Gert Wollny [Wed, 6 May 2020 21:38:40 +0000 (23:38 +0200)]
r600/sfn: skip copying LOD if the target register is is the same
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Reviewed-by: Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5085>
Gert Wollny [Wed, 6 May 2020 21:38:01 +0000 (23:38 +0200)]
r600/sfn: re-use an allocated register in lookup
For texture coordinates we always allocate all four components so that
we can use these for LOD and, compare etc.
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Reviewed-by: Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5085>
Gert Wollny [Wed, 6 May 2020 21:28:30 +0000 (23:28 +0200)]
r600/sfn: Skip move instructions if they are only ssa and without modifiers
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Reviewed-by: Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5085>
Gert Wollny [Wed, 6 May 2020 21:36:14 +0000 (23:36 +0200)]
r600/sfn: rework getting a vector and uniforms from the value pool
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Reviewed-by: Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5085>
Gert Wollny [Wed, 6 May 2020 21:49:41 +0000 (23:49 +0200)]
r600/sfn: Handle CF index loading from non-X channel
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Reviewed-by: Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5085>
Gert Wollny [Wed, 6 May 2020 21:20:49 +0000 (23:20 +0200)]
r600: Add support for loading index register from other than chan X
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Reviewed-by: Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5085>
Gert Wollny [Sat, 9 May 2020 16:03:52 +0000 (18:03 +0200)]
r600: Lower lerp after tgsi_to_nir
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Reviewed-by: Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5085>
Gert Wollny [Wed, 6 May 2020 21:25:03 +0000 (23:25 +0200)]
r600: Lower int64 ops from TGSI-to-NIR shaders too
r600 uses a TGSI shaders with 64 bit ints for a query compute shader.
v2: Use screen version of tgsi_to_nir and fix compile error
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Reviewed-by: Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5085>
Gert Wollny [Wed, 6 May 2020 21:15:28 +0000 (23:15 +0200)]
r600/sfn: Fix printing vertex fetch instruction flags
Fixes: f718ac62688b555a933c7112f656944288d04edb
r600/sfn: Add a basic nir shader backend
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Reviewed-by: Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5085>
Gert Wollny [Mon, 18 May 2020 12:36:10 +0000 (14:36 +0200)]
r600/sfn: Unify semantic name and index query and use TEXCOORD semantic
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Reviewed-by: Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5085>
Michel Dänzer [Mon, 18 May 2020 11:52:45 +0000 (13:52 +0200)]
Revert "gallium/gallivm: fix compilation issues with llvm 11"
This reverts commit
e2a7436dd10df70ba14d18ab7cf8ad538f80e653.
The corresponding LLVM changes were reverted.
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/2983
Acked-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5087>
Michel Dänzer [Mon, 18 May 2020 11:53:30 +0000 (13:53 +0200)]
Revert "ac,radeonsi: fix compilations issues with LLVM 11"
This reverts commit
42b1696ef627a5bfee29911a780fa0a4dbf04610.
The corresponding LLVM changes were reverted.
Acked-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5087>
Caio Marcelo de Oliveira Filho [Tue, 19 May 2020 00:43:34 +0000 (17:43 -0700)]
nir: Consider atomic counter intrinsics when setting writes_memory
In i965 these get lowered after gather info, so let's consider them
too. Fixes
piglit.spec.arb_framebuffer_no_attachments.arb_framebuffer_no_attachments-atomic
in Gen9, HSW and IVB.
Fixes: 6a6c36e9776 ("intel/fs: Use writes_memory from shader_info")
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5093>
Dave Airlie [Thu, 26 Mar 2020 02:32:35 +0000 (12:32 +1000)]
llvmpipe: add gl_SampleMaskIn support.
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5050>
Dave Airlie [Thu, 26 Mar 2020 02:32:24 +0000 (12:32 +1000)]
gallivm/nir: add sample_mask_in support
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5050>
Dave Airlie [Fri, 27 Mar 2020 06:35:20 +0000 (16:35 +1000)]
llvmpipe/fs: hook up the interpolation APIs.
This hooks the nir code to the interp code.
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5050>
Dave Airlie [Fri, 27 Mar 2020 06:34:27 +0000 (16:34 +1000)]
llvmpipe: add interp instruction support
This allows interpolating an attribute at offset/sample/centroid
locations.
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5050>
Dave Airlie [Tue, 12 May 2020 20:49:07 +0000 (06:49 +1000)]
llvmpipe/interp: refactor out centroid calculations
These will be reused in the interp instruction code.
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5050>
Dave Airlie [Tue, 12 May 2020 20:47:14 +0000 (06:47 +1000)]
llvmpipe/interp: refactor out use of pixel center offset
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5050>
Dave Airlie [Fri, 27 Mar 2020 06:33:28 +0000 (16:33 +1000)]
gallivm/nir: add an interpolation interface.
This supports interpolating at a certain location, offsets,
sample or centroid.
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5050>
Dave Airlie [Thu, 7 May 2020 22:36:59 +0000 (08:36 +1000)]
llvmpipe: remove non-simple interpolation paths.
These are broken since adding multisample, and unused for
quite a while.
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5050>
Dave Airlie [Thu, 16 Apr 2020 06:10:34 +0000 (16:10 +1000)]
llvmpipe/interp: fix interpolating frag pos for sample shading
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5050>
Dave Airlie [Thu, 7 May 2020 01:25:01 +0000 (11:25 +1000)]
llvmpipe: use per-sample position not sample id for interp
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5050>
Dave Airlie [Mon, 6 Apr 2020 06:57:47 +0000 (16:57 +1000)]
llvmpipe: don't use sample mask with 0 samples
piglit:
spec/arb_sample_shading/builtin-gl-sample-mask 0
spec/arb_sample_shading/builtin-gl-sample-mask-simple 0
CTS:
KHR-GL45.sample_variables.mask.rgba8.samples_0.mask_zero
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5050>
Dave Airlie [Mon, 18 May 2020 06:40:55 +0000 (16:40 +1000)]
r600/sfn: add emit if start cayman support
Reviewed-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5084>
Dave Airlie [Mon, 18 May 2020 06:36:46 +0000 (16:36 +1000)]
r600/sfn: add callstack non-evergreen support
Reviewed-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5084>
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