mesa.git
2 years agovc4: Declare the last cpu pointer as being modified in NEON asm.
Emil Velikov [Tue, 29 Jan 2019 17:25:17 +0000 (17:25 +0000)]
vc4: Declare the last cpu pointer as being modified in NEON asm.

Earlier commit addressed 7 of the 8 instances available.

v2: Rebase patch back to master (by anholt)

Cc: Carsten Haitzler (Rasterman) <raster@rasterman.com>
Cc: Eric Anholt <eric@anholt.net>
Fixes: 300d3ae8b14 ("vc4: Declare the cpu pointers as being modified in NEON asm.")
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
2 years agodocs: Add relnotes stub for 19.1
Dylan Baker [Tue, 29 Jan 2019 23:32:16 +0000 (15:32 -0800)]
docs: Add relnotes stub for 19.1

2 years agobump version for 19.0 branch
Dylan Baker [Tue, 29 Jan 2019 23:30:25 +0000 (15:30 -0800)]
bump version for 19.0 branch

2 years agoautomake: Add include dir for nir src directory
Dylan Baker [Tue, 29 Jan 2019 22:25:46 +0000 (14:25 -0800)]
automake: Add include dir for nir src directory

Fixes: 6281f26f064ada36b57d45feb68d8e7d783198c9
       ("v3d: Add support for shader_image_load_store.")
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
2 years agoautomake: Add float64.glsl to dist tarball
Dylan Baker [Tue, 29 Jan 2019 22:19:00 +0000 (14:19 -0800)]
automake: Add float64.glsl to dist tarball

Fixes: b63a1f8e40b6705d6a1d806fbd38dcd197d4229b
       ("glsl: Create file to contain software fp64 functions")
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
2 years agoautomake: Fix path to generated source
Dylan Baker [Tue, 29 Jan 2019 17:52:39 +0000 (09:52 -0800)]
automake: Fix path to generated source

Fixes: b63a1f8e40b6705d6a1d806fbd38dcd197d4229b
       ("glsl: Create file to contain software fp64 functions")
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
2 years agonir: Optimize double-precision lower_round_even()
Matt Turner [Sun, 27 Jan 2019 20:38:19 +0000 (12:38 -0800)]
nir: Optimize double-precision lower_round_even()

Use the trick of adding and then subtracting 2**52 (52 is the number of
explicit mantissa bits a double-precision floating-point value has) to
implement round-to-even.

Cuts the number of instructions on SKL of the piglit test
fs-roundEven-double.shader_test from 109 to 21.

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
2 years agoac: use the correct LLVM processor name on Raven2
Marek Olšák [Mon, 28 Jan 2019 15:56:11 +0000 (10:56 -0500)]
ac: use the correct LLVM processor name on Raven2

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2 years agov3d: Fix the autotools build.
Eric Anholt [Tue, 29 Jan 2019 22:00:27 +0000 (14:00 -0800)]
v3d: Fix the autotools build.

Noticed while looking at the gitlab-CI MR.

2 years agofreedreno: fix sysmem rendering being used when clear is used
Jonathan Marek [Wed, 23 Jan 2019 20:07:31 +0000 (15:07 -0500)]
freedreno: fix sysmem rendering being used when clear is used

This batch->cleared value is only used to decide to use sysmem rendering
or not, so it should include any buffers that are affected by a clear.

This is required because the a2xx fast clear doesn't work with sysmem
rendering. The a22x "normal" clear path doesn't work with sysmem either.

Signed-off-by: Jonathan Marek <jonathan@marek.ca>
2 years agofreedreno: fix depth usage logic
Jonathan Marek [Mon, 21 Jan 2019 16:04:47 +0000 (11:04 -0500)]
freedreno: fix depth usage logic

Depth can be used even when there is no restore/resolve of depth. This
happens when the depth buffer is invalidated after rendering to avoid
the resolve operation.

Signed-off-by: Jonathan Marek <jonathan@marek.ca>
2 years agofreedreno: fix invalidate logic
Jonathan Marek [Mon, 21 Jan 2019 16:32:30 +0000 (11:32 -0500)]
freedreno: fix invalidate logic

Set dirty bits on invalidate to trigger invalidate logic in fd_draw_vbo.

Also, resource_written for color needs to be after the invalidate logic.

Signed-off-by: Jonathan Marek <jonathan@marek.ca>
2 years agomesa/st: wire up DiscardFramebuffer
Jonathan Marek [Mon, 21 Jan 2019 16:29:59 +0000 (11:29 -0500)]
mesa/st: wire up DiscardFramebuffer

Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Reviewed-by: Eric Anholt <eric@anholt.net>
2 years agomesa: wire up InvalidateFramebuffer
Rob Clark [Thu, 1 Nov 2018 15:10:46 +0000 (11:10 -0400)]
mesa: wire up InvalidateFramebuffer

And before someone actually starts implementing DiscardFramebuffer()
lets rework the interface to something that is actually usable.

Signed-off-by: Rob Clark <robdclark@gmail.com>
Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
2 years agost/dri: invalidate_resource depth/stencil before flush_resource
Jonathan Marek [Mon, 21 Jan 2019 16:02:11 +0000 (11:02 -0500)]
st/dri: invalidate_resource depth/stencil before flush_resource

This allows freedreno to be aware of the depth invalidate when flushing
batches on flush_resource.

AFAIK, the only other driver which might care about this change is vc4,
where I think it should help by allowing the depth invalidate to work with
GALLIUM_HUD.

Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Reviewed-by: Eric Anholt <eric@anholt.net>
2 years agoegl/wayland-drm: Only announce formats via wl_drm which the driver supports.
Mario Kleiner [Wed, 13 Jun 2018 04:04:15 +0000 (06:04 +0200)]
egl/wayland-drm: Only announce formats via wl_drm which the driver supports.

Check if a pixel format is supported by the Wayland servers gpu driver
before exposing it to the client via wl_drm, so we avoid reporting formats
to the client which the server gpu can't handle.

Restrict this reporting to the new color depth 30 formats for now, as the
ARGB/XRGB8888 and RGB565 formats are probably supported by every gpu under
the sun.

Atm. this is mostly useful to allow proper PRIME renderoffload for depth
30 formats on the typical Intel iGPU + NVidia dGPU "NVidia Optimus" laptop
combo.

Tested on Intel, AMD, NVidia with single-gpu setup and on a Intel + NVidia
Optimus setup.

Signed-off-by: Mario Kleiner <mario.kleiner.de@gmail.com>
Reviewed-by: Adam Jackson <ajax@redhat.com>
Reviewed-by: Daniel Stone <daniels@collabora.com>
2 years agoegl/wayland: Allow client->server format conversion for PRIME offload. (v2)
Mario Kleiner [Wed, 13 Jun 2018 04:04:14 +0000 (06:04 +0200)]
egl/wayland: Allow client->server format conversion for PRIME offload. (v2)

Support PRIME render offload between a Wayland server gpu and a Wayland
client gpu with different channel ordering for their color formats,
e.g., between Intel drivers which currently only support ARGB2101010
and XRGB2101010 import/display and nouveau which only supports ABGR2101010
rendering and display on nv-50 and later.

In the wl_visuals table, we also store for each format an alternate
sibling format which stores colors at the same precision, but with
different channel ordering, e.g., ARGB2101010 <-> ABGR2101010.

If a given client-gpu renderable format is not supported by the server
for import, but the alternate format is supported by the server, expose
the client-gpu renderable format as a valid EGLConfig to the client. At
eglSwapBuffers time, during the blitImage() detiling blit from the client
backbuffer to the linear buffer, the client format is converted to the
server supported format. As we have to do a copy for PRIME anyway,
this channel swizzling conversion comes essentially for free.

Note that even if a server gpu in principle does support sampling
from the clients native format, this conversion will be a performance
advantage if it allows to convert to the servers preferred format
for direct scanout, as the Wayland compositor may then be able to
directly page-flip a fullscreen client wl_buffer onto the primary
plane, or onto a hardware overlay plane, avoiding an extra data copy
for desktop composition.

Tested so far under Weston with: nouveau single-gpu, Intel single-gpu,
AMD single-gpu, "Optimus" Intel server iGPU for display + NVidia
client dGPU for rendering.

v2: Implement minor review comments by Eric Engestrom: Add some
    comment and assert, and some style fixes for clarity.
    No functional change.

Signed-off-by: Mario Kleiner <mario.kleiner.de@gmail.com>
Reviewed-by: Adam Jackson <ajax@redhat.com>
Reviewed-by: Daniel Stone <daniels@collabora.com>
2 years agointel/fs: Use split sends for surface writes on gen9+
Jason Ekstrand [Fri, 16 Nov 2018 16:46:27 +0000 (10:46 -0600)]
intel/fs: Use split sends for surface writes on gen9+

Surface reads don't need them because they just have the one address
payload.  With surface writes, on the other hand, we can put the address
and the data in the different halves and avoid building the payload all
together.

The decrease in register pressure and added freedom in register
allocation resulting from this change reduces spilling enough to improve
the performance of one customer benchmark by about 2x.

Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
2 years agointel/fs: Add interference between SENDS sources
Jason Ekstrand [Tue, 29 Jan 2019 05:24:24 +0000 (23:24 -0600)]
intel/fs: Add interference between SENDS sources

Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
2 years agointel/fs: Support SENDS in SHADER_OPCODE_SEND
Jason Ekstrand [Fri, 16 Nov 2018 03:05:08 +0000 (21:05 -0600)]
intel/fs: Support SENDS in SHADER_OPCODE_SEND

Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
2 years agointel/disasm: Properly disassemble split sends
Jason Ekstrand [Fri, 16 Nov 2018 21:17:25 +0000 (15:17 -0600)]
intel/disasm: Properly disassemble split sends

Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
2 years agointel/eu: Add support for the SENDS[C] messages
Jason Ekstrand [Thu, 15 Nov 2018 21:17:06 +0000 (15:17 -0600)]
intel/eu: Add support for the SENDS[C] messages

Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
2 years agointel/inst: Indent some code
Jason Ekstrand [Thu, 15 Nov 2018 23:40:32 +0000 (17:40 -0600)]
intel/inst: Indent some code

We're about to add some more if cases so let's have the giant re-indent
in it's own patch to make review easier.

Acked-by: Iago Toral Quiroga <itoral@igalia.com>
2 years agointel/inst: Fix the ia16_addr_imm helpers
Jason Ekstrand [Fri, 16 Nov 2018 19:03:31 +0000 (13:03 -0600)]
intel/inst: Fix the ia16_addr_imm helpers

These have clearly never seen any use.... On gen8, the bottom 4 bits are
missing so we need to shift them off before we call set_bits and shift
again when we get the bits.  Found by inspection.

Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
2 years agointel/disasm: Rework SEND decoding to use descriptors
Jason Ekstrand [Fri, 16 Nov 2018 20:49:25 +0000 (14:49 -0600)]
intel/disasm: Rework SEND decoding to use descriptors

Instead of fetching the information out of the instruction directly,
fetch the descriptor and then pluck the information out of the
descriptor.  The current scheme works ok for SEND but with SENDS, it all
falls to pieces because the descriptor is completely shuffled around.

This commit doesn't actually convert everything.  One notable exception
is URB messages which don't even use descriptors in emit_urb_WRITE yet.

Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
2 years agointel/eu: Add more message descriptor helpers
Jason Ekstrand [Sat, 17 Nov 2018 00:45:46 +0000 (18:45 -0600)]
intel/eu: Add more message descriptor helpers

We want to be able to extract data from descriptors as well as unify a
bit of the descriptor construction.

One of the unifications we do is to unify the read/write and dataport
descriptors.  On gen4-5, read/write are substantially different and the
read descriptors change between gen4 and gen4.x.  On gen6, they unified
layouts between read, write, and dataport.  Then, on gen8, they added
one bit to the message type field but left it reserved MBZ for
read/write messages.  This commit chooses to treat that as if they
expanded the field everywhere and just didn't have enough enum values
for read/write to bother with the extra bit.

Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
2 years agointel/eu/validate: SEND restrictions also apply to SENDC
Jason Ekstrand [Fri, 16 Nov 2018 22:25:12 +0000 (16:25 -0600)]
intel/eu/validate: SEND restrictions also apply to SENDC

Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
2 years agointel/eu: Use GET_BITS in brw_inst_set_send_ex_desc
Jason Ekstrand [Thu, 15 Nov 2018 21:05:57 +0000 (15:05 -0600)]
intel/eu: Use GET_BITS in brw_inst_set_send_ex_desc

It's a bit more readable

Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
2 years agointel/fs: Use SHADER_OPCODE_SEND for varying UBO pulls on gen7+
Jason Ekstrand [Thu, 1 Nov 2018 21:04:01 +0000 (16:04 -0500)]
intel/fs: Use SHADER_OPCODE_SEND for varying UBO pulls on gen7+

Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
2 years agointel/fs: Use SHADER_OPCODE_SEND for texturing on gen7+
Jason Ekstrand [Tue, 30 Oct 2018 20:47:39 +0000 (15:47 -0500)]
intel/fs: Use SHADER_OPCODE_SEND for texturing on gen7+

Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
2 years agointel/fs: Use a logical opcode for IMAGE_SIZE
Jason Ekstrand [Wed, 31 Oct 2018 14:52:33 +0000 (09:52 -0500)]
intel/fs: Use a logical opcode for IMAGE_SIZE

Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
2 years agointel/fs: Use SHADER_OPCODE_SEND for surface messages
Jason Ekstrand [Tue, 30 Oct 2018 17:23:44 +0000 (12:23 -0500)]
intel/fs: Use SHADER_OPCODE_SEND for surface messages

Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
2 years agointel/fs: Add a generic SEND opcode
Jason Ekstrand [Mon, 29 Oct 2018 20:06:14 +0000 (15:06 -0500)]
intel/fs: Add a generic SEND opcode

Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
2 years agointel/eu: Rework surface descriptor helpers
Jason Ekstrand [Mon, 29 Oct 2018 21:09:30 +0000 (16:09 -0500)]
intel/eu: Rework surface descriptor helpers

This commit pulls the surface descriptor helpers out into brw_eu.h and
makes them no longer depend on the codegen infrastructure.  This should
allow us to use them directly from the IR code instead of the generator.
This change is unfortunately less mechanical than perhaps one would like
but it should be fairly straightforward.

Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
2 years agointel/eu: Add has_simd4x2 bools to surface_write functions
Jason Ekstrand [Thu, 1 Nov 2018 19:15:58 +0000 (14:15 -0500)]
intel/eu: Add has_simd4x2 bools to surface_write functions

Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
2 years agointel/fs: Take an explicit exec size in brw_surface_payload_size()
Jason Ekstrand [Thu, 1 Nov 2018 18:40:31 +0000 (13:40 -0500)]
intel/fs: Take an explicit exec size in brw_surface_payload_size()

Instead of magically falling back to SIMD8 for atomics and typed
messages on Ivy Bridge, explicitly figure out the exec size and pass
that into brw_surface_payload_size.

Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
2 years agointel/fs: Handle IMAGE_SIZE in size_read() and is_send_from_grf()
Jason Ekstrand [Wed, 31 Oct 2018 15:18:21 +0000 (10:18 -0500)]
intel/fs: Handle IMAGE_SIZE in size_read() and is_send_from_grf()

Like all the other sends, it's just mlen * REG_SIZE.

Fixes: 3cbc02e4693 "intel: Use TXS for image_size when we have..."
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
2 years agointel/defines: Explicitly cast to uint32_t in SET_FIELD and SET_BITS
Jason Ekstrand [Mon, 29 Oct 2018 22:17:43 +0000 (17:17 -0500)]
intel/defines: Explicitly cast to uint32_t in SET_FIELD and SET_BITS

If you pass a bool in as the value to set, the C standard says that it
gets converted to an int prior to shifting.  If you try to set a bool to
bit 31, this lands you in undefined behavior.  It's better just to add
the explicit cast and let the compiler delete it for us.

Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
2 years agointel/fs: Get rid of fs_inst::equals
Jason Ekstrand [Fri, 25 Jan 2019 19:30:36 +0000 (13:30 -0600)]
intel/fs: Get rid of fs_inst::equals

There are piles of fields that it doesn't check so using it is a lie.
The only reason why it's not causing problem is because it has exactly
one user which only uses it for MOV instructions (which aren't very
interesting) and only on Sandy Bridge and earlier hardware.  Just get
rid of it and inline it in the one place that it's actually used.

Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
2 years agofreedreno: minor cleanups
Rob Clark [Tue, 29 Jan 2019 17:29:16 +0000 (12:29 -0500)]
freedreno: minor cleanups

Signed-off-by: Rob Clark <robdclark@gmail.com>
2 years agofreedreno: stop frob'ing pipe_resource::nr_samples
Rob Clark [Tue, 29 Jan 2019 17:23:28 +0000 (12:23 -0500)]
freedreno: stop frob'ing pipe_resource::nr_samples

Previously we tried to normalize nr_samples to MAX2(1, nr_samples) to
avoid having to deal with 0 vs 1 everywhere.  But this causes problems
in mesa/st, for example st_finalize_texture() will think there is a
nr_samples mismatch and recreate the texture.  Somehow this manifests
as corrupt x11 font rendering on generations that do not support MSAA
(but apparently works fine on a5xx and a6xx which do support MSAA.)

Fixes: cf0c7258ee0 freedreno/a5xx: MSAA
Signed-off-by: Rob Clark <robdclark@gmail.com>
2 years agofreedreno/a6xx: fix blitter nr_samples check
Rob Clark [Tue, 29 Jan 2019 17:22:08 +0000 (12:22 -0500)]
freedreno/a6xx: fix blitter nr_samples check

nr_samples for non-MSAA case could be either zero or one.

Signed-off-by: Rob Clark <robdclark@gmail.com>
2 years agofreedreno/a5xx: fix blitter nr_samples check
Rob Clark [Tue, 29 Jan 2019 17:21:19 +0000 (12:21 -0500)]
freedreno/a5xx: fix blitter nr_samples check

nr_samples for non-MSAA case could be either zero or one.

Signed-off-by: Rob Clark <robdclark@gmail.com>
2 years agoradv: Enable VK_EXT_memory_priority.
Bas Nieuwenhuizen [Mon, 28 Jan 2019 01:09:07 +0000 (02:09 +0100)]
radv: Enable VK_EXT_memory_priority.

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
2 years agoradv/winsys: Add priority handling during submit.
Bas Nieuwenhuizen [Mon, 28 Jan 2019 00:23:14 +0000 (01:23 +0100)]
radv/winsys: Add priority handling during submit.

Switched to the raw bo list api to avoid having to use 2 arrays for
everything.

This was introduced in libdrm 2.4.97 which we already depend upon.

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
2 years agoradv/winsys: Set winsys bo priority on creation.
Bas Nieuwenhuizen [Sun, 27 Jan 2019 23:28:05 +0000 (00:28 +0100)]
radv/winsys: Set winsys bo priority on creation.

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
2 years agoradv: re-enable fast depth clears for 16-bit surfaces on VI
Samuel Pitoiset [Mon, 28 Jan 2019 16:41:07 +0000 (17:41 +0100)]
radv: re-enable fast depth clears for 16-bit surfaces on VI

This has been disabled some months ago because it introduced
rendering issues with Shadow Of Warrier II (DXVK). This game is
no longer affected, I wonder if 824cfc1ee5e ("radv: rework the
TC-compat HTILE hardware bug with COND_EXEC") fixed the problem.
I checked The Forest on my Polaris, and it renders fine too.

According to Phillip, this gives +5.5% with Rise Of The Tomb
Raider and DXVK. This is because DXVK  uses 16-bit depth surfaces
while the native port from Feral uses 32-bit depth surfaces.

Unfortunately, Shadow Of The Tomb Raider isn't affected because
it clears each layer of a D16 array texture individually. So it
doesn't hit the fast clear path.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
2 years agovc4: Enable NEON asm on meson cross-builds.
Eric Anholt [Mon, 28 Jan 2019 19:39:12 +0000 (11:39 -0800)]
vc4: Enable NEON asm on meson cross-builds.

The core Mesa with_asm_arch and USE_ARM_ASM flags are disabled for meson
cross-builds because of the need to run host binaries on the build system.
vc4 doesn't need to do that, so skip with_asm_arch to enable NEON on my
cross-builds.

Fixes: ebcb4c2156e9 ("meson: Enable VC4's NEON assembly support.")
2 years agovc4: Declare the cpu pointers as being modified in NEON asm.
Carsten Haitzler (Rasterman) [Tue, 8 Jan 2019 16:28:30 +0000 (16:28 +0000)]
vc4: Declare the cpu pointers as being modified in NEON asm.

Otherwise, the compiler is free to reuse the register containing the input
for another call and assume that the value hasn't been modified.  Fixes
crashes on texture upload/download with current gcc.

We now have to have a temporary for the cpu2 value, since outputs must be
lvalues.

(commit message by anholt)

Fixes: 4d30024238ef ("vc4: Use NEON to speed up utile loads on Pi2.")
2 years agovc4: Use named parameters for the NEON inline asm.
Carsten Haitzler (Rasterman) [Tue, 8 Jan 2019 16:05:25 +0000 (16:05 +0000)]
vc4: Use named parameters for the NEON inline asm.

This makes the asm code more intelligible and clarifies the functional
change in the next commit.

(commit message and commit squashing by anholt)

2 years agokmsro: Add freedreno renderonly support
Jonathan Marek [Mon, 28 Jan 2019 02:05:33 +0000 (21:05 -0500)]
kmsro: Add freedreno renderonly support

Signed-off-by: Jonathan Marek <jonathan@marek.ca>
2 years agofreedreno: a2xx: add perfcntrs
Jonathan Marek [Mon, 28 Jan 2019 15:09:39 +0000 (10:09 -0500)]
freedreno: a2xx: add perfcntrs

Based on a5xx perfcntrs implementation.

Signed-off-by: Jonathan Marek <jonathan@marek.ca>
2 years agofreedreno: a2xx: minor solid_vertexbuf fixups
Jonathan Marek [Wed, 23 Jan 2019 20:03:55 +0000 (15:03 -0500)]
freedreno: a2xx: minor solid_vertexbuf fixups

The big thing here is the 0x60 offset for the mem2gmem copy which I missed
in my last patch.

Signed-off-by: Jonathan Marek <jonathan@marek.ca>
2 years agofreedreno: a2xx: clear fixes and fast clear path
Jonathan Marek [Mon, 28 Jan 2019 17:49:54 +0000 (12:49 -0500)]
freedreno: a2xx: clear fixes and fast clear path

This fixes the depth/stencil clear on a20x, and adds a fast clear path.

The fast clear path is only used for a20x, needs performance tests on a22x.

Signed-off-by: Jonathan Marek <jonathan@marek.ca>
2 years agofreedreno: a2xx: a20x hw binning
Jonathan Marek [Wed, 19 Dec 2018 04:33:54 +0000 (23:33 -0500)]
freedreno: a2xx: a20x hw binning

Signed-off-by: Jonathan Marek <jonathan@marek.ca>
2 years agofreedreno: update a2xx registers
Jonathan Marek [Mon, 28 Jan 2019 13:01:28 +0000 (08:01 -0500)]
freedreno: update a2xx registers

Signed-off-by: Jonathan Marek <jonathan@marek.ca>
2 years agoglsl: use remap location when serialising uniform program resource data
Timothy Arceri [Mon, 28 Jan 2019 06:15:34 +0000 (17:15 +1100)]
glsl: use remap location when serialising uniform program resource data

This allows us to avoid expensive string compares since we already have
a map to the pointers.

These compares were taking ~30 seconds for a single shader compile
in Godot due to it using 64,000+ uniforms.

Fixes: c4cff5f40254 ("glsl: add basic support for resource list to shader cache")
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=109229

2 years agomeson: Fix typo.
Vinson Lee [Sat, 26 Jan 2019 08:21:06 +0000 (00:21 -0800)]
meson: Fix typo.

meson.build:166:21: ERROR:  Unknown method "verson_compare" for a string.

Fixes: c1efa240c91e ("meson: Add warnings and errors when using ICC")
Signed-off-by: Vinson Lee <vlee@freedesktop.org>
Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Reviewed-by: Eric Engestrom <eric.engestrom@intel.com>
Cc: 18.3 <mesa-stable@lists.freedesktop.org>
2 years agofreedreno: a2xx: enable early-Z testing
Jonathan Marek [Fri, 23 Nov 2018 15:58:11 +0000 (10:58 -0500)]
freedreno: a2xx: enable early-Z testing

Enable earlyZ when alpha test is disabled.

Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Reviewed-by: Rob Clark <robdclark@gmail.com>
2 years agofreedreno: a2xx: ir2 cleanup
Jonathan Marek [Wed, 23 Jan 2019 22:43:28 +0000 (17:43 -0500)]
freedreno: a2xx: ir2 cleanup

Reviewed-by: Rob Clark <robdclark@gmail.com>
2 years agoSwitch imx to kmsro and remove the imx winsys
Rob Herring [Thu, 24 Jan 2019 20:03:54 +0000 (14:03 -0600)]
Switch imx to kmsro and remove the imx winsys

The kmsro winsys is equivalent to the imx winsys, so we can switch
to it and remove the imx one.

Signed-off-by: Rob Herring <robh@kernel.org>
2 years agokmsro: Add etnaviv renderonly support
Rob Herring [Wed, 23 Jan 2019 22:08:08 +0000 (16:08 -0600)]
kmsro: Add etnaviv renderonly support

Enable using etnaviv for KMS renderonly. This still needs KMS driver
name mapping to kmsro to be used automatically.

Acked-by: Eric Anholt <eric@anholt.net>
Signed-off-by: Rob Herring <robh@kernel.org>
2 years agokmsro: Extend to include hx8357d.
Eric Anholt [Wed, 24 Oct 2018 22:31:32 +0000 (15:31 -0700)]
kmsro: Extend to include hx8357d.

This allows vc4 to initialize on the Adafruit PiTFT 3.5" touchscreen with
the hx8357d tinydrm driver

v2: Whitespace fix noted by Eric Engestrom, update commit message for the
    driver being merged.
v3: Rebase on Rob Herring's pipe-loader changes.

Acked-by: Eric Engestrom <eric.engestrom@intel.com> (v1)
Acked-by: Emil Velikov <emil.velikov@collabora.com> (v1)
2 years agopipe-loader: Fallback to kmsro driver when no matching driver name found
Rob Herring [Thu, 24 Jan 2019 22:36:00 +0000 (16:36 -0600)]
pipe-loader: Fallback to kmsro driver when no matching driver name found

If we can't find a driver matching by name, then use the kmsro driver.
This removes the need for needing a driver descriptor for every possible
KMS driver.

Signed-off-by: Rob Herring <robh@kernel.org>
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Eric Anholt <eric@anholt.net>
2 years agopl111: Rename the pl111 driver to "kmsro".
Eric Anholt [Tue, 23 Oct 2018 19:33:09 +0000 (12:33 -0700)]
pl111: Rename the pl111 driver to "kmsro".

The vc4 driver can do prime sharing to many different KMS-only devices,
such as the various tinydrm drivers for SPI-attached displays.  Rename the
driver away from "pl111" to represent what it will actually support:
various sorts of KMS displays with the renderonly layer used to attach a
GPU.

Reviewed-by: Eric Engestrom <eric.engestrom@intel.com>
Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Acked-by: Emil Velikov <emil.velikov@collabora.com>
2 years agoradv: set noalias/dereferenceable LLVM attributes based on param types
Samuel Pitoiset [Fri, 25 Jan 2019 08:21:33 +0000 (09:21 +0100)]
radv: set noalias/dereferenceable LLVM attributes based on param types

Instead of using this useless array_params_mask variable.
This should set these two attributes to streamout buffers too.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
2 years agoradv: simplify allocating user SGPRS for descriptor sets
Samuel Pitoiset [Fri, 25 Jan 2019 08:21:32 +0000 (09:21 +0100)]
radv: simplify allocating user SGPRS for descriptor sets

Unnecesary to check the current stages if desc_set_used_mask
is used.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
2 years agoradv: remove radv_userdata_info::indirect field
Samuel Pitoiset [Fri, 25 Jan 2019 08:21:31 +0000 (09:21 +0100)]
radv: remove radv_userdata_info::indirect field

Always false.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
2 years agomesa/main: Expose EXT_sRGB_write_control
Gert Wollny [Tue, 13 Nov 2018 11:36:44 +0000 (12:36 +0100)]
mesa/main: Expose EXT_sRGB_write_control

Use EXT_framebuffer_sRGB to expose EXT_sRGB_write_control on GLES. Remove
the checks for desktion GL in the enable calls, since EXT_framebuffer_sRGB
now also indicates support for switching the linear-sRGB color
space conversion on GLES.

Thanks to Ilia Mirkin for all the helpful discussions that helped to rework
this series.

v2: Fix alphabetical listing of extensions (Tapani Pälli)

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com> (v1)
2 years agomesa/main/version: Lower the requirements for GLES 3.0
Gert Wollny [Wed, 14 Nov 2018 10:06:30 +0000 (11:06 +0100)]
mesa/main/version: Lower the requirements for GLES 3.0

GLES 3.0 does not actually require support for EXT_framebuffer_sRGB, it
only needs support for sRGB attachments to framebuffers and framebuffer
objects as defined in ARB_framebuffer_objects.

v2: Clarify that ARB_framebuffer_objects is needed.

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2 years agomesa/main: Use flag for EXT_sRGB instead of EXT_framebuffer_sRGB where possible
Gert Wollny [Wed, 14 Nov 2018 09:58:40 +0000 (10:58 +0100)]
mesa/main: Use flag for EXT_sRGB instead of EXT_framebuffer_sRGB where possible

All drivers that support EXT_framebuffer_sRGB also support EXT_sRGB, but
in order to keep this commit minial, and not to break any drivers both
flags are checked.

v2: - Use only EXT_sRGB (Ilia Mirkin)
    - Move adding the flag EXT_sRGB to gl_extensions to a separate patch

v3: use _mesa_has_EXT_framebuffer_sRGB instead of extension flag
    The _mesa_has function also checks for the correct versions and
    should be preferred over using the flags directly (Erik)

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2 years agomesa/st: rework support for sRGB framebuffer attachements
Gert Wollny [Tue, 13 Nov 2018 11:18:27 +0000 (12:18 +0100)]
mesa/st: rework support for sRGB framebuffer attachements

For GLES sRGB framebuffer attachemnt support is provided in two steps:
sRGB attachments like described in EXT_sRGB (and GLES 3.0) that enable
linear to sRGB color space transformation automatically, and the ability
to switch formats of the render target surface between sRGB and linear
that introduces full support for EXT_framebuffer_sRGB.
Set the according flags to reflect these two levels of sRGB support.

As a difference between desktopm GL and GLES, on desktop GL for a sRGB
framebuffer attachment the linear-sRGB conversion is turned off by default,
and for GLES it is turned on. This needs to be taken into account when
initally creating a surface, i.e. on desktop GL creation of a sRGB surface
is preferred, but on GLES sRGB surfaces are only created when explicitely
requested.

v2: - Use the new CAPS name

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2 years agoi965: Set flag for EXT_sRGB
Gert Wollny [Tue, 13 Nov 2018 16:57:46 +0000 (17:57 +0100)]
i965: Set flag for EXT_sRGB

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Reviewed-by: <Gurchetan Singh gurchetansingh@chromium.org>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
2 years agomesa:main: Add flag for EXT_sRGB to gl_extensions
Gert Wollny [Wed, 14 Nov 2018 09:58:57 +0000 (10:58 +0100)]
mesa:main: Add flag for EXT_sRGB to gl_extensions

EXT_sRGB is an (incomplete) GLES extension that provides support for sRGB
framebuffer attachments, hence it can be used to check for this support
as an alternative to EXT_framebuffer_sRGB that provies the same
functionality but also sRGB write control support.

However, since EXT_sRGB  is incomplete and superseted by GLES 3.0 it will
not be exposed as an extension.

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2 years agovirgl: Set sRGB write control CAP based on host capabilities
Gert Wollny [Tue, 13 Nov 2018 10:39:06 +0000 (11:39 +0100)]
virgl: Set sRGB write control CAP based on host capabilities

v2: - Use the renamed CAPS
    - add assetions to make sure that mesa doesn't try to switch
      destination surface formats when it is not supported. (Ilia Mirkin)

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Reviewed-by: Gurchetan Singh <gurchetansingh@chromium.org>
2 years agoGallium: Add new CAPS to indicate whether a driver can switch SRGB write
Gert Wollny [Tue, 13 Nov 2018 10:34:35 +0000 (11:34 +0100)]
Gallium: Add new CAPS to indicate whether a driver can switch SRGB write

Add a new cap that indicates whether the drivers supports
enabling/disabling the conversion from linear space to sRGB
for a framebuffer attachment. In Driver terms that this CAP indicates
whether the driver can switcht between a linear and and a sRGB surface
format for draw destinations witout changing the sourface itself.

v2: rename CAP to DEST_SURFACE_SRGB_CONTROL to reflect its
    purpouse better (pointed out by Ilia Mirkin)

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2 years agospirv: Don't use special semantics when counting vertex attribute size
Neil Roberts [Thu, 24 Jan 2019 13:52:37 +0000 (14:52 +0100)]
spirv: Don't use special semantics when counting vertex attribute size

Under Vulkan, the double vertex attributes take up the same size
regardless of whether they are vertex inputs or any other stage
interface.

Under OpenGL (ARB_gl_spirv), from GLSL 4.60 spec, section 4.3.9
Interface Blocks:

   "It is a compile-time error to have an input block in a vertex
    shader or an output block in a fragment shader. These uses are
    reserved for future use."

So we also don't need to check if it is an vertex input or not, and
use false in any case.

v2: (changes made by Alejandro Piñeiro)
    * Update required after "spirv: Handle location decorations on
      block interface members" own updates (original patch was sent
      several months ago)
    * After Neil suggesting it, confirm that this change can be also
      done for OpenGL (ARB_gl_spirv). Expand commit message.

v3: update after changing name of main method on a previous patch

Signed-off-by: Neil Roberts <nroberts@igalia.com>
Signed-off-by: Alejandro Piñeiro <apinheiro@igalia.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
2 years agoglsl_types: Rename parameter of glsl_count_attribute_slots
Neil Roberts [Wed, 28 Mar 2018 09:00:28 +0000 (11:00 +0200)]
glsl_types: Rename parameter of glsl_count_attribute_slots

glsl_count_attribute_slots takes a parameter to specify whether the
type is being used as a vertex input because on GL double attributes
only take up one slot. Vulkan doesn’t make this distinction so this
patch renames the argument to is_gl_vertex_input in order to make it
more clear that it should always be false on Vulkan.

v2: minor variable renaming (s/member/member_type) (Tapani)

Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
2 years agospirv/nir: handle location decorations on block interface members
Neil Roberts [Fri, 27 Jul 2018 14:05:05 +0000 (16:05 +0200)]
spirv/nir: handle location decorations on block interface members

Previously the code was taking any location decoration on the block
and using that to calculate the member locations for all of the
members. I think this was assuming that there would only be one
location decoration for the entire block. According to the Vulkan spec
it is possible to add location decorations to individual members:

   “If the structure type is a Block but without a Location, then each
    of its members must have a Location decoration. If it is a Block
    with a Location decoration, then its members are assigned
    consecutive locations in declaration order, starting from the
    first member which is initially the Block. Any member with its own
    Location decoration is assigned that location. Each remaining
    member is assigned the location after the immediately preceding
    member in declaration order.”

This patch makes it instead keep track of which members have been
assigned an explicit location. It also has a space to store the
location for the struct as a whole. Once all the decorations have been
processed it iterates over each member to fill in the missing
locations using the rules described above.

So, this commit is needed to get working a case like this, on both
Vulkan and OpenGL using SPIR-V (ARB_gl_spirv):

     out block {
            layout(location = 2) vec4 c;
            layout(location = 3) vec4 d;
            layout(location = 0) vec4 a;
            layout(location = 1) vec4 b;
     } name;

v2: (changes made by Alejandro Piñeiro)
   * Update after introducing struct member splitting (See commit b0c643d)
   * Update after only exposing interface_type for blocks, not to any struct
   * Update after last changes done for xfb support

v3: use "assign" instead of "add" on the new method added (Tapani)

Signed-off-by: Neil Roberts <nroberts@igalia.com>
Signed-off-by: Alejandro Piñeiro <apinheiro@igalia.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
2 years agoetnaviv: add linear sampling support
Christian Gmeiner [Fri, 18 Jan 2019 12:57:27 +0000 (13:57 +0100)]
etnaviv: add linear sampling support

Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Reviewed-by: Lucas Stach <l.stach@pengutronix.de>
2 years agoetnaviv: update headers from rnndb
Christian Gmeiner [Fri, 18 Jan 2019 10:24:54 +0000 (11:24 +0100)]
etnaviv: update headers from rnndb

Update to etna_viv commit 4d2f857.

Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Reviewed-by: Lucas Stach <l.stach@pengutronix.de>
2 years agoetnaviv: extend etna_resource with an addressing mode
Christian Gmeiner [Fri, 18 Jan 2019 09:54:07 +0000 (10:54 +0100)]
etnaviv: extend etna_resource with an addressing mode

Defines how sampler (and pixel pipes) needs to access the data
represented with a resource. The used default is mode is
ETNA_ADDRESSING_MODE_TILED.

Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Reviewed-by: Lucas Stach <l.stach@pengutronix.de>
2 years agonvc0: don't put text segment into bufctx
Ilia Mirkin [Mon, 21 Jan 2019 19:24:57 +0000 (14:24 -0500)]
nvc0: don't put text segment into bufctx

The text segment is shared among multiple contexts, while each one has
its own bufctx. So when reallocating the text segment, some contexts may
end up with stale values in their bufctx's. Instead limit the exposure
to the bufctx to within a single draw.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
2 years agoradv/ac: fix some fp16 handling
Timothy Arceri [Thu, 24 Jan 2019 05:02:17 +0000 (16:02 +1100)]
radv/ac: fix some fp16 handling

Fixes: b722b29f10d4 ("radv: add support for 16bit input/output")
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
2 years agov3d: Create separate sampler states for the various blend formats.
Eric Anholt [Thu, 27 Dec 2018 04:56:49 +0000 (20:56 -0800)]
v3d: Create separate sampler states for the various blend formats.

The sampler border color is encoded in the TMU's blending format (half
floats, 32-bit floats, or integers) and must be clamped to the format's
range unorm/snorm/int ranges by the driver.  Additionally, the TMU doesn't
know about how we're abusing the swizzle to support BGRA, A, and LA, so we
have to pre-swizzle the border color for those.

We don't really want to spend half a kb on sampler states in most cases,
so skip generating the variants when the border color is unused or is
0,0,0,0.

2 years agov3d: Move the sampler state to the long-lived state uploader.
Eric Anholt [Thu, 27 Dec 2018 04:41:42 +0000 (20:41 -0800)]
v3d: Move the sampler state to the long-lived state uploader.

Samplers are small (8-24 bytes), so allocating 4k for them is a huge
waste.

2 years agov3d: Use the symbolic names for wrap modes from the XML.
Eric Anholt [Wed, 23 Jan 2019 19:54:48 +0000 (11:54 -0800)]
v3d: Use the symbolic names for wrap modes from the XML.

2 years agov3d: Fix stencil sampling from a separate-stencil buffer.
Eric Anholt [Fri, 28 Dec 2018 03:37:13 +0000 (19:37 -0800)]
v3d: Fix stencil sampling from a separate-stencil buffer.

When the sampler view is in sample-stencil mode, we need to return uint
stencil values.  To do that, fill in the format table to return R8I, and
have the sampler view point at the separate stencil buffer.

Fixes dEQP-GLES31.functional.stencil_texturing.format.depth32f_stencil8_2d

2 years agov3d: Fix stencil sampling from packed depth/stencil.
Eric Anholt [Wed, 23 Jan 2019 21:17:32 +0000 (13:17 -0800)]
v3d: Fix stencil sampling from packed depth/stencil.

We need to pick the 8-bit unorm value out, not the depth component.

2 years agov3d: Fix release-build warning about utile_h.
Eric Anholt [Fri, 25 Jan 2019 21:46:58 +0000 (13:46 -0800)]
v3d: Fix release-build warning about utile_h.

2 years agov3d: Flush blit jobs immediately after generating them.
Eric Anholt [Tue, 22 Jan 2019 19:05:56 +0000 (11:05 -0800)]
v3d: Flush blit jobs immediately after generating them.

Fixes OOMs in the CTS's packed_pixels.varied_rectangle.* tests -- the
series of texture uploads at the start before texturing occurred would end
up all sitting around as cached jobs for reuse.  By flushing immediately,
peak active BO usage goes from 150M to 40M.

We could maybe put some limits on how many jobs we keep around, but blits
seem particularly unlikely to get reused for other drawing.

2 years agov3d: Fix BO stats accounting for imported buffers.
Eric Anholt [Mon, 21 Jan 2019 21:03:09 +0000 (13:03 -0800)]
v3d: Fix BO stats accounting for imported buffers.

2 years agov3d: Drop maximum number of texture units down to 16.
Eric Anholt [Thu, 17 Jan 2019 22:28:10 +0000 (14:28 -0800)]
v3d: Drop maximum number of texture units down to 16.

This is the GLES 3.2 minmax, and also what the closed source driver does.
Avoids hitting OOMs in the CTS's
dEQP-GLES3.functional.texture.units.all_units.only_cube.1.

2 years agov3d: Avoid duplicating limits defines between gallium and v3d core.
Eric Anholt [Fri, 18 Jan 2019 23:36:15 +0000 (15:36 -0800)]
v3d: Avoid duplicating limits defines between gallium and v3d core.

We don't want to pull the compiler into every include in the gallium
driver, so just make a new little header to store the limits.

2 years agov3d: Fix overly-large vattr_sizes structs.
Eric Anholt [Fri, 18 Jan 2019 23:54:48 +0000 (15:54 -0800)]
v3d: Fix overly-large vattr_sizes structs.

We want one vector size per vector, not per component.

2 years agov3d: Rename gallium-local limits defines from VC5 to V3D.
Eric Anholt [Fri, 18 Jan 2019 23:53:06 +0000 (15:53 -0800)]
v3d: Rename gallium-local limits defines from VC5 to V3D.

The compiler has its limits under V3D_* (like most V3D stuff), so sync up
with that.

2 years agoradv: Remove unused variable.
Bas Nieuwenhuizen [Sun, 27 Jan 2019 12:51:35 +0000 (13:51 +0100)]
radv: Remove unused variable.

Trivial.

2 years agoradv: add device->instance extension dependencies
Niklas Haas [Thu, 22 Nov 2018 23:32:28 +0000 (00:32 +0100)]
radv: add device->instance extension dependencies

From the vulkan spec 33.3 "Extension Dependencies":

"Any device extension that has an instance extension dependency that is
not enabled by vkCreateInstance is considered to be unsupported, hence
it must not be returned by vkEnumerateDeviceExtensionProperties for any
VkPhysicalDevice child of the instance."

Therefore we need to check whether the instance-level extensions are
actually enabled when deciding to support a device-level extension or
not.

Furthermore, we need to do this for all instance-level extensions of any
(transitive) device-level extension dependency, due to the following
paragraph:

"If an extension is supported (as queried by
vkEnumerateInstanceExtensionProperties or
vkEnumerateDeviceExtensionProperties), then required extensions of that
extension must also be supported for the same instance or physical
device."

Finally, because some of these vulkan extensions may be implicitly
promoted to future vulkan core API versions, we can also satisfy the
dependency if the vulkan API version is high enough.

Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
2 years agoradv: correctly use vulkan 1.0 by default
Niklas Haas [Thu, 22 Nov 2018 23:32:29 +0000 (00:32 +0100)]
radv: correctly use vulkan 1.0 by default

From the vulkan spec 3.2 "Instances":

"Providing a NULL VkInstanceCreateInfo::pApplicationInfo or providing an
apiVersion of 0 is equivalent to providing an apiVersion of
VK_MAKE_VERSION(1,0,0)."

Fixes: ffa15861ef7c924a33e1f "radv: UseEnumerateInstanceVersion for the default version."
Reviewed-by: Eric Engestrom <eric.engestrom@intel.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
2 years agoglsl: fix block member alignment validation for vec3
Niklas Haas [Sun, 16 Dec 2018 04:40:14 +0000 (05:40 +0100)]
glsl: fix block member alignment validation for vec3

Section 7.6.2.2 (Standard Uniform Block Layout) of the GL spec says:

    The base offset of the first member of a structure is taken from the
    aligned offset of the structure itself. The base offset of all other
    structure members is derived by taking the offset of the last basic
    machine unit consumed by the previous member and adding one.

The current code does not reflect this last sentence - it effectively
instead aligns up the next offset up to the alignment of the previous
member. This causes an issue in exactly one case:

layout(std140) uniform block {
    layout(offset=0) vec3 var1;
    layout(offset=12) float var2;
};

As per section 7.6.2.1 (Uniform Buffer Object Storage) and elsewhere, a
vec3 consumes 3 floats, i.e. 12 basic machine units. Therefore, `var1`
in the example above consumes units 0-11, with 12 being the first
available offset afterwards. However, before this commit, mesa
incorrectly assumes `var2` must start at offset=16 when using explicit
offsets, which results in a compile-time error. Without explicit
offsets, the shaders actually work fine, indicating that mesa is already
correctly aligning these fields internally. (Just not in the code that
handles explicit buffer offset parsing)

This patch should fix piglit tests:
ssbo-explicit-offset-vec3.vert
ubo-explicit-offset-vec3.vert

Signed-off-by: Niklas Haas <git@haasn.xyz>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>