mesa.git
13 months agonir: Expose the packed attribute attached to glsl_type objects
Boris Brezillon [Mon, 29 Jun 2020 07:29:09 +0000 (09:29 +0200)]
nir: Expose the packed attribute attached to glsl_type objects

This should help code calculating field offsets to get it right when
the structure is marked packed.

Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6472>

13 months agonir/glsl: Consider block interfaces as structs when it comes to size/align calculation
Boris Brezillon [Tue, 30 Jun 2020 10:03:00 +0000 (12:03 +0200)]
nir/glsl: Consider block interfaces as structs when it comes to size/align calculation

Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6472>

13 months agoglsl: Propagate packed info in get_explicit_type_for_size_align()
Boris Brezillon [Fri, 26 Jun 2020 08:27:16 +0000 (10:27 +0200)]
glsl: Propagate packed info in get_explicit_type_for_size_align()

Right now, when calling get_explicit_type_for_size_align() on a packed
struct, the packed attribute is lost and field offsets are wrong.

Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6472>

13 months agospirv: Propagate packed information to glsl_type
Boris Brezillon [Tue, 23 Jun 2020 10:51:49 +0000 (12:51 +0200)]
spirv: Propagate packed information to glsl_type

We need to parse the CPacked decoration early enough to apply it when
calculating field offsets and creating the struct type.

Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6472>

13 months agospirv: Don't accept CPacked decoration on struct members
Boris Brezillon [Tue, 23 Jun 2020 10:49:23 +0000 (12:49 +0200)]
spirv: Don't accept CPacked decoration on struct members

CPacked decoration is only allowed on struct definitions, not struct
members.

Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6472>

13 months agoclover: Call nir_lower_mem_constant_vars
Jason Ekstrand [Wed, 2 Sep 2020 22:43:07 +0000 (17:43 -0500)]
clover: Call nir_lower_mem_constant_vars

Fixes: 26a4c8f375e "clover/nir: Use nir_var_mem_constant for..."
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6472>

13 months agonir: Don't bail too early in lower_mem_constant_vars
Jason Ekstrand [Wed, 2 Sep 2020 22:38:23 +0000 (17:38 -0500)]
nir: Don't bail too early in lower_mem_constant_vars

If there were no constant variables, we would bail out entirely.
However, we may still have constant input pointers coming in from the
client.

Fixes: 4360a8a2b3fce "nir/lower_io: Add support for nir_var_mem_constant"
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6472>

13 months agointel/nir: Stop using nir_lower_vars_to_scratch
Jason Ekstrand [Tue, 14 Jul 2020 21:01:18 +0000 (16:01 -0500)]
intel/nir: Stop using nir_lower_vars_to_scratch

Instead, we do a limited indirect deref lowering and then use
nir_lower_vars_to_explicit_types and nir_lower_explicit_io to lower it
as if it were SSBO or global memory access.  Among other things, this
should enable pointer arithmetic on local variables.  Fun!

The only shader-db change from this change on ICL was a few tiny cycle
count changes in 7 Aztec Ruins compute shaders.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5909>

13 months agonir/lower_indirect_derefs: Add a threshold
Jason Ekstrand [Tue, 14 Jul 2020 18:55:19 +0000 (13:55 -0500)]
nir/lower_indirect_derefs: Add a threshold

Instead of always lowering everything, we add a threshold such that if
the total indirected array size (AoA size) is above that threshold, it
won't lower.  It's assumed that the driver will sort things out somehow
by, for instance, lowering to scratch.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5909>

13 months agointel/compiler: Handle all indirect lowering choices in brw_nir.c
Jason Ekstrand [Tue, 14 Jul 2020 20:19:59 +0000 (15:19 -0500)]
intel/compiler: Handle all indirect lowering choices in brw_nir.c

Since everything flows through NIR and we're doing all of our indirect
deref lowering there now, there's no reason to keep making those
decisions in brw_compiler and stuffing them in the GLSL compiler
structs.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5909>

13 months agozink: generically handle matrix types
Mike Blumenkrantz [Tue, 23 Jun 2020 18:50:37 +0000 (14:50 -0400)]
zink: generically handle matrix types

there's a bunch of glsl 1.10 tests for this

Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6268>

13 months agogallium/util: use uint sampler for stencil-reads
Erik Faye-Lund [Mon, 31 Aug 2020 08:14:02 +0000 (10:14 +0200)]
gallium/util: use uint sampler for stencil-reads

Some drivers can't use float-samplers to read integer textures, so let's
make sure the stenicil-sampler has the right type.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6512>

13 months agoradeonsi: optimize out the loop in si_get_ps_input_cntl
Marek Olšák [Sat, 15 Aug 2020 08:39:30 +0000 (04:39 -0400)]
radeonsi: optimize out the loop in si_get_ps_input_cntl

Use a remap table from a semantic to an index instead of searching
for the correct index.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6340>

13 months agoradeonsi: replace TGSI_SEMANTIC with VARYING_SLOT and FRAG_RESULT
Marek Olšák [Sat, 15 Aug 2020 07:09:34 +0000 (03:09 -0400)]
radeonsi: replace TGSI_SEMANTIC with VARYING_SLOT and FRAG_RESULT

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6340>

13 months agoradeonsi: replace TGSI_INTERPOLATE with INTERP_MODE
Marek Olšák [Sat, 15 Aug 2020 06:46:35 +0000 (02:46 -0400)]
radeonsi: replace TGSI_INTERPOLATE with INTERP_MODE

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6340>

13 months agocompiler: add INTERP_MODE_COLOR for radeonsi
Marek Olšák [Sat, 15 Aug 2020 06:45:05 +0000 (02:45 -0400)]
compiler: add INTERP_MODE_COLOR for radeonsi

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6340>

13 months agoradeonsi: remove si_shader_selector::type
Marek Olšák [Sat, 15 Aug 2020 05:01:08 +0000 (01:01 -0400)]
radeonsi: remove si_shader_selector::type

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6340>

13 months agoradeonsi: change PIPE_SHADER to MESA_SHADER (si_dump_descriptors)
Marek Olšák [Sat, 15 Aug 2020 03:56:05 +0000 (23:56 -0400)]
radeonsi: change PIPE_SHADER to MESA_SHADER (si_dump_descriptors)

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6340>

13 months agoradeonsi: precompute si_*_descriptors_idx in si_shader_selector
Marek Olšák [Sat, 15 Aug 2020 04:56:39 +0000 (00:56 -0400)]
radeonsi: precompute si_*_descriptors_idx in si_shader_selector

It helps remove one use of sel->type.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6340>

13 months agoradeonsi: change PIPE_SHADER to MESA_SHADER (si_shader_dump_disassembly)
Marek Olšák [Sat, 15 Aug 2020 03:56:05 +0000 (23:56 -0400)]
radeonsi: change PIPE_SHADER to MESA_SHADER (si_shader_dump_disassembly)

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6340>

13 months agoradeonsi: remove unused si_shader_context::type
Marek Olšák [Sat, 15 Aug 2020 04:50:27 +0000 (00:50 -0400)]
radeonsi: remove unused si_shader_context::type

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6340>

13 months agoradeonsi: change PIPE_SHADER to MESA_SHADER (si_get_shader_part)
Marek Olšák [Sat, 15 Aug 2020 03:56:05 +0000 (23:56 -0400)]
radeonsi: change PIPE_SHADER to MESA_SHADER (si_get_shader_part)

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6340>

13 months agoradeonsi: change PIPE_SHADER to MESA_SHADER (si_compile_llvm)
Marek Olšák [Sat, 15 Aug 2020 03:56:05 +0000 (23:56 -0400)]
radeonsi: change PIPE_SHADER to MESA_SHADER (si_compile_llvm)

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6340>

13 months agoradeonsi: change PIPE_SHADER to MESA_SHADER (debug flags)
Marek Olšák [Sat, 15 Aug 2020 03:56:05 +0000 (23:56 -0400)]
radeonsi: change PIPE_SHADER to MESA_SHADER (debug flags)

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6340>

13 months agoradeonsi: change PIPE_SHADER to MESA_SHADER (si_shader_context::type)
Marek Olšák [Sat, 15 Aug 2020 03:56:05 +0000 (23:56 -0400)]
radeonsi: change PIPE_SHADER to MESA_SHADER (si_shader_context::type)

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6340>

13 months agoradeonsi: change PIPE_SHADER to MESA_SHADER (si_shader_selector::type)
Marek Olšák [Sat, 15 Aug 2020 03:56:05 +0000 (23:56 -0400)]
radeonsi: change PIPE_SHADER to MESA_SHADER (si_shader_selector::type)

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6340>

13 months agoradeonsi: simplify handling color interp modes in si_emit_spi_map
Marek Olšák [Sat, 15 Aug 2020 06:48:13 +0000 (02:48 -0400)]
radeonsi: simplify handling color interp modes in si_emit_spi_map

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6340>

13 months agoradeonsi: don't execute LDS stores for TCS outputs that are never read
Marek Olšák [Sat, 15 Aug 2020 03:41:13 +0000 (23:41 -0400)]
radeonsi: don't execute LDS stores for TCS outputs that are never read

This is a per-component version of the previous mechanism.

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6340>

13 months agoradeonsi: don't lower indirect IO in GLSL
Marek Olšák [Sat, 22 Aug 2020 12:41:23 +0000 (08:41 -0400)]
radeonsi: don't lower indirect IO in GLSL

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Reviewed-by: Connor Abbott <cwabbott0@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6445>

13 months agoradeonsi: remove in/out/uniform variables from NIR after lowering IO
Marek Olšák [Fri, 14 Aug 2020 23:11:37 +0000 (19:11 -0400)]
radeonsi: remove in/out/uniform variables from NIR after lowering IO

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Reviewed-by: Connor Abbott <cwabbott0@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6445>

13 months agoradeonsi: lower IO intrinsics - complete rewrite of input/output scanning
Marek Olšák [Fri, 14 Aug 2020 22:09:39 +0000 (18:09 -0400)]
radeonsi: lower IO intrinsics - complete rewrite of input/output scanning

Input and output info is gathered from intrinsics. nir_variables are
ignored (and we'll remove them anyway).

This is a prerequisite for ACO, but also makes the IR prettier.
The ac_nir_to_llvm change has to be in this commit.

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Reviewed-by: Connor Abbott <cwabbott0@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6445>

13 months agoac/nir: handle all lowered IO intrinsics
Marek Olšák [Fri, 14 Aug 2020 22:08:20 +0000 (18:08 -0400)]
ac/nir: handle all lowered IO intrinsics

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Connor Abbott <cwabbott0@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6445>

13 months agoradeonsi: clean up code for loading VS inputs
Marek Olšák [Fri, 14 Aug 2020 21:56:42 +0000 (17:56 -0400)]
radeonsi: clean up code for loading VS inputs

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Reviewed-by: Connor Abbott <cwabbott0@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6445>

13 months agoradeonsi: get color interpolation info from shader_info
Marek Olšák [Fri, 14 Aug 2020 23:13:21 +0000 (19:13 -0400)]
radeonsi: get color interpolation info from shader_info

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Reviewed-by: Connor Abbott <cwabbott0@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6445>

13 months agoradeonsi: don't crash if input_usage_mask is 0 for a VS input
Marek Olšák [Fri, 14 Aug 2020 02:12:12 +0000 (22:12 -0400)]
radeonsi: don't crash if input_usage_mask is 0 for a VS input

This will start happening with the lowered IO intrinstics and new scanning
code.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Reviewed-by: Connor Abbott <cwabbott0@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6445>

13 months agofreedreno: fence_server_sync() fixes
Rob Clark [Tue, 1 Sep 2020 22:24:38 +0000 (15:24 -0700)]
freedreno: fence_server_sync() fixes

Two potential problems, batch re-ordering doesn't really play nicely
with fence_server_sync(), so when we switch away from one batch, detect
the case that we need to sync, and if so flush.  The alternative of
trying to track that later batches depend on an earlier batch that had
an in-fence is hairy, and the normal use-case would be to sync at the
beginning of the frame.

But this brings up the second problem, which is that typically we'll get
told to sync on an in-fence before the first draw, which means before
mesa/st flushes down the framebuffer state to the driver.  Which means
we don't yet have the correct batch to attach the fence to.  So we need
to track the in-fence on the context, and transfer it to the batch
before draws, etc.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6575>

13 months agofreedreno: Fix missing rsc->seqno updates
Rob Clark [Tue, 1 Sep 2020 18:23:49 +0000 (11:23 -0700)]
freedreno: Fix missing rsc->seqno updates

There were a couple paths where we weren't getting valid seqno's, which
are supposed to be updated whenever the backing bo is set/changed.  So
wrap that up in a helper to make it harder to mess up.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6575>

13 months agodocs: shift 20.2 rc dates by two weeks to match reality
Eric Engestrom [Wed, 2 Sep 2020 20:44:42 +0000 (22:44 +0200)]
docs: shift 20.2 rc dates by two weeks to match reality

The release candidates have slipped by a couple of weeks, so let's fix
the dates in the calendar.

Signed-off-by: Eric Engestrom <eric@engestrom.ch>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6574>

13 months agodocs: update calendar and link releases notes for 20.1.7
Eric Engestrom [Wed, 2 Sep 2020 20:10:09 +0000 (22:10 +0200)]
docs: update calendar and link releases notes for 20.1.7

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6573>

13 months agodocs: add release notes for 20.1.7
Eric Engestrom [Wed, 2 Sep 2020 19:52:02 +0000 (21:52 +0200)]
docs: add release notes for 20.1.7

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6573>

13 months agoiris: Re-emit push constants if we have a varying workgroup size
Jason Ekstrand [Wed, 2 Sep 2020 18:48:51 +0000 (13:48 -0500)]
iris: Re-emit push constants if we have a varying workgroup size

Fixes: 33c61eb2f10526 "iris: Implement ARB_compute_variable_group_size"
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6570>

13 months agointel/nir: Lower load_num_work_groups to 32-bit if needed
Jason Ekstrand [Tue, 1 Sep 2020 19:46:25 +0000 (14:46 -0500)]
intel/nir: Lower load_num_work_groups to 32-bit if needed

For OpenCL-style kernels, this builtin is 64-bit.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6570>

13 months agointel/fs: Use a single untyped surface read for load_num_work_groups
Jason Ekstrand [Tue, 1 Sep 2020 19:34:44 +0000 (14:34 -0500)]
intel/fs: Use a single untyped surface read for load_num_work_groups

There's no good reason to split this into three.  Sure, CS indirects are
only guaranteed by the spec to be DWORD aligned, but that's all untyped
surface reads require anyway.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6570>

13 months agointel/fs: Don't copy-propagate stride=0 sources into ddx/ddy
Jason Ekstrand [Wed, 2 Sep 2020 15:13:16 +0000 (10:13 -0500)]
intel/fs: Don't copy-propagate stride=0 sources into ddx/ddy

This can come up if, for instance, the shader does a derivative of a
uniform or flat input.  Ideally, NIR would use divergence analysis to
get rid of the derivative in this case but it doesn't right now.  This
fixes a crash in F1 2017.

Cc: mesa-stable@lists.freedesktop.org
Reported-by: Marcin Ślusarz <marcin.slusarz@intel.com>
Tested-by: Marcin Ślusarz <marcin.slusarz@intel.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6564>

13 months agost/mesa: fix lowered IO - don't call st_nir_assign_vs_in_locations twice
Marek Olšák [Tue, 1 Sep 2020 16:19:32 +0000 (12:19 -0400)]
st/mesa: fix lowered IO - don't call st_nir_assign_vs_in_locations twice

If IO is lowered, the second call is a no-op, which breaks:
   spec@!opengl 1.1@gl-1.1-color-material-unused-normal-array

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6540>

13 months agonir: fix a bug in is_dual_slot in nir_io_add_const_offset_to_base
Marek Olšák [Tue, 1 Sep 2020 15:37:07 +0000 (11:37 -0400)]
nir: fix a bug in is_dual_slot in nir_io_add_const_offset_to_base

Fixes: 01ab308edc "nir: update IO semantics in nir_io_add_const_offset_to_base"
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6540>

13 months agoiris: Patch constant data pointers into shaders
Jason Ekstrand [Wed, 12 Aug 2020 00:43:17 +0000 (19:43 -0500)]
iris: Patch constant data pointers into shaders

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6244>

13 months agoanv: Patch constant data pointers into shaders with using softpin
Jason Ekstrand [Sat, 8 Aug 2020 21:29:36 +0000 (16:29 -0500)]
anv: Patch constant data pointers into shaders with using softpin

When we have softpin, we know the address of the shader constant data at
shader upload time because it's sitting at the end of the shader.  This
commit changes ANV to use patch constants to embed the address in the
shader patch the right address in at upload time.  This allows us to
avoid having to set up a UBO binding on-the-fly for shader constants.

This commit uses an A64 message but it's quite possible that we could
also use an A32 message and make the dataport do the 64-bit add for us.
However, load_global is what we have right now so it was easier to just
use that.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6244>

13 months agonir/builder: Add load/store_global helpers
Jason Ekstrand [Tue, 19 May 2020 18:53:41 +0000 (13:53 -0500)]
nir/builder: Add load/store_global helpers

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6244>

13 months agoanv: Properly cache brw_stage_prog_data::relocs
Jason Ekstrand [Mon, 10 Aug 2020 16:46:12 +0000 (11:46 -0500)]
anv: Properly cache brw_stage_prog_data::relocs

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6244>

13 months agointel/fs: Add support for a new load_reloc_const intrinsic
Jason Ekstrand [Sat, 8 Aug 2020 18:56:16 +0000 (13:56 -0500)]
intel/fs: Add support for a new load_reloc_const intrinsic

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6244>

13 months agointel/eu: Add a mechanism for emitting relocatable constant MOVs
Jason Ekstrand [Sat, 8 Aug 2020 17:55:29 +0000 (12:55 -0500)]
intel/eu: Add a mechanism for emitting relocatable constant MOVs

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6244>

13 months agointel/eu: Include brw_compiler.h in brw_eu.h
Jason Ekstrand [Mon, 10 Aug 2020 16:09:10 +0000 (11:09 -0500)]
intel/eu: Include brw_compiler.h in brw_eu.h

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6244>

13 months agoanv: Stop storing the shader constant data side-band
Jason Ekstrand [Sat, 8 Aug 2020 03:31:44 +0000 (22:31 -0500)]
anv: Stop storing the shader constant data side-band

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6244>

13 months agointel/fs,vec4: Stuff the constant data from NIR in the end of the program
Jason Ekstrand [Sat, 8 Aug 2020 03:26:07 +0000 (22:26 -0500)]
intel/fs,vec4: Stuff the constant data from NIR in the end of the program

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6244>

13 months agointel/eu: Add some new helpers
Jason Ekstrand [Sat, 8 Aug 2020 02:59:12 +0000 (21:59 -0500)]
intel/eu: Add some new helpers

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6244>

13 months agoiris: Use gen_disassemble
Jason Ekstrand [Tue, 1 Sep 2020 23:57:52 +0000 (18:57 -0500)]
iris: Use gen_disassemble

This one doesn't require the program size and so it won't mess up if we
have a bunch of constant data at the end.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6244>

13 months agointel/compiler: Get rid of struct gen_disasm
Jason Ekstrand [Tue, 1 Sep 2020 23:39:54 +0000 (18:39 -0500)]
intel/compiler: Get rid of struct gen_disasm

It's just a container around a devinfo.  The one useful purpose it did
serve is that gen_disasm_create initialized the compaction table
singletons.  Now that those no longer exist, this isn't necessary.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6244>

13 months agointel/compiler: Get rid of the global compaction table pointers
Jason Ekstrand [Tue, 1 Sep 2020 23:28:58 +0000 (18:28 -0500)]
intel/compiler: Get rid of the global compaction table pointers

With discrete GPUs, it's going to be possible to have GPUs from two
different hardware generations in the machine at the same time.  Global
singletons like this aren't going to fly.  Have a struct containing the
pointers which gets initialized once per shader disassemble instead.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6244>

13 months agospirv: Deal with glslang not setting NonUniform on constructors.
Bas Nieuwenhuizen [Mon, 31 Aug 2020 19:58:12 +0000 (21:58 +0200)]
spirv: Deal with glslang not setting NonUniform on constructors.

Especially a problem for OpImage/OpSampledImage. Note that the problem
doesn't seem to be propagation through glslang, but only in emitting
the SPIR-V. So it is fine if we are somewhat lossy in handling this, as
long as direct Op(Sampled)Image -> texture op chains work.

Fixes: af81486a8cd "spirv: Simplify our handling of NonUniform"
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/3406
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6451>

13 months agospirv: Deal with glslang bug not setting the decoration for stores.
Bas Nieuwenhuizen [Mon, 24 Aug 2020 22:20:18 +0000 (00:20 +0200)]
spirv: Deal with glslang bug not setting the decoration for stores.

Fixes: af81486a8cd "spirv: Simplify our handling of NonUniform"
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6451>

13 months agoradv: Avoid deadlock on bo_list.
Bas Nieuwenhuizen [Sun, 30 Aug 2020 23:57:36 +0000 (01:57 +0200)]
radv: Avoid deadlock on bo_list.

With the kernel timeline sysncobj changes, the kernel submits do
not necessarily happen in global vkQueueSubmit order. Which should
be fine, we added the appropriate waits for that. (See
DRM_SYNCOBJ_WAIT_FLAGS_WAIT_FOR_SUBMIT in the winsys)

However, all kernel submissions take a lock on the bo_list mutex,
and since we do the wait in the winsys, we wait while having the
bo_list mutex held. This means that as soon as a wait and a signal
submission are out of order we have a deadlock on the bo_list mutex
and the wait.

Solution is to use a shared reader lock during the kernel submission,
as we only need read access for the submission.

Fixes: 6bc5ce7a91d "radv: Add timeline syncobj for timeline semaphores."
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/3446
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6478>

13 months agoradv: Fix threading issue with submission refcounts.
Bas Nieuwenhuizen [Sat, 29 Aug 2020 01:25:02 +0000 (03:25 +0200)]
radv: Fix threading issue with submission refcounts.

If decrement == 0 then:

- it isn't safe to access the submission
- even if it is, checking that the result of the atomic_sub is 0
  doesn't given an unique owner anymore.

So skip it. The submission always starts out with refcount >= 1,
so first one to decrement to 0 still get dibs on executing it.

Fixes: 4aa75bb3bdd "radv: Add wait-before-submit support for timelines."
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6478>

13 months agointel/tools: Disassemble WAIT's argument as a destination
Matt Turner [Tue, 1 Sep 2020 19:09:16 +0000 (12:09 -0700)]
intel/tools: Disassemble WAIT's argument as a destination

WAIT takes a notification register as a destination and a src0 argument.
Since the same notification register is specified in both fields, we
treat it as a special case and disassemble it only once.

If we disassemble it as if it is a source register, its scalar region
will be printed as <0,1,0>. This causes difficulties round-tripping
through the assembler <-> disassembler because that is not an acceptable
destination region. If we instead disassemble the destination, we
instead get a <1> region which is an acceptable and equivalent region
for source and destination.

The test .asm files are regenerated by round-tripping them through the
assembler/disassembler. Note that the <0> region in the tests was a
harmless mistake: the compiler translated it to a <0,1,0> source region
and a <1> destination region, since <0> isn't valid.

Reviewed-by: Sagar Ghuge <sagar.ghuge@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6543>

13 months agogallium/tgsi_exec: Fix up NumOutputs counting
Eric Anholt [Tue, 25 Aug 2020 23:01:47 +0000 (16:01 -0700)]
gallium/tgsi_exec: Fix up NumOutputs counting

We can get duplicate declarations for an index (for example dvec3 + float
packed into 2 vec4s, the second one won't pack into the first's array
decl), and we'd end up stepping by the wrong amount in GS vtx/prim emit.

Fixes vs-gs-fs-double, sso-vs-gs-fs-array-interleave piglit tests.

Fixes: 49155c3264d0 ("draw/tgsi: fix geometry shader input/output swizzling")
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6567>

13 months agogallium/tgsi_exec: Add missing DFLR opcode support.
Eric Anholt [Fri, 24 Jul 2020 19:06:40 +0000 (12:06 -0700)]
gallium/tgsi_exec: Add missing DFLR opcode support.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6567>

13 months agonir/clone: Add a helper for cloning most instruction types
Jason Ekstrand [Mon, 18 May 2020 15:39:43 +0000 (10:39 -0500)]
nir/clone: Add a helper for cloning most instruction types

@anholt needed it for nir_to_tgsi, and the desire comes up frequently.

Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6567>

13 months agonir/opt_vectorize: Add a callback for filtering of vectorizing.
Eric Anholt [Thu, 27 Aug 2020 19:49:13 +0000 (12:49 -0700)]
nir/opt_vectorize: Add a callback for filtering of vectorizing.

For NIR-to-TGSI, we don't want to revectorize 64-bit ops that we split to
scalar beyond vec2 width.  We even have some ops that we would rather
retain as scalar due to TGSI opcodes being scalar, or having more unusual
requirements.

This could be used to do the vectorize_vec2_16bit filtering, but that
shader compiler option is also used in algebraic so leave it in place for
now.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6567>

13 months agonir: Add simplistic lowering for bany_equal/ball_inequal.
Eric Anholt [Sat, 4 Jan 2020 00:33:54 +0000 (16:33 -0800)]
nir: Add simplistic lowering for bany_equal/ball_inequal.

It would be nice if we could do swizzling of an expression on the
replacement side so that we could have a single ieq/ine of the vector
after CSE.  However, if you do want vector operations, nir_opt_vectorize()
does just fine.

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6567>

13 months agogallium/ureg: Set the next shader stage from the shader info.
Eric Anholt [Wed, 8 Jan 2020 20:59:16 +0000 (12:59 -0800)]
gallium/ureg: Set the next shader stage from the shader info.

Saves a loop over the linked shaders in glsl_to_tgsi which the GLSL linker
has already done for us.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6567>

13 months agogallium/tgsi: Add a helper for initializing ureg from a shader_info.
Eric Anholt [Wed, 8 Jan 2020 19:25:35 +0000 (11:25 -0800)]
gallium/tgsi: Add a helper for initializing ureg from a shader_info.

This moves a bunch of code from glsl_to_tgsi that will be reused by
tgsi-to-nir.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6567>

13 months agogallium/tgsi: Add some missing opcodes to tgsi_ureg.
Eric Anholt [Mon, 6 Jan 2020 21:55:55 +0000 (13:55 -0800)]
gallium/tgsi: Add some missing opcodes to tgsi_ureg.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6567>

13 months agogallium/tgsi: Add support for PRIMITIVEID as a system value.
Eric Anholt [Tue, 14 Jan 2020 19:31:22 +0000 (11:31 -0800)]
gallium/tgsi: Add support for PRIMITIVEID as a system value.

NIR always represents this as a system value, so for NIR-to-TGSI we need
this support.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6567>

13 months agogallivm: Report the unsupported intrinsic instead of just assert(0);
Eric Anholt [Fri, 24 Jul 2020 03:38:11 +0000 (20:38 -0700)]
gallivm: Report the unsupported intrinsic instead of just assert(0);

Tripped over this in rendermode with softpipe NIR.

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6567>

13 months agoci: Do not create manual test-docs job in post-merge pipelines
Michel Dänzer [Tue, 1 Sep 2020 09:44:54 +0000 (11:44 +0200)]
ci: Do not create manual test-docs job in post-merge pipelines

Only in pre-merge pipelines for MRs, or in pipelines for forked project
branches.

Having the manual job in post-merge pipelines prevented the pages job
from running automatically as well, which could prevent the public
website from getting updated.

Acked-by: Daniel Stone <daniels@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6534>

13 months agointel/fs,vec4: remove unused assignments
Marcin Ślusarz [Thu, 30 Jul 2020 14:32:16 +0000 (16:32 +0200)]
intel/fs,vec4: remove unused assignments

Reported by Coverity.

Signed-off-by: Marcin Ślusarz <marcin.slusarz@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6126>

13 months agointel/compiler: mark debug constant as const
Marcin Ślusarz [Thu, 30 Jul 2020 14:22:53 +0000 (16:22 +0200)]
intel/compiler: mark debug constant as const

Should quiet Coverity's "'Constant' variable guards dead code".

Signed-off-by: Marcin Ślusarz <marcin.slusarz@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6126>

13 months agointel/compiler/test: use TEST_DEBUG env var consistently
Marcin Ślusarz [Thu, 30 Jul 2020 14:18:37 +0000 (16:18 +0200)]
intel/compiler/test: use TEST_DEBUG env var consistently

Other tests use the same environment variable to decide whether they
should print debugging information.

Will quiet Coverity's "'Constant' variable guards dead code".

Signed-off-by: Marcin Ślusarz <marcin.slusarz@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6126>

13 months agointel/perf: don't generate logically dead code
Marcin Ślusarz [Thu, 30 Jul 2020 13:33:09 +0000 (15:33 +0200)]
intel/perf: don't generate logically dead code

When divisor is constant integer != 0 there's no point in checking
whether it's 0.

Complained about by Coverity.

Signed-off-by: Marcin Ślusarz <marcin.slusarz@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6126>

13 months agoi965: verify format width in blorp_get_client_bo
Marcin Ślusarz [Thu, 30 Jul 2020 12:56:44 +0000 (14:56 +0200)]
i965: verify format width in blorp_get_client_bo

Coverity complains about possible "Division or modulo by zero".

Signed-off-by: Marcin Ślusarz <marcin.slusarz@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6126>

13 months agoiris: verify color component width in convert_fast_clear_color
Marcin Ślusarz [Thu, 30 Jul 2020 12:40:21 +0000 (14:40 +0200)]
iris: verify color component width in convert_fast_clear_color

Coverity complains about possible 2^32-1 bit shift.

Signed-off-by: Marcin Ślusarz <marcin.slusarz@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6126>

13 months agoiris: handle os_dupfd_cloexec failure
Marcin Ślusarz [Thu, 30 Jul 2020 12:29:56 +0000 (14:29 +0200)]
iris: handle os_dupfd_cloexec failure

Found by Coverity.

Signed-off-by: Marcin Ślusarz <marcin.slusarz@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6126>

13 months agofreedreno/computerator: Use a render node
Connor Abbott [Wed, 2 Sep 2020 14:00:38 +0000 (16:00 +0200)]
freedreno/computerator: Use a render node

Fixes headless systems.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6562>

13 months agointel/compiler: Fix pointer arithmetic when reading shader assembly
Danylo Piliaiev [Wed, 2 Sep 2020 10:37:47 +0000 (13:37 +0300)]
intel/compiler: Fix pointer arithmetic when reading shader assembly

start_offset is a byte offset.

Fixes: 04a995158084acbd1917b4c7e0f8d381e1c9222d
Signed-off-by: Danylo Piliaiev <danylo.piliaiev@globallogic.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6557>

13 months agomesa/st: Don't set alpha if ALPHA_TEST is lowered
Alyssa Rosenzweig [Mon, 31 Aug 2020 11:09:30 +0000 (07:09 -0400)]
mesa/st: Don't set alpha if ALPHA_TEST is lowered

When PIPE_CAP_ALPHA_TEST is zero, the driver does not support alpha
testing, so alpha shouldn't be set. In particular, alpha.enable should
be zero, since logically alpha testing is not used in the ZSA CSO when
it's lowered in the fragment shader key.

Fixes failing asserts in kicad, rvgl, etc with Panfrost since 6afd4ad.
(We could remove the assert in panfrost instead, but logically setting
alpha.enabled on top of lowering the shader seems wrong?)

As Erik pointed out, this should improve CSO cache behaviour.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reported-by: Icecream95 <ixn@keemail.me>
Tested-by: Urja Rannikko <urjaman@gmail.com>
Tested-by: Robin Murphy <robin.murphy@arm.com>
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Fixes: 6afd4addefa ("panfrost: Simplify depth/stencil/alpha")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6523>

13 months agoturnip: Implement VK_EXT_host_query_reset
Hyunjun Ko [Tue, 1 Sep 2020 05:16:02 +0000 (05:16 +0000)]
turnip: Implement VK_EXT_host_query_reset

Signed-off-by: Hyunjun Ko <zzoon@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6299>

13 months agoturnip: Support pipeline statistics query
Hyunjun Ko [Tue, 1 Sep 2020 05:13:52 +0000 (05:13 +0000)]
turnip: Support pipeline statistics query

Signed-off-by: Hyunjun Ko <zzoon@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6299>

13 months agoturnip: Refactor structs of tu_query
Hyunjun Ko [Tue, 1 Sep 2020 03:13:55 +0000 (03:13 +0000)]
turnip: Refactor structs of tu_query

Since there are different number of results depending on query types,
this patch removes the result field out of the common struct and defines
query-specific results in each type of query struct.

Signed-off-by: Hyunjun Ko <zzoon@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6299>

13 months agointel/assembler: Add labels support
Danylo Piliaiev [Thu, 13 Jun 2019 14:26:02 +0000 (17:26 +0300)]
intel/assembler: Add labels support

Use labels instead of numeric JIP/UIP offsets.
Works for gen6+.

v2:
 - Change asm tests to use labels on gen6+
 - Remove usage of relative offsets on gen6+
 - Consider brw_jump_scale when setting relative offset
 - Return error if there is a JIP/UIP label without matching target
 - Fix matching of label tokens

Signed-off-by: Danylo Piliaiev <danylo.piliaiev@globallogic.com>
Reviewed-by: Sagar Ghuge <sagar.ghuge@intel.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4245>

13 months agointel/disasm: Label support in shader disassembly for UIP/JIP
Danylo Piliaiev [Mon, 3 Jun 2019 11:55:23 +0000 (14:55 +0300)]
intel/disasm: Label support in shader disassembly for UIP/JIP

Shader instructions which use UIP/JIP now get formatted with a label
in addition with immediate value, labels have "LABEL%d" format.

v2: - Consider brw_jump_scale when calculating label's offset

From: "Lonnberg, Toni" <toni.lonnberg@intel.com>
Signed-off-by: Danylo Piliaiev <danylo.piliaiev@globallogic.com>
Reviewed-by: Sagar Ghuge <sagar.ghuge@intel.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4245>

13 months agointel/disasm: brw_label and support functions
Danylo Piliaiev [Mon, 3 Jun 2019 09:10:09 +0000 (12:10 +0300)]
intel/disasm: brw_label and support functions

Pre-work for shader disassembly label support.

Introduction of the structures and functions used by the shader disassembly
jump target labeling.

From: "Lonnberg, Toni" <toni.lonnberg@intel.com>
Signed-off-by: Danylo Piliaiev <danylo.piliaiev@globallogic.com>
Reviewed-by: Sagar Ghuge <sagar.ghuge@intel.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4245>

13 months agointel/disasm: Change visibility of has_uip and has_jip
Danylo Piliaiev [Mon, 3 Jun 2019 08:58:58 +0000 (11:58 +0300)]
intel/disasm: Change visibility of has_uip and has_jip

Pre-work for shader disassembly label support.

From: "Lonnberg, Toni" <toni.lonnberg@intel.com>
Signed-off-by: Danylo Piliaiev <danylo.piliaiev@globallogic.com>
Reviewed-by: Sagar Ghuge <sagar.ghuge@intel.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4245>

13 months agoanv: refresh cached current batch bo after emitting some commands
Marcin Ślusarz [Tue, 1 Sep 2020 20:02:10 +0000 (22:02 +0200)]
anv: refresh cached current batch bo after emitting some commands

Fixes crashes in:
- Rise of the Tomb Rider (on benchmark start)
- Total War: Three Kingdoms (on game start)
- Total War: Warhammer II (on game start)

Fixes: 34a0ce58c7f ("anv: add a new execution mode for secondary command buffers")
Signed-off-by: Marcin Ślusarz <marcin.slusarz@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6546>

13 months agoradeonsi: use radeonsi_clamp_div_by_zero for SPECviewperf13, Road Redemption
Pierre-Eric Pelloux-Prayer [Wed, 12 Aug 2020 11:28:55 +0000 (13:28 +0200)]
radeonsi: use radeonsi_clamp_div_by_zero for SPECviewperf13, Road Redemption

Fixes SPECviewperf 13 creo rendering.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/2639
Cc: mesa-stable
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6259>

13 months agoradeonsi,driconf: add clamp_div_by_zero option
Pierre-Eric Pelloux-Prayer [Thu, 13 Aug 2020 09:15:36 +0000 (11:15 +0200)]
radeonsi,driconf: add clamp_div_by_zero option

Cc: mesa-stable
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6259>

13 months agoac/llvm: add option to clamp division by zero
Pierre-Eric Pelloux-Prayer [Tue, 11 Aug 2020 16:52:24 +0000 (18:52 +0200)]
ac/llvm: add option to clamp division by zero

Replace div(x) by min(div(x), FLT_MAX)) to avoid getting a NaN result
when x is 0.

A cheaper alternative would be to use legacy mult instructions but they're
not exposed by LLVM.

Cc: mesa-stable
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6259>

13 months agoradeonsi: enable PIPE_CAP_NO_CLIP_ON_COPY_TEX
Pierre-Eric Pelloux-Prayer [Wed, 15 Jul 2020 19:25:23 +0000 (21:25 +0200)]
radeonsi: enable PIPE_CAP_NO_CLIP_ON_COPY_TEX

This fixes specviewperf13 catia test rendering.

Cc: mesa-stable
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6259>

13 months agomesa/st: introduce PIPE_CAP_NO_CLIP_ON_COPY_TEX
Pierre-Eric Pelloux-Prayer [Wed, 15 Jul 2020 19:23:48 +0000 (21:23 +0200)]
mesa/st: introduce PIPE_CAP_NO_CLIP_ON_COPY_TEX

If supported this means that src_x/src_y/width/height parameters of
CopyTex functions will not be clipped using the read framebuffer's dimensions.

Cc: mesa-stable
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6259>

13 months agogallium/swr: Fix compilation TCS/TES compilation issues
jzielins [Tue, 1 Sep 2020 15:04:40 +0000 (17:04 +0200)]
gallium/swr: Fix compilation TCS/TES compilation issues

Gallvm API changes in TCS/TES, but the compilation worked
for older LLVM APIs. With LLVM 12 update is needed.

Reviewed-by: Krzysztof Raszkowski <krzysztof.raszkowski@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6554>

13 months agogallium/swr: Fix compilation with LLVM 12
jzielins [Tue, 1 Sep 2020 14:53:12 +0000 (16:53 +0200)]
gallium/swr: Fix compilation with LLVM 12

Update to reflect changes in VectorType and ElementCount APIs

Closes: #3457
Reviewed-by: Krzysztof Raszkowski <krzysztof.raszkowski@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6554>