nir: Rename num_shared to shared_size

This one is always a size in bytes.

Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6524>

spirv: Delete some dead workgroup variable handling code

This is dead since 5ed4e31c08dc0.

Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6524>

spirv: add some tests for volatile/available/visible

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Acked-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6090>

spirv: Support big-endian strings

This should be all that's required for the SPIR-V parser to work in
big-endian systems.  SPIR-V requires that everything be in host
byte-order except for strings which are always little-endian.

Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6090>

spirv: implement SpvMemoryAccessVolatileMask

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6090>

spirv: implement Volatile image operand

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6090>

spirv: implement Volatile memory semantic

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6090>

spirv: implement MakePointerAvailable/MakePointerVisible for OpCopyMemory

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6090>

spirv: add vtn_emit_make_{visible,available}_barrier helpers

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6090>

spirv: make OpLoad/OpStore visibility/availablity barriers acquire/release

I think these are needed to order the visibility/availability operation
with the access.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6090>

spirv: fix Uniform and Output MemoryAccessMakePointer{Visible,Available}

The Uniform storage class can be used for SSBOs. This should also fix make
available/visible for the Output storage class.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6090>

spirv: Add a vtn_get_mem_operands() helper

Add a vtn_get_mem_operands() helper to extract memory operand attached
to load/store operations.

Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6090>

intel/isl: Drop unnecessary check on 16bpp depth format

Drop unnecessary check which allows enabling of lossless write through
compression (HiZ + CCS) for D16_UNORM format on Gen12+.

We had misleading HSD information previously which used to claim that
compression can not be supported for 16bpp format. Although BSpec does
not have any restriction for D16_UNORM format.

Signed-off-by: Sagar Ghuge <sagar.ghuge@intel.com>
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Acked-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6485>

anv: implement shareable timeline semaphores

This implements timeline semaphores using a new type of dma-fence
stored into drm-syncobjs. We use a thread to implement delayed
submissions.

v2: Drop cloning of temporary semaphores and just transfer their ownership (Jason)
    Drain queue when dealing with binary semaphore
    Ensure we don't submit to the thread as long as we don't need to

v3: Use __u64 not uintptr_t for kernel pointers
    Fix commented code for INTEL_DEBUG=bat
    Set DRM_I915_GEM_EXECBUFFER_EXT_TIMELINE_FENCES in timeline fence execbuf extension
    Add new anv_queue_set_lost()
    Drop multi queue stuff meant for the fake multi queue patch
    Rework temporary syncobj handling
    Don't use syncobj when not available (DeviceWaitIdle/CreateDevice)
    Use ANV_MULTIALLOC
    And a few more tweaks...

v4: Drop drained condition helper (Lionel)
    Fix missing EXEC_OBJECT_WRITE on BOs we want to wait on (Jason)

v5: Add missing device->lost_reported in _anv_device_report_lost (Lionel)
    Fix missing free on submit->simple_bo (Lionel)
    Don't drop setting the device in lost state on QueueSubmit error (Jason)
    Store submit->fence_bos as an array of uintptr_t (Jason)

v6: condition device->has_thread_submit to i915 & core DRM support (Jason)

v7: Fix submit->in_fence leakage on error (Jason)
    Keep dummy semaphore with no thread submission (Jason)

v8: Move ownership of submit->out_fence to submit (Jason)

v9: Don't forget to read the VkFence's syncobj binary payload (Lionel)

v10: Take the mutex lock on anv_gem_close() (Jason/Lionel)

v11: Fix void* -> u64 cast on 32bit (Lionel)

v12: Rebase after BO backed timeline semaphore (Lionel)

v13: Fix missing snippets lost after rebase (Lionel)

v14: Drop update_binary usage (Lionel)

v15: Use ANV_MULTIALLOC (Lionel)

v16: Fix some realloc issues (Ivan)

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net> (v8)
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/2901>

anv: add new gem/drm helpers

Needed for dealing with the new DRM timeline syncobj ioctls.

v2: Make use of the anv_gem_get_drm_cap() parameter... (Jason)

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/2901>

include/drm-uapi: bump headers

From drm-next at the following commit :

   commit 3393649977f9a8847c659e282ea290d4b703295c
   Merge: cbc2e82932ae ced026e959be
   Author: Dave Airlie <airlied@redhat.com>
   Date:   Fri Aug 28 13:51:30 2020 +1000

       Merge tag 'drm-intel-next-2020-08-24-1' of git://anongit.freedesktop.org/drm/drm-intel into drm-next

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Acked-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/2901>

freedreno/ir3: rework setup_{input,output} to make struct varyings work

Rework setup_{input,output} to be called during emit_intrinsic, in a way
which allows struct/array/matrix type varyings to work.

This allows turnip to pass dEQP-VK.glsl.linkage.varying.struct.*

Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6181>

freedreno/ir3: improve handling of aliased inputs

This allows overlapping inputs, which is required for the next patch which
makes it so setup_input may be called multiple times for each input.

Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6181>

freedreno/ir3: remove indirect input load

nir_intrinsic_load_input should only be used with VS and FS, indirect input
shouldn't be possible for those.

Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6181>

radv: Allow triggering thread traces by file.

Makes it actually feasible to trace games and not just demos/apitraces.

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6537>

radv: Centralize enabling thread trace.

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6537>

amd/registers: switch to new generated register definitions

Acked-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6423>

amd/registers: add non-gfx10 register files generated from kernel headers

This was split from the next commit to reduce the massive deltas.

Acked-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6423>

amd/registers: add a script that generates json from kernel headers

Acked-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6423>

amd/registers: sort registers by offset in json

Acked-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6423>

amd/registers: expose the canonicalize.py program as a function

Acked-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6423>

vulkan/wsi/x11: wait for acquirable images in FIFO mode

In FIFO presentation mode we block either on our present-queue or on Present
events after an image was transmitted.

In case we receive completion events without idle events at some point we
exhaust our acquire-queue and can not block anymore on present-queue.

Ensure that the consumer has at least one image to acquire before blocking
again on present-queue. Otherwise wait for one from the X server.

CC: mesa-stable
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/3344
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Reviewed-by: Simon Ser <contact@emersion.fr>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6513>

vulkan/wsi/x11: add sent image counter

Add a counter to count how many images from our swapchain are currently "sent"
to the X server via Present extension. An image is sent when it has been
presented but we have not yet received an idle event for it.

CC: mesa-stable
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Reviewed-by: Simon Ser <contact@emersion.fr>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6513>

aco: Add README which explains about what ACO is and how it works.

This is based on an early summary written by Daniel, but updated to
reflect the current state of ACO and reworded to better fit the format.
Also added is a table which details what SW stages correspond to what
HW stages on each HW generation.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Tony Wasserka <tony.wasserka@gmx.de>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4164>

aco: Fixup markdown formatting of the README-ISA.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Tony Wasserka <tony.wasserka@gmx.de>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4164>

aco: Move README to README-ISA

The old "readme" is not really a readme but rather just
a bunch of notes with our findings about the GCN/RDNA ISA.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Tony Wasserka <tony.wasserka@gmx.de>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4164>

nir/algebraic: mark some optimizations with fsat(NaN) as inexact

If a is Nan, fsat(NaN) is expected to be 0 and some optimizations
should be marked as inexact.

Fixes a GPU hang with Death Stranding and RADV/ACO (RADV/LLVM
isn't affected because it lowers fsat).

No fossils-db change.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/3368
Cc: mesa-stable
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6519>

ci: Restrict "success" job to pipelines for MRs

Expected benefits:

* No more spurious non-MR pipelines with just this job.
* No more warnings from GitLab such as on
  https://gitlab.freedesktop.org/mesa/mesa/-/pipelines/195778

Reviewed-by: Daniel Stone <daniels@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6492>

docs: Stop claiming to implement OpenVG

Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6500>

ci: Don't exclude "success" job from mesa/mesa pipelines for MRs

Since the last GitLab update, pre-merge pipelines for MRs run in the
mesa/mesa namespace, so this job didn't get created anymore, causing
trouble.

Reviewed-by: Daniel Stone <daniels@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6522>

ci: Create test-docs job in mesa/mesa pipelines for MRs

Since the last GitLab update, pre-merge pipelines for MRs run in the
mesa/mesa namespace, so this job didn't get created anymore, causing
trouble.

Reviewed-by: Daniel Stone <daniels@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6522>

gallivm: fix build on LLVM 12 due to LLVMAddConstantPropagationPass removal

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/3465
Cc: 20.1 20.2 <mesa-stable@lists.freedesktop.org>
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6531>

radv: dump GPU info into the hang report

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6471>

radv: improve reporting faulty pipelines when a GPU hang is detected

Because the driver now waits for idle after every draw/dispatch
calls, we shouldn't report gfx pipelines when the GPU hang happens
after a dispatch (or the opposite).

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6471>

radv: force RADV_DEBUG=syncshaders when RADV_TRACE_FILE is used

It's a requirement to be able to identify the first bad draw or
dispatch call.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6471>

vulkan: Fix memory leaks.

Fix warnings reported by Coverity Scan.

Resource leak (RESOURCE_LEAK)
leaked_storage: Variable info going out of scope leaks the storage it
points to.

Fixes: 9bc5b2d169d3 ("vulkan: add initial device selection layer. (v6.1)")
Signed-off-by: Vinson Lee <vlee@freedesktop.org>
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6509>

radv/winsys: Fix memory leak.

Fix warning reported by Coverity Scan.

Resource leak (RESOURCE_LEAK)
leaked_storage: Variable handles going out of scope leaks the storage it
points to.

Fixes 485ea7d711fc ("radv/winsys: pass the buffer list via the CS ioctl for less CPU overhead")

Signed-off-by: Vinson Lee <vlee@freedesktop.org>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6510>

nir/vtn: Convert constant samplers to variables with data

Reviewd-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5242>

nir/vtn: Add intrinsics for CL image format/order queries

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5242>

nir/vtn: ImageSizeLod op can be applied to images

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5242>

nir/vtn: Handle integer sampling coordinates

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5242>

nir/vtn: Use return type rather than image type for tex ops

Since OpenCL images don't have types, we can't use the image type here.
Rather than special-casing and only using SPIR-V return type for CL images,
we can just always use the return type to fill out the tex info.

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5242>

nir/vtn: Add support for kernel images to SPIRV-to-NIR.

There's a few quirks: kernel images are untyped, whether they're
sampled is unknown, and they're passed as inputs to the kernel even though
SPIR-V declares their address space as UniformConstant.

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5242>

nir/vtn: Add type constant to image intrinsics

Since OpenCL supports untyped images, backends might need type info
to be able to support the load/store ops.

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5242>

clover/nir/spirv: Use uniform rather than shader_in for kernel inputs

The semantics of inputs for CL are a closer match to the semantics of uniforms for graphics.
Rather than cross-stage data, it's data that every thread sees uniformly.

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6497>

pan/mdg: Fix perspective combination

It's not enough to multiply by a .w reciprocal, we have to be taking the
reciprocal of the thing we're actually multiplying against.

Fixes incorrect rendering in Manhattan.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6525>

pan/mdg: Fix discard encoding

Let's match the blob.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6525>

anv: fix robust buffer access

In 957bbc6ad907ec we merged all the per stages allocations of push
constants into a single one. Unfortunately one field remained per
stage.

This fixes the issue by including all the per stage values of the
masked registers for robust buffer access into the push constant data.

v2: Drop unneeded loop (Jason)

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes: 957bbc6ad907ec ("anv: simplify push constant emissions")
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6505>

nir: Switch the indexing of block->live_in/out arrays.

In nir-to-tgsi, I want to free temps storing SSA values when they go dead,
and NIR liveness has most of the information I need.  Hoever, when I reach
the end of a block, I need to free whatever temps were in liveout which
are dead at that point.  If liveout is indexed by live_index, then I don't
know the maximum live_index for iterating the live_out bitset, and I also
don't have a way to map that index back to the def->index that my temps
are stored under.

We can use the more typical def->index for these bitsets, which resolves
both of those problems.  The only cost is that ssa_undefs don't get merged
into a single bit in the bitfield, but there are generally 1-4 of them in
a shader and we don't track liveness for those anyway so splitting them
apart is fine.

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6408>

nir: Invalidate live SSA def information when making new SSA defs.

Noted by @jekstrand in review of the SSA live index changes.

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6408>

ci: Switch to using gold as the linker.

Debian defaults to bfd, which is comically slow.  We can't use lld because
the old version we have in the debian stable we use has various bugs.

This required bumping libwayland, which had multiply-defined symbols
issues in the previous release.

Closes: #3236
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6324>

pipe-loader: Use real galliumvl if radeonsi is being linked.

When switching to lld, I saw errors from multiply defined vl symbols due to
radeonsi always linking libgalliumvl.

Acked-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6324>

turnip: Make sure we include the build id.

The ir3 disk cache is initialized when we use the ir3 compiler, even if we
don't use it ourselves, and it requires a build id.  With lld, it seems we
don't end up getting one included by default.

Fixes: f97acb4bb4b1 ("freedreno/ir3: disk-cache support")
Reviewed-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6324>

ci: Make a missing device name correctly bail out of deqp-runner.sh.

If your driver is totally broken and can't even report its name, let's
stop here instead of doing a CTS run full of failure to start tests and
reporting them all missing at the end.

Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6324>

nir: add shared/global atomics to nir_get_io_offset_src()

Signed-off-by: Italo Nicola <italonicola@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6521>

nir: Look up the shader when printing a single instruction.

If you've inserted the instruction into a block, then we can get to the
shader.  This improves our instruction output, giving you i/o semantics
and variable names in intrinsics.

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6496>

nir: Fix printing of individual instructions with io semantics.

The state->shader is missing when used outside of nir_print_shader, just
drop these details in that case.  We can fix nir_print_instr() to look up
the shader, but let's also make sure that an instr detached from a shader
(such as one you're constructing but haven't yet inserted) still works.

Fixes: 2b1ef5df4eac ("nir: print IO semantics (v2)")
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6496>

panfrost: enable DrawTransformFeedback*

This is needed for ARB_transform_feedback2, which I plan on requiring
for ES3. Also update docs/features.txt

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6247>

intel/nir: Lower things with > 4 components in lower_mem_access_bit_sizes

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6502>

intel/fs: Add support for vec8 and vec16 ops

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6502>

anv: VK_INTEL_performance_query interaction with VK_EXT_private_data

All objects are expected to have the base internal object for private
data storage.

This also fixes a memory leak of a gen_perf_registers structure.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes: 51c6bc13ce3a70 ("anv,vulkan: Implement VK_EXT_private_data")
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6255>

vulkan: Don't pointlessly depend on libxcb-dri2

Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6499>

zink: add note about buffer<->image copy functions not handling multisample

Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6266>

zink: use u_transfer_helper to split/merge interleaved depth/stencil formats

EXT_packed_depth_stencil adds GL_UNSIGNED_INT_24_8_EXT which is an interleaved format,
but vulkan spec states that reading/writing the corresponding format provides only the
D24 component, which requires that we perform separate operations for each component
using separate buffers

fixes mesa/mesa#3031

Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6266>

broadcom/qpu_instr: wait is not a read or write vpm instruction

For several schedule restrictions, we are checking if the instruction
is using the vpm. So far it was implemented as being a read or a write
of the vpm. But VPM wait (vpmwt) is not a read or a write (it is a
wait until all pending writes finishes). This is relevant to implement
peripheral accesses restrictions, as for some cases where vpm
read|writes are allowed, vpmwt is not.

Fixes:
  dEQP-VK.binding_model.descriptorset_random.sets8.constant.ubolimitlow.sbolimitlow.sampledimglow.outimgtexlow.noiub.nouab.vert.noia.0

On the sim, as it was raising an assert for wrong peripheral access.

v2: simplify v3d_qpu_waits_vpm (Iago)

Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6498>

docs/features: Add missing Panfrost extensions

+  GL_ARB_internalformat_query
+  GL_ARB_texture_stencil8
+  GL_ARB_stencil_texturing
+  GL_ARB_compute_shader
+  GL_ARB_shader_storage_buffer_object

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6516>

panfrost: Set PIPE_CAP_MAX_TEXTURE_GATHER_COMPONENTS

Exposes ARB_texture_gather when PAN_MESA_DEBUG=deqp is set. Also update
docs/features.txt.

Fixes:

   dEQP-GLES31.functional.texture.gather.offset.implementation_offset.*

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6516>

pan/mdg: Implement texture gathers

As previously shown, it is a mode on top of textureLod. The main gotcha
is the results are swizzled; we reuse the Broadcom lowering for that.

Also, there's a pretty significant erratum affecting gathers of cubemaps
which can be dealt with... eventually.

Fixes:

   dEQP-GLES31.functional.texture.gather.basic.2d.*
   dEQP-GLES31.functional.texture.gather.basic.2d_array.*

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6516>

pan/mdg: Add disassembly for shadow gathers

By applying `textureGather` to a `sampler2DShadow`, the blob produces
(under the old disassembly):

   tex_22.vtx.2d.shadow.cont.last r29, texture0, fsampler0.zwyx, r29,

The op 0x22 is 10|0010 in binary, the old shadow parameter is 1, and old
gather parameter is 0, so we get 0110|0010 in binary, or an op of
textureLod with a mod of 0110 = 6.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6516>

pan/mdg: Refactor texture op/mode handling

We reduce the op to 4-bits, such that the derivative mode becomes its
own adjacent parameter. This cleans up handling of texture gathers, but
does not affect functionality.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6516>

pan/mdg: Implement nir_intrinsic_load_sample_mask_in

Also goes down the magical ld_color_buffer_32u_old path, but with a
different magic number.

Maybe should just be the ld_magic instruction.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6516>

pan/mdg: Bounds check swizzle writing globals

Fixes scheduler hang in:

dEQP-GLES31.functional.shaders.opaque_type_indexing.ubo.const_literal_compute

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6516>

pan/mdg: Scalarize 64-bit

We don't properly support 64-bit vec2 yet for various reasons, and as-is
vectorize will try to create vec4 which we choke on. Since any workloads
relying on 64-bit vector performance are already DOA at this point,
let's just do the conformant thing.

Fixes:

   dEQP-GLES31.functional.shaders.builtin_functions.integer.umulextended.uvec2_highp_compute

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6516>

pan/mdg: Implement i/umul_high

As imul with a .hi modifier, which implies a 64-bit computation.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6516>

panfrost: Emit texture/sampler points for compute

Fixes page faults on dEQP-GLES31.functional.shaders.opaque_type_indexing.sampler.const_literal.compute.sampler2d

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6516>

util/u_thread: include pthread_np.h if found

Required for pthread_set_name_np() on OpenBSD as there is no
pthread_setaffinity_np() to define PTHREAD_SETAFFINITY_IN_NP_HEADER.

Fixes: dcf9d91a80e ("util: Handle differences in pthread_setname_np")
Signed-off-by: Jonathan Gray <jsg@jsg.id.au>
Reviewed-by: Eric Engestrom <eric@engestrom.ch>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5630>

util: futex fixes for OpenBSD

Fix absolute to relative timeout computation.

Add sanity checks to futex_wait()
- handle the NULL timeout pointer case
- avoid negative cases.

From Matthieu Herrb and Scott Cheloha.

Fixes: c91997b6c43 ("util/futex: use futex syscall on OpenBSD")
Signed-off-by: Jonathan Gray <jsg@jsg.id.au>
Acked-by: Eric Engestrom <eric@engestrom.ch>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5630>

meson: conditionally include -ldl in gbm pkg-config file

Follow libGL and only include -ldl in gbm pkg-config file if libdl was
actually found.  Many systems have these functions in libc and don't
have libdl.

Fixes: 816bf7d1644 ("meson: build gbm")
Signed-off-by: Jonathan Gray <jsg@jsg.id.au>
Reviewed-by: Eric Engestrom <eric@engestrom.ch>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5630>

meson: don't build with USE_ELF_TLS on OpenBSD

OpenBSD does not have TLS

Fixes: a47c525f328 ("meson: build glx")
Signed-off-by: Jonathan Gray <jsg@jsg.id.au>
Reviewed-by: Eric Engestrom <eric@engestrom.ch>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5630>

meson: don't advertise TLS support if glx wasn't build with it

Fixes: a47c525f328 ("meson: build glx")
Signed-off-by: Eric Engestrom <eric.engestrom@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5630>

meson: build with _ISOC11_SOURCE on OpenBSD

Mesa builds with -std=c99 but uses timespec_get() a c11 function.
Build with _ISOC11_SOURCE for c11 visibility when -std is specified.
On linux c11 visibility comes from defining _GNU_SOURCE.

Fixes: e3a8013de8c ("util/u_queue: add util_queue_fence_wait_timeout")
Signed-off-by: Jonathan Gray <jsg@jsg.id.au>
Reviewed-by: Eric Engestrom <eric@engestrom.ch>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5630>

util/anon_file: add OpenBSD shm_mkstemp() path

memfd_create() is a linux syscall replace the use of it with
shm_mkstemp() on OpenBSD.

unconditionally include stdlib.h for mkstemp()/mkostemp()

Fixes: c0376a12341 ("util: add anon_file.h for all memfd/temp file usage")
Signed-off-by: Jonathan Gray <jsg@jsg.id.au>
Reviewed-by: Eric Engestrom <eric@engestrom.ch>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5630>

util: unbreak endian detection on OpenBSD

Since cbee1bfb34274668a05995b9d4c78ddec9e5ea4c endian.h is unconditionally
used if available.

glibc has byte order defines with two leading underscores.  OpenBSD
has private defines with a single leading underscore in machine/endian.h
and public defines in endian.h with no underscore.

The code under the endian.h block did not check if symbols were
defined before equating them so '#if __BYTE_ORDER == __LITTLE_ENDIAN'
would turn into '#if 0 == 0' which is always true.

Fixes: cbee1bfb342 ("meson/configure: detect endian.h instead of trying to guess when it's available")
Signed-off-by: Jonathan Gray <jsg@jsg.id.au>
Reviewed-by: Eric Engestrom <eric@engestrom.ch>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5630>

radv: dump shader stats with VK_KHR_pipeline_executable_properties

Instead of duplicating shader statistics in two different parts
in the driver. This also now reports the LDS size in bytes instead
of blocks with VK_AMD_shader_info.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6406>

vallium: disable VK_KHR_shader_float16_int8.

This is actually a TODO.

Fixes:
dEQP-VK.info.device_mandatory_features

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6381>

gallivm/nir: add some f16 support

GLSL lowers packhalf2x16 itself, but for SPIRV we don't have that
option.

For packing when NIR lowers it uses f2f16
and for unpack it needs the casting and f2f32

Fixes:
dEQP-VK.glsl.builtin.function.pack_unpack.packhalf2x16*
dEQP-VK.glsl.builtin.function.pack_unpack.unpackhalf2x16*

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6381>

gallivm/nir: allow 64-bit arit ops

Fixes:
dEQP-VK.glsl.builtin.precision_double.round.*
dEQP-VK.glsl.builtin.precision_double.roundeven.*
dEQP-VK.glsl.builtin.precision_double.trunc.*

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6381>

llvmpipe/fs: multisample depth/stencil bad ir generated

Need to update the z value after updating the pos at pixel
center, and later reupdate it again, so we can avoid some
LLVM IR values not being dominant issues.

Fixes:
dEQP-VK.renderpass.suballocation.multisample.s8_uint.samples_4

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6381>

llvmpipe: add array/3d clearing support

Fixes:
dEQP-VK.pipeline.multisample.sampled_image.64x64_4.*.samples_4

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6381>

llvmpipe: blend has effects even if no colorbuffers.

ARB_framebuffer_no_attachments + multisampling means blend
can have an effect even outside of colorbufs

Fixes:
dEQP-VK.pipeline.multisample.alpha_to_coverage_no_color_attachment.samples_4.alpha_opaque

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6381>

gallivm: use common code to select texel type

This was suggested by Roland, and fixes stencil images.

Fixes:
dEQP-VK.renderpass.dedicated_allocation.formats.d24_unorm_s8_uint.*
dEQP-VK.renderpass.dedicated_allocation.formats.d32_sfloat_s8_uint.*

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6381>

gallivm/nir: add subpass sampler type support

Fixes:
dEQP-VK.renderpass.dedicated_allocation.attachment_allocation.input_output.*
dEQP-VK.renderpass.dedicated_allocation.formats*input*

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6381>

gallivm/nir: lower frexp/ldexp

Fixes:
dEQP-VK.glsl.builtin.precision.frexp*
dEQP-VK.glsl.builtin.precision.ldexp*

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6381>

gallivm/nir: fix const compact

Since adding support for compacts this crashes with indirects
don't get the const address unless it's a const.

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6381>

gallivm/nir: add quantize to f16 support

Fixes:
dEQP-VK.spirv_assembly.instruction.graphics.opquantize.*

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6381>