mesa.git
9 years agoscons: Fix SCons build infrastructure for FreeBSD.
Vinson Lee [Thu, 24 May 2012 00:26:20 +0000 (17:26 -0700)]
scons: Fix SCons build infrastructure for FreeBSD.

This patch gets the FreeBSD SCons build working again. The build still
fails though.

Signed-off-by: Vinson Lee <vlee@freedesktop.org>
Reviewed-by: Brian Paul <brianp@vmware.com>
9 years agoradeon/llvm: Lower UDIV using the Selection DAG
Tom Stellard [Thu, 24 May 2012 16:17:58 +0000 (12:17 -0400)]
radeon/llvm: Lower UDIV using the Selection DAG

9 years agoradeon/llvm: Remove auto-generated AMDIL->ISA conversion code
Tom Stellard [Thu, 24 May 2012 13:28:44 +0000 (09:28 -0400)]
radeon/llvm: Remove auto-generated AMDIL->ISA conversion code

9 years agoradeon/llvm: Remove AMDIL instructions MULHI, SMUL
Tom Stellard [Thu, 24 May 2012 13:01:33 +0000 (09:01 -0400)]
radeon/llvm: Remove AMDIL instructions MULHI, SMUL

9 years agoradeon/llvm: Remove AMDIL bitshift instructions (SHL, SHR, USHR)
Tom Stellard [Thu, 24 May 2012 12:55:15 +0000 (08:55 -0400)]
radeon/llvm: Remove AMDIL bitshift instructions (SHL, SHR, USHR)

9 years agoradeon/llvm: Remove AMDIL FTOI and ITOF instructions
Tom Stellard [Thu, 24 May 2012 12:37:49 +0000 (08:37 -0400)]
radeon/llvm: Remove AMDIL FTOI and ITOF instructions

9 years agoradeon/llvm: Remove AMDIL EXP* instructions
Tom Stellard [Wed, 23 May 2012 19:37:11 +0000 (15:37 -0400)]
radeon/llvm: Remove AMDIL EXP* instructions

9 years agoradeon/llvm: Remove AMDIL ADD instructions
Tom Stellard [Wed, 23 May 2012 18:58:34 +0000 (14:58 -0400)]
radeon/llvm: Remove AMDIL ADD instructions

9 years agoradeon/llvm: Remove AMDIL binary instrutions (OR, AND, XOR, NOT)
Tom Stellard [Wed, 23 May 2012 18:48:36 +0000 (14:48 -0400)]
radeon/llvm: Remove AMDIL binary instrutions (OR, AND, XOR, NOT)

9 years agoradeon/llvm: Remove AMDILMachinePeephole pass
Tom Stellard [Wed, 23 May 2012 18:41:02 +0000 (14:41 -0400)]
radeon/llvm: Remove AMDILMachinePeephole pass

9 years agoradeon/llvm: Remove AMDIL CMP instructions and associated lowering code
Tom Stellard [Wed, 23 May 2012 18:32:54 +0000 (14:32 -0400)]
radeon/llvm: Remove AMDIL CMP instructions and associated lowering code

9 years agoradeon/llvm: Remove AMDIL ROUND_NEAREST instruction
Tom Stellard [Wed, 23 May 2012 17:59:32 +0000 (13:59 -0400)]
radeon/llvm: Remove AMDIL ROUND_NEAREST instruction

9 years agoradeon/llvm: Remove AMDIL ROUND_POSINF instruction
Tom Stellard [Wed, 23 May 2012 17:48:51 +0000 (13:48 -0400)]
radeon/llvm: Remove AMDIL ROUND_POSINF instruction

9 years agoradeon/llvm: Add custom SDNode for FRACT
Tom Stellard [Wed, 23 May 2012 17:19:36 +0000 (13:19 -0400)]
radeon/llvm: Add custom SDNode for FRACT

9 years agoradeon/llvm: Use -1 as true value for SET* integer instructions
Tom Stellard [Wed, 23 May 2012 16:25:04 +0000 (12:25 -0400)]
radeon/llvm: Use -1 as true value for SET* integer instructions

9 years agoradeon/llvm: Handle SETGE_INT, SETGE_UINT, and SETGT_UINT opcodes
Tom Stellard [Wed, 23 May 2012 16:10:10 +0000 (12:10 -0400)]
radeon/llvm: Handle SETGE_INT, SETGE_UINT, and SETGT_UINT opcodes

Support for these was inadvertently dropped in commit
cee23ab246f22210b3063cdc47bdb45b3d943526

9 years agoradeon/llvm: Avoid error with SI in EmitInstrWithCustomInserter()
Tom Stellard [Thu, 24 May 2012 17:42:23 +0000 (13:42 -0400)]
radeon/llvm: Avoid error with SI in EmitInstrWithCustomInserter()

We need to return immediately after inserting instructions that require
S_WAITCNT so that the parent class' custom inserter won't try to insert
them again.

9 years agotgsi: Initialize Padding struct fields.
Vinson Lee [Wed, 23 May 2012 07:02:15 +0000 (00:02 -0700)]
tgsi: Initialize Padding struct fields.

Fix uninitialized scalar variable defects report by Coverity.

Signed-off-by: Vinson Lee <vlee@freedesktop.org>
Reviewed-by: Brian Paul <brianp@vmware.com>
9 years agoi965: Gut the separate OpenGL ES extension enabling.
Kenneth Graunke [Thu, 24 May 2012 00:06:45 +0000 (17:06 -0700)]
i965: Gut the separate OpenGL ES extension enabling.

We should just set the bits of functionality that we support; the
GL/ES1/ES2 flags in extensions.c will take care of advertising the
appropriate extensions for the current API.

This enables the GL_EXT_texture_compression_dxt1 extension on ES1/ES2
when libtxc_dxtn is installed or the force_s3tc driconf option is set.
The main extension code set this up properly, but the ES-specific code
failed to do so.

Otherwise, the extension strings reported by es1_info, es2_info, and
glxinfo all remain the same.

This patch manually disables the ARB_framebuffer_object bit on ES
to preserve the behavior of 1c0f5d8324c4db2720247989ddc4a45315b55a85.

v2: Rebase, fix the i915 Makefile, and unconditionally set the
    OES_draw_texture bit as core Mesa will only apply it to ES1 now.

Tested-by: Daniel Charles <daniel.charles@intel.com> [v1]
Reviewed-by: Chad Versace <chad.versace@linux.intel.com> [v1]
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
9 years agomesa: Remove the OES_draw_texture extension from ES2.
Kenneth Graunke [Tue, 15 May 2012 22:50:26 +0000 (15:50 -0700)]
mesa: Remove the OES_draw_texture extension from ES2.

This extension appears to be written against ES 1.0.
In ES 2.0, you really want to be using FBOs instead.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Chad Versace <chad.versace@linux.intel.com>
9 years agoi965: use cut index to handle primitive restart when possible
Jordan Justen [Sun, 13 May 2012 07:23:23 +0000 (00:23 -0700)]
i965: use cut index to handle primitive restart when possible

If the primitive restart index and the primitive type can
be handled by the cut index feature, then use the hardware
to handle the primitive restart feature.

The VBO module's software handling of primitive restart is
used as a fall back.

Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
9 years agoi965: add flag to enable cut_index
Jordan Justen [Sun, 13 May 2012 06:53:18 +0000 (23:53 -0700)]
i965: add flag to enable cut_index

When brw->prim_restart.enable_cut_index is set, the cut index
will be enabled when uploading index_buffer commands.

Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
9 years agoi965: create code path to handle primitive restart in hardware
Jordan Justen [Sun, 13 May 2012 04:01:19 +0000 (21:01 -0700)]
i965: create code path to handle primitive restart in hardware

For newer hardware we disable the VBO module's software handling
of primitive restart. We now handle primitive restarts in
brw_handle_primitive_restart.

The initial version of brw_handle_primitive_restart simply calls
vbo_sw_primitive_restart, and therefore still uses the VBO
module software primitive restart support.

Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
9 years agoglsl/tests: Add .gitignore for uniform initialization unit test.
Paul Berry [Wed, 23 May 2012 19:59:42 +0000 (12:59 -0700)]
glsl/tests: Add .gitignore for uniform initialization unit test.

Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
9 years agoglsl/constant propagation: kill whole var if LHS involves array indexing.
Paul Berry [Sat, 19 May 2012 15:59:36 +0000 (08:59 -0700)]
glsl/constant propagation: kill whole var if LHS involves array indexing.

When considering which components of a variable were killed by an
assignment, constant propagation would previously just use the write
mask of the assignment.  This worked if the LHS of the assignment was
simple, e.g.:

v.xy = ...; // (assign (xy) (var_ref v) ...)

But it did the wrong thing if the LHS of the assignment involved an
array indexing operator, since in this case the write mask is always
(x):

v[i] = ...; // (assign (x) (deref_array (var_ref v) (var_ref i)) ...)

In general, we can't predict which vector component will be selected
by array indexing, so the only safe thing to do in this case is to
kill the entire variable.

Fixes piglit tests {fs,vs}-vector-indexing-kills-all-channels.shader_test.

Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
9 years agoglsl/tests: Add test for uniform initialization by the linker
Ian Romanick [Fri, 13 Apr 2012 00:15:02 +0000 (17:15 -0700)]
glsl/tests: Add test for uniform initialization by the linker

v2: Put unit tests in src/glsl/tests rather than tests/glsl.

Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Acked-by: Kenneth Graunke <kenneth@whitecape.org>
9 years agomesa: Use initializers to configure samplers
Ian Romanick [Mon, 9 Apr 2012 19:33:48 +0000 (12:33 -0700)]
mesa: Use initializers to configure samplers

Now that the linker handles initializers of samplers just like any
other uniform, a bunch of this annoying code is unnecessary.

Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
9 years agoir_to_mesa: Don't set initial uniform values again
Ian Romanick [Mon, 9 Apr 2012 18:21:15 +0000 (11:21 -0700)]
ir_to_mesa: Don't set initial uniform values again

This work is now done by the linker, so we don't need to keep doing it
here.

Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
9 years agoir_to_mesa: Propagate initial values in _mesa_associate_uniform_storage
Ian Romanick [Mon, 9 Apr 2012 18:19:24 +0000 (11:19 -0700)]
ir_to_mesa: Propagate initial values in _mesa_associate_uniform_storage

The linker may have set initial values for uniforms.  Propagate these
values to the driver's backing storage when it is first associated.

Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
9 years agoglsl: Propagate sampler uniform initializers to gl_shader_program::SamplerUnits
Ian Romanick [Tue, 10 Apr 2012 17:42:13 +0000 (10:42 -0700)]
glsl: Propagate sampler uniform initializers to gl_shader_program::SamplerUnits

Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
9 years agoglsl: Initialize samplers to 0, propagate sampler values to the gl_program
Ian Romanick [Tue, 10 Apr 2012 17:40:11 +0000 (10:40 -0700)]
glsl: Initialize samplers to 0, propagate sampler values to the gl_program

The spec requires that samplers be initialized to 0.  Since this
differs from the 1-to-1 mapping of samplers to texture units assumed
by ARB assembly shaders (and the gl_program structure), be sure to
propagate this date from the gl_shader_program to the gl_program.

Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
CC: Vadim Girlin <vadimgirlin@gmail.com>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=49088

9 years agoglsl: Set initial values for uniforms in the linker
Ian Romanick [Fri, 6 Apr 2012 21:06:13 +0000 (14:06 -0700)]
glsl: Set initial values for uniforms in the linker

v2: Fix handling of arrays-of-structure.  Thanks to Eric Anholt for
pointing this out.

v3: Minor comment change based on feedback from Ken.

Fixes piglit glsl-1.20/execution/uniform-initializer/fs-structure-array
and glsl-1.20/execution/uniform-initializer/vs-structure-array.

Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
9 years agoi965/gen6+: Add support for GL_ARB_blend_func_extended.
Eric Anholt [Wed, 25 Apr 2012 20:58:07 +0000 (13:58 -0700)]
i965/gen6+: Add support for GL_ARB_blend_func_extended.

v2: Add support for gen6, and don't turn it on if blending is
    disabled. (fixes GPU hang), and note it in docs/GL3.txt

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
9 years agomesa: Keep a computed value for dual source blend func with each buffer.
Eric Anholt [Thu, 17 May 2012 22:31:40 +0000 (15:31 -0700)]
mesa: Keep a computed value for dual source blend func with each buffer.

The i965 driver needed this as well for hardware setup, so instead of
duplicating the logic, just save it off.

Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Dave Airlie <airlied@redhat.com>
9 years agoi965/gen6+: Add support for fast depth clears.
Eric Anholt [Fri, 18 May 2012 05:03:32 +0000 (22:03 -0700)]
i965/gen6+: Add support for fast depth clears.

Improves citybench high-res performance 3.0% +- 0.4%, n=10.  Improves
Lightsmark 1024x768 performance 0.74% +/- 0.20% (n=78).  No
significant difference on openarena (n=5, didn't fast clear) or nexuiz
(n=3).

Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Chad Versace <chad.versace@linux.intel.com>
9 years agoi965/gen6: Add CC viewport state setup to blorp code.
Eric Anholt [Wed, 23 May 2012 16:51:33 +0000 (09:51 -0700)]
i965/gen6: Add CC viewport state setup to blorp code.

While it doesn't have the same warning in the simulator as in gen7,
let's emit it out of paranoia.  We wouldn't want our resolves of some
previous clear to get clamped to some current clamping value.

Suggested-by: pretty much everyone
9 years agoi965/gen7: Add CC viewport setup to blorp code.
Eric Anholt [Mon, 21 May 2012 21:58:17 +0000 (14:58 -0700)]
i965/gen7: Add CC viewport setup to blorp code.

When doing fast clears, a fulsim warning said that the batch was being
emitted without the viewport set up.  While the fast clear pass I was
looking at doesn't use the clear value, the later resolves which also
didn't set up the vieport would trigger the same.  It's not obvious
from the error message whether it meant "fast clear value gets clamped
to something you haven't defined" or "fast clear value doesn't get
clamped, and I saw it was out of the current (uninitialized) range,
and you probably wanted it clamped to that (uninitialized) range".  Be
paranoid and assume the first case.

Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Chad Versace <chad.versace@linux.intel.com>
9 years agoi965: Drop a layer of indirection in doing HiZ resolves.
Eric Anholt [Mon, 21 May 2012 17:01:20 +0000 (10:01 -0700)]
i965: Drop a layer of indirection in doing HiZ resolves.

Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Chad Versace <chad.versace@linux.intel.com>
9 years agoi965: Replace intel_need_resolve with the hiz ops it maps to.
Eric Anholt [Mon, 21 May 2012 16:52:46 +0000 (09:52 -0700)]
i965: Replace intel_need_resolve with the hiz ops it maps to.

Having this enum separate caused us to need a bunch of helper
functions to translate to the op to be executed.

Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Chad Versace <chad.versace@linux.intel.com>
9 years agoi965: Add an interface for doing hiz ops from C code.
Eric Anholt [Mon, 21 May 2012 16:30:35 +0000 (09:30 -0700)]
i965: Add an interface for doing hiz ops from C code.

This required moving gen6_hiz_op, and I put it in intel_resolve_map.h
for the next commit.

Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Chad Versace <chad.versace@linux.intel.com>
9 years agoi965: Rename the clear function for this driver.
Eric Anholt [Fri, 18 May 2012 19:05:53 +0000 (12:05 -0700)]
i965: Rename the clear function for this driver.

Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Chad Versace <chad.versace@linux.intel.com>
9 years agoi965: Simplify the remaining clear logic by relying on the meta clear.
Eric Anholt [Fri, 18 May 2012 19:04:15 +0000 (12:04 -0700)]
i965: Simplify the remaining clear logic by relying on the meta clear.

The GLSL clear path doesn't need any buffer presence checks, since
those are already handled in the normal drawing path code.

Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Chad Versace <chad.versace@linux.intel.com>
9 years agoi965: Switch blit color clears to tri clears on gen4/5.
Eric Anholt [Fri, 18 May 2012 18:55:53 +0000 (11:55 -0700)]
i965: Switch blit color clears to tri clears on gen4/5.

Our understanding is that the 3D engine is supposed to be faster
anyway.  We used to have more overhead in our tri clear path than we
do today, which would have led to this choice.  But given that we
almost always see a depth clear along with a color clear, the path was
hardly exercised anyway.

Also, the color mask logic was broken in the presence of
GL_EXT_draw_buffers2's per-buffer colormask.

Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Chad Versace <chad.versace@linux.intel.com>
9 years agoi965: Remove dead logic for non-tri depth/stencil clears.
Eric Anholt [Fri, 18 May 2012 18:54:20 +0000 (11:54 -0700)]
i965: Remove dead logic for non-tri depth/stencil clears.

Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Chad Versace <chad.versace@linux.intel.com>
9 years agoi965: We always have GLSL, so always use it for tri clears.
Eric Anholt [Fri, 18 May 2012 18:53:29 +0000 (11:53 -0700)]
i965: We always have GLSL, so always use it for tri clears.

Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Chad Versace <chad.versace@linux.intel.com>
9 years agoi915: Drop gen4+ code from the forked clear code.
Eric Anholt [Mon, 21 May 2012 16:13:33 +0000 (09:13 -0700)]
i915: Drop gen4+ code from the forked clear code.

Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Chad Versace <chad.versace@linux.intel.com>
9 years agointel: Fork the intel_clear.c file between i915 and i965.
Eric Anholt [Fri, 18 May 2012 18:49:22 +0000 (11:49 -0700)]
intel: Fork the intel_clear.c file between i915 and i965.

This logic is wasted on i965 when we want to just always do GLSL tri
clears.

Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Chad Versace <chad.versace@linux.intel.com>
9 years agost/mesa: set stObj->lastLevel in guess_and_alloc_texture
Vadim Girlin [Wed, 23 May 2012 02:07:00 +0000 (06:07 +0400)]
st/mesa: set stObj->lastLevel in guess_and_alloc_texture

Fixes lockups/asserts with depthstencil-render-miplevels tests and r600g.
Should also fix https://bugs.freedesktop.org/show_bug.cgi?id=50033

NOTE: This is a candidate for the 8.0 branch.

Signed-off-by: Vadim Girlin <vadimgirlin@gmail.com>
Reviewed-by: Brian Paul <brianp@vmware.com>
9 years agoi965: Completely annotate the batch bo when aub dumping.
Paul Berry [Mon, 7 May 2012 21:37:00 +0000 (14:37 -0700)]
i965: Completely annotate the batch bo when aub dumping.

Previously, when the environment variable INTEL_DEBUG=aub was set,
mesa would simply instruct DRM to start dumping data to an .aub file,
but we would not provide DRM with any information about the format of
the data in various buffers.  As a result, a lot of the data in the
generate .aub file would be unannotated, making further data analysis
difficult.

This patch causes the entire contents of each batch buffer to be
annotated using the data in brw->state_batch_list (which was
previously used only to annotate the output of INTEL_DEBUG=bat).  This
includes data that was allocated by brw_state_batch, such as binding
tables, surface and sampler states, depth/stencil state, and so on.

The new annotation mechanism requires DRM version 2.4.34.

Reviewed-by: Eric Anholt <eric@anholt.net>
9 years agointel: When AUB dumping, flush before emitting final bitmap command.
Paul Berry [Sun, 6 May 2012 17:01:37 +0000 (10:01 -0700)]
intel: When AUB dumping, flush before emitting final bitmap command.

When we are generating an AUB dump, we make a final call to
aub_dump_bmp() as the context is being destroyed, to ensure that any
rendering performed before the application exits can be seen during a
simulation run.  However, we were doing this before flushing the batch
buffer; as a result simulation runs would not always see the effect of
all rendering commands.

This patch flushes the batch buffer just before making the final call
to aub_dump_bmp(), to ensure that all rendering is properly captured
in the final bitmap.

9 years agollvmpipe: Fix alpha testing precision on rgba8 formats.
José Fonseca [Tue, 22 May 2012 15:04:33 +0000 (16:04 +0100)]
llvmpipe: Fix alpha testing precision on rgba8 formats.

This is a long standing problem, that recently surfaced with the change
to enable perspective correct color interpolation.

A fix for all possible formats is left to the future.

Reviewed-by: Brian Paul <brianp@vmware.com>
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
9 years agoscons: Do not build glx and egl on Cygwin.
Vinson Lee [Tue, 22 May 2012 05:16:15 +0000 (22:16 -0700)]
scons: Do not build glx and egl on Cygwin.

Signed-off-by: Vinson Lee <vlee@freedesktop.org>
Reviewed-by: José Fonseca <jfonseca@vmware.com>
9 years agonv30: check for NULL vertex buffers in prevalidate_vbufs
Christoph Bumiller [Tue, 22 May 2012 13:21:01 +0000 (15:21 +0200)]
nv30: check for NULL vertex buffers in prevalidate_vbufs

9 years agonv50: make unaligned index buffer offsets work again
Christoph Bumiller [Tue, 22 May 2012 10:44:38 +0000 (12:44 +0200)]
nv50: make unaligned index buffer offsets work again

Messed up in ef7bb281292c17b762b57779306e874704c87328.

9 years agonvc0: don't set NEW_IDXBUF in nvc0_switch_pipe_context if none is bound
Christoph Bumiller [Tue, 22 May 2012 10:41:17 +0000 (12:41 +0200)]
nvc0: don't set NEW_IDXBUF in nvc0_switch_pipe_context if none is bound

9 years agollvmpipe: Added a error counter to lp_test_conv.
James Benton [Fri, 18 May 2012 15:17:26 +0000 (16:17 +0100)]
llvmpipe: Added a error counter to lp_test_conv.

Useful for keeping track of progress when fixing errors!

Signed-off-by: José Fonseca <jfonseca@vmware.com>
9 years agollvmpipe: Changed known failures in lp_test_conv.
James Benton [Fri, 18 May 2012 15:16:46 +0000 (16:16 +0100)]
llvmpipe: Changed known failures in lp_test_conv.

To comply with the recent fixes to lp_bld_conv.

Signed-off-by: José Fonseca <jfonseca@vmware.com>
9 years agollvmpipe: Added fixed point types tests to lp_test_conv.
James Benton [Fri, 18 May 2012 15:14:38 +0000 (16:14 +0100)]
llvmpipe: Added fixed point types tests to lp_test_conv.

Signed-off-by: José Fonseca <jfonseca@vmware.com>
9 years agogallivm: Fixed erroneous optimisation in lp_build_min/max.
James Benton [Fri, 18 May 2012 15:06:44 +0000 (16:06 +0100)]
gallivm: Fixed erroneous optimisation in lp_build_min/max.

Previously assumed normalised was 0 to 1, but it can be -1 to 1
if type is signed.
Tested with lp_test_conv and lp_test_format, reduced errors.

Signed-off-by: José Fonseca <jfonseca@vmware.com>
9 years agogallivm: Compensate for lp_const_offset in lp_build_conv.
James Benton [Fri, 18 May 2012 15:04:49 +0000 (16:04 +0100)]
gallivm: Compensate for lp_const_offset in lp_build_conv.

Fixing a /*FIXME*/ to remove errors in integer conversion in lp_build_conv.
Tested using lp_test_conv and lp_test_format, reduced errors.

Signed-off-by: José Fonseca <jfonseca@vmware.com>
9 years agogallivm: Fixed overflow in lp_build_clamped_float_to_unsigned_norm.
James Benton [Fri, 18 May 2012 15:01:25 +0000 (16:01 +0100)]
gallivm: Fixed overflow in lp_build_clamped_float_to_unsigned_norm.

Tested with lp_test_conv and lp_test_format, reduced errors.

Signed-off-by: José Fonseca <jfonseca@vmware.com>
9 years agodocs: add link to 8.0.3 release notes
Brian Paul [Mon, 21 May 2012 15:26:04 +0000 (09:26 -0600)]
docs: add link to 8.0.3 release notes

9 years agotests: include mesa headers
Paul Seidler [Mon, 21 May 2012 14:42:17 +0000 (08:42 -0600)]
tests: include mesa headers

else they will fail for fresh installs

Signed-off-by: Brian Paul <brianp@vmware.com>
9 years agoglu: fix two Clang warnings
Lukas Rössler [Mon, 21 May 2012 14:29:21 +0000 (08:29 -0600)]
glu: fix two Clang warnings

This patch removes two Clang warnings in GLU:

The first one seems to be an actual bug in mapdesc.cc: Clang complains
that sizeof(dest) will return the size of REAL*[MAXCOORDS], instead of
the intended REAL[MAXCOORDS][MAXCOORDS]. The second one is just
cosmetic because Clang doesn't like extra parentheses.

NOTE: This is a candidate for the 8.0 branch

Reviewed-by: Brian Paul <brianp@vmware.com>
9 years agodocs: fix a typo
Homer Hsing [Mon, 21 May 2012 14:07:20 +0000 (08:07 -0600)]
docs: fix a typo

Signed-off-by: Brian Paul <brianp@vmware.com>
9 years agoFilter out -Wcovered-switch-default from LLVM_CFLAGS
ojab [Sun, 13 May 2012 10:56:00 +0000 (14:56 +0400)]
Filter out -Wcovered-switch-default from LLVM_CFLAGS

Signed-off-by: José Fonseca <jfonseca@vmware.com>
9 years agoradeon/llvm: Handle selectcc DAG node
Tom Stellard [Fri, 18 May 2012 20:58:31 +0000 (16:58 -0400)]
radeon/llvm: Handle selectcc DAG node

R600 can now select instructions from the selectcc DAG node, which is
typically lowered to one of the SET* instructions.

9 years agost/mesa: use pipe_sampler_view_release() in st_destroy_context_priv()
Brian Paul [Fri, 18 May 2012 21:32:10 +0000 (15:32 -0600)]
st/mesa: use pipe_sampler_view_release() in st_destroy_context_priv()

Fixes another case of sampler views being created by one context,
shared by another, then deleted by the first, leaving a dangling
pipe context pointer.

Reviewed-by: José Fonseca <jfonseca@vmware.com>
9 years agomesa: use F_TO_I() instead of IROUND()
Brian Paul [Fri, 18 May 2012 20:45:20 +0000 (14:45 -0600)]
mesa: use F_TO_I() instead of IROUND()

Use it where performance matters more and the exact method of float->int
conversion/rounding isn't terribly important.  There should no net change
here since F_TO_I() is the new name of the old IROUND() function.

Reviewed-by: José Fonseca <jfonseca@vmware.com>
9 years agomesa: reimplement IROUND(), add F_TO_I()
Brian Paul [Fri, 18 May 2012 20:39:41 +0000 (14:39 -0600)]
mesa: reimplement IROUND(), add F_TO_I()

The different implementations of IROUND() behaved differently and in
the case of fistp, depended on the current x86 FPU rounding mode.
This caused some tests like piglit roundmode-pixelstore and
roundmode-getintegerv to fail on 32-bit x86 but pass on 64-bit x86.

Now IROUND() always rounds to the nearest integer (away from zero).
The new F_TO_I function converts a float to an int by whatever means
is fastest.  We'll use this where we're more concerned with performance
and not too worried to how the conversion is done.

Reviewed-by: José Fonseca <jfonseca@vmware.com>
9 years agomesa: fix Z32_FLOAT -> uint conversion functions
Brian Paul [Fri, 18 May 2012 19:33:53 +0000 (13:33 -0600)]
mesa: fix Z32_FLOAT -> uint conversion functions

The IROUND converted all arguments to 0 or 1.  That's not what we wanted.

NOTE: This is a candidate for the 8.0 branch.

Reviewed-by: José Fonseca <jfonseca@vmware.com>
9 years agost/mesa: remove unused pipe variable
Brian Paul [Fri, 18 May 2012 19:33:25 +0000 (13:33 -0600)]
st/mesa: remove unused pipe variable

9 years agosvga: whitespace, comments, formatting clean-ups
Brian Paul [Thu, 17 May 2012 22:23:02 +0000 (16:23 -0600)]
svga: whitespace, comments, formatting clean-ups

9 years agost/mesa: added st_print_current_vertex_program(), for debugging
Brian Paul [Thu, 17 May 2012 21:48:50 +0000 (15:48 -0600)]
st/mesa: added st_print_current_vertex_program(), for debugging

9 years agosvga: return PIPE_OK instead of 0
Brian Paul [Thu, 17 May 2012 19:53:15 +0000 (13:53 -0600)]
svga: return PIPE_OK instead of 0

And fix the emit_rss() function's return type.

9 years agosvga: fix zero-stride vertex array bug
Brian Paul [Thu, 17 May 2012 16:07:46 +0000 (10:07 -0600)]
svga: fix zero-stride vertex array bug

For zero-stride vertex arrays, the svga driver copies the value into
the constant value and uses that value in the shader.  The recent
gallium-userbuf changes caused a regression in this.  An example
symptom was per-primitive glColor3f() calls getting ignored.

Where we copied the vertex value from the vertex buffer to the
constant buffer we neglected to take into account the
pipe_vertex_buffer::buffer_offset field.  Adding that value to the
source offset fixes the problem.  Actually, it looks like we should
have been doing this all along, but it never was an issue before for
some reason.

9 years agomesa: add GLSL_REPORT_ERRORS debug flag
Brian Paul [Thu, 17 May 2012 13:44:32 +0000 (07:44 -0600)]
mesa: add GLSL_REPORT_ERRORS debug flag

If the MESA_GLSL env var contains "errors", GLSL compilation and
link errors will be reported to stderr.

Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
9 years agomesa: add some comments on shaderapi.c functions
Brian Paul [Wed, 16 May 2012 17:09:23 +0000 (11:09 -0600)]
mesa: add some comments on shaderapi.c functions

9 years agomesa: Remove undefinition of _P symbol.
Vinson Lee [Fri, 18 May 2012 06:09:35 +0000 (23:09 -0700)]
mesa: Remove undefinition of _P symbol.

IRIX isn't used anymore.

Signed-off-by: Vinson Lee <vlee@freedesktop.org>
Reviewed-by: Brian Paul <brianp@vmware.com>
9 years agoImport release notes for 8.0.3, add news item
Ian Romanick [Fri, 18 May 2012 23:25:00 +0000 (16:25 -0700)]
Import release notes for 8.0.3, add news item

Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
9 years agodarwin: Address a build failure on Leopard and earlier OS versions
Jeremy Huddleston [Fri, 18 May 2012 18:31:24 +0000 (11:31 -0700)]
darwin: Address a build failure on Leopard and earlier OS versions

<https://trac.macports.org/ticket/34499>

Regression-from: 51691f0767f6a75a1f549cd979a878a0ad12a228
Signed-off-by: Jeremy Huddleston <jeremyhu@apple.com>
9 years agoradeonsi: Only honour point related rasterizer state when rendering points.
Michel Dänzer [Fri, 18 May 2012 13:40:34 +0000 (15:40 +0200)]
radeonsi: Only honour point related rasterizer state when rendering points.

Avoids hangs when not rendering points.

9 years agoradeonsi: Fix parameter cache offsets for fragment shader inputs.
Michel Dänzer [Fri, 18 May 2012 13:01:10 +0000 (15:01 +0200)]
radeonsi: Fix parameter cache offsets for fragment shader inputs.

9 years agogallium/tgsi/text: Ensure ret is initialized in parse_immediate_data.
Vinson Lee [Thu, 17 May 2012 06:44:53 +0000 (23:44 -0700)]
gallium/tgsi/text: Ensure ret is initialized in parse_immediate_data.

Fix uninitialized scalar variable defect reported by Coverity.

Signed-off-by: Vinson Lee <vlee@freedesktop.org>
Reviewed-by: Brian Paul <brianp@vmware.com>
9 years agoradeon/llvm: Fix segfault while lowering lrp intrinsic
Tom Stellard [Fri, 18 May 2012 00:39:54 +0000 (20:39 -0400)]
radeon/llvm: Fix segfault while lowering lrp intrinsic

9 years agoradeon/llvm: Add DAG nodes for MIN instructions
Tom Stellard [Thu, 17 May 2012 22:21:24 +0000 (18:21 -0400)]
radeon/llvm: Add DAG nodes for MIN instructions

Also, remove the AMDIL MIN* instruction defs.

9 years agollvmpipe: Avoid adding floating point zero to flat inputs.
José Fonseca [Fri, 18 May 2012 00:03:13 +0000 (01:03 +0100)]
llvmpipe: Avoid adding floating point zero to flat inputs.

Which could clobber integer inputs, if the addition is not optimized away
(e.g., if optimizations are disabled for debugging purposes).

9 years agoFix fetching integer inputs.
José Fonseca [Thu, 17 May 2012 23:55:13 +0000 (00:55 +0100)]
Fix fetching integer inputs.

9 years agollvmpipe: Implement TXQ.
Olivier Galibert [Thu, 17 May 2012 14:48:54 +0000 (16:48 +0200)]
llvmpipe: Implement TXQ.

Piglits test for fragment shaders pass, vertex shaders fail.  The
actual failure seems to be in the interpolators, and not the
textureSize query.

Signed-off-by: Olivier Galibert <galibert@pobox.com>
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Reviewed-by: José Fonseca <jose.r.fonseca@gmail.com>
9 years agollvmpipe: Don't mess with the provoking vertex when inverting a triangle.
Olivier Galibert [Thu, 17 May 2012 07:32:31 +0000 (09:32 +0200)]
llvmpipe: Don't mess with the provoking vertex when inverting a triangle.

Fixes a bunch of piglit tests related to flat interpolation of floats.

Signed-off-by: Olivier Galibert <galibert@pobox.com>
Signed-off-by: José Fonseca <jose.r.fonseca@gmail.com>
9 years agoradeon/llvm: Lower lrp intrinsic during ISel
Tom Stellard [Thu, 17 May 2012 17:36:12 +0000 (13:36 -0400)]
radeon/llvm: Lower lrp intrinsic during ISel

9 years agoradeon/llvm: Remove AMDIL MAD instruction defs
Tom Stellard [Thu, 17 May 2012 18:34:40 +0000 (14:34 -0400)]
radeon/llvm: Remove AMDIL MAD instruction defs

9 years agoradeon/llvm: Remove AMDIL MUL_IEEE* instructions
Tom Stellard [Thu, 17 May 2012 17:41:21 +0000 (13:41 -0400)]
radeon/llvm: Remove AMDIL MUL_IEEE* instructions

9 years agor600g: Handle MUL_IEEE in r600_bytecode_get_num_operands
Tom Stellard [Thu, 17 May 2012 18:31:36 +0000 (14:31 -0400)]
r600g: Handle MUL_IEEE in r600_bytecode_get_num_operands

9 years agoradeon/llvm: Expand fsub during ISel
Tom Stellard [Thu, 17 May 2012 17:13:17 +0000 (13:13 -0400)]
radeon/llvm: Expand fsub during ISel

9 years agoradeon/llvm: Remove AMDIL floating-point ADD instruction defs
Tom Stellard [Thu, 17 May 2012 17:05:07 +0000 (13:05 -0400)]
radeon/llvm: Remove AMDIL floating-point ADD instruction defs

9 years agoradeon/llvm: Remove AMDIL CMOVLOG* instruction defs
Tom Stellard [Thu, 17 May 2012 16:54:43 +0000 (12:54 -0400)]
radeon/llvm: Remove AMDIL CMOVLOG* instruction defs

9 years agoradeon/llvm: Move lowering of ABS_i32 to ISel
Tom Stellard [Thu, 17 May 2012 16:08:21 +0000 (12:08 -0400)]
radeon/llvm: Move lowering of ABS_i32 to ISel

9 years agoradeon/llvm: Remove sub patterns from AMDILInstrPatterns.td
Tom Stellard [Thu, 17 May 2012 15:46:19 +0000 (11:46 -0400)]
radeon/llvm: Remove sub patterns from AMDILInstrPatterns.td

9 years agoradeon/llvm: Add custom SDNodes for MAX
Tom Stellard [Thu, 17 May 2012 11:35:15 +0000 (07:35 -0400)]
radeon/llvm: Add custom SDNodes for MAX

We now lower the various intrinsics for max to SDNodes and then use
tablegen patterns to lower the SDNodes to instructions.