mesa.git
23 months agovulkan: bump headers/registry to 1.1.127
Lionel Landwerlin [Mon, 4 Nov 2019 08:21:00 +0000 (10:21 +0200)]
vulkan: bump headers/registry to 1.1.127

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Acked-by: Jason Ekstrand <jason@jlekstrand.net>
23 months agoradv: fix compute pipeline keys when optimizations are disabled
Samuel Pitoiset [Fri, 1 Nov 2019 08:34:12 +0000 (09:34 +0100)]
radv: fix compute pipeline keys when optimizations are disabled

If an app first creates a compute pipeline with
VK_PIPELINE_CREATE_DISABLE_OPTIMIZATION_BIT set, then re-compile it
without that flag, the driver should re-compile the compute shader.
Otherwise, it will return the unoptimized one.

Fixes: ce188813bfe ("radv: add initial support for VK_PIPELINE_CREATE_DISABLE_OPTIMIZATION_BIT")
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
23 months agonv50/ir: fix crash in isUniform for undefined values
Karol Herbst [Sat, 2 Nov 2019 23:57:28 +0000 (00:57 +0100)]
nv50/ir: fix crash in isUniform for undefined values

Signed-off-by: Karol Herbst <kherbst@redhat.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
23 months agomesa: check draw buffer completeness on glClearBufferfi/glClearBufferiv
Lionel Landwerlin [Fri, 1 Nov 2019 17:43:00 +0000 (19:43 +0200)]
mesa: check draw buffer completeness on glClearBufferfi/glClearBufferiv

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Cc: <mesa-stable@lists.freedesktop.org>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
23 months agolima: set dithering flag when necessary
Vasily Khoruzhick [Sat, 26 Oct 2019 02:08:57 +0000 (19:08 -0700)]
lima: set dithering flag when necessary

Bit 13 in aux1 enables dithering

Reviewed-by: Qiang.Yu <yuq825@gmail.com>
Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com>
23 months agoglsl: encode struct/interface types better
Marek Olšák [Thu, 31 Oct 2019 00:38:44 +0000 (20:38 -0400)]
glsl: encode struct/interface types better

Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
23 months agoglsl: encode array types better
Marek Olšák [Thu, 31 Oct 2019 00:27:08 +0000 (20:27 -0400)]
glsl: encode array types better

Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
23 months agoglsl: encode explicit_stride for basic types better
Marek Olšák [Thu, 31 Oct 2019 00:22:49 +0000 (20:22 -0400)]
glsl: encode explicit_stride for basic types better

Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
23 months agoglsl: encode vector_elements and matrix_columns better
Marek Olšák [Thu, 31 Oct 2019 00:18:05 +0000 (20:18 -0400)]
glsl: encode vector_elements and matrix_columns better

Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
23 months agoglsl: encode/decode types using a union with bitfields for readability
Marek Olšák [Thu, 31 Oct 2019 00:15:36 +0000 (20:15 -0400)]
glsl: encode/decode types using a union with bitfields for readability

Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
23 months agolima: ignore flags while looking for BO in cache
Vasily Khoruzhick [Fri, 25 Oct 2019 05:14:05 +0000 (22:14 -0700)]
lima: ignore flags while looking for BO in cache

Any BO would work, we don't have any BO types yet anyway. Moreover
lima_submit_add_bo() changes BO flags so they won't match allocation
flags.

Reviewed-by: Erico Nunes <nunes.erico@gmail.com>
Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com>
23 months agolima: align size before trying to fetch BO from cache
Vasily Khoruzhick [Fri, 25 Oct 2019 05:12:30 +0000 (22:12 -0700)]
lima: align size before trying to fetch BO from cache

Otherwise we may be looking in wrong bucket

Reviewed-by: Erico Nunes <nunes.erico@gmail.com>
Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com>
23 months agolima: add debug prints for BO cache
Vasily Khoruzhick [Fri, 25 Oct 2019 03:16:06 +0000 (20:16 -0700)]
lima: add debug prints for BO cache

LIMA_DEBUG=bocache now activates debug prints for BO allocation,
destruction and BO cache.

Reviewed-by: Erico Nunes <nunes.erico@gmail.com>
Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com>
23 months agopan/midgard: Use fp32 blend shaders
Alyssa Rosenzweig [Thu, 31 Oct 2019 19:50:45 +0000 (15:50 -0400)]
pan/midgard: Use fp32 blend shaders

Clearly we do want to have fp16 at some point ... but I kind of give up
debugging and it turns out the issues with fp16 support in 'frost are so
deeply rooted that I might as well disable this non-opt and land
LCRA now.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
23 months agoradv: Close all unnecessary fds in secure compile.
Bas Nieuwenhuizen [Fri, 1 Nov 2019 00:07:02 +0000 (01:07 +0100)]
radv: Close all unnecessary fds in secure compile.

The seccomp filter allows read/write, let us make sure nobody can
do anything with this.

Fixes: cff53da3748 "radv: enable secure compile support"
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
23 months agoanv: remove incorrect polygonMode=point early-out
Erik Faye-Lund [Mon, 28 Oct 2019 15:25:10 +0000 (16:25 +0100)]
anv: remove incorrect polygonMode=point early-out

This is incorrect, because polygonMode only applies if the final
primitive type is a polygon; polygonMode doesn't apply to
line-primitives as the comment suggests.

The Vulkan 1.1 spec, section 26.11, "Polygons" defines that polygons are
separate from points and line segments:

" A polygon results from the decomposition of a triangle strip, triangle
  fan or a series of independent triangles. Like points and line segments,
  polygon rasterization is controlled by several variables in the
  VkPipelineRasterizationStateCreateInfo structure. "

Further, section 26.11.2, "Polygon Mode", only define polygonMode to
apply to polygons:

" Possible values of the VkPipelineRasterizationStateCreateInfo::polygonMode
  property of the currently active pipeline, specifying the method of
  rasterization for polygons, are: "

This seems to clearly define that polygonMode doesn't apply to points
and lines, so let's make sure that we don't early out with the wrong
value.

Signed-off-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
23 months agopan/midgard: Eliminate blank_alu_src
Alyssa Rosenzweig [Wed, 30 Oct 2019 20:29:28 +0000 (16:29 -0400)]
pan/midgard: Eliminate blank_alu_src

We don't need it in practice, so this is some more cleanup.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
23 months agopan/midgard: Refactor swizzles
Alyssa Rosenzweig [Sat, 26 Oct 2019 18:06:17 +0000 (14:06 -0400)]
pan/midgard: Refactor swizzles

Rather than having hw-specific swizzles encoded directly in the
instructions, have a unified swizzle arary so we can manipulate swizzles
generically.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
23 months agopan/midgard: Add a dummy source for loads
Alyssa Rosenzweig [Sat, 26 Oct 2019 19:50:38 +0000 (15:50 -0400)]
pan/midgard: Add a dummy source for loads

We want symmetry between loads and stores, so we add a dummy source. So
we get, e.g.

   st_int4 _,    val, arg_1, arg_2
   ld_int4 dest,   _, arg_1, arg_2

Semantically, this dummy source represents the data itself, as if the
load is simply a move. That means it has a swizzle that acts as a
source.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
23 months agopan/midgard: Remove OP_IS_STORE_VARY
Alyssa Rosenzweig [Sat, 26 Oct 2019 19:50:26 +0000 (15:50 -0400)]
pan/midgard: Remove OP_IS_STORE_VARY

Unused.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
23 months agoglsl: disable lower_fragdata_array() for NIR drivers
Timothy Arceri [Wed, 30 Oct 2019 00:34:27 +0000 (11:34 +1100)]
glsl: disable lower_fragdata_array() for NIR drivers

This function was added in 7e414b58640a to work around a defect in
lower_output_reads(). As of the previous commit no NIR driver calls
lower_output_reads().

This change means we don't need the special GLSL IR style
gl_FragData handling for building the resource list in a NIR based
linker.

No shader-db change on SKL i965.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
23 months agoglsl: just use NIR to lower outputs when driver can't read outputs
Timothy Arceri [Wed, 30 Oct 2019 00:24:37 +0000 (11:24 +1100)]
glsl: just use NIR to lower outputs when driver can't read outputs

This will allow us to stop lowering gl_FragData in GLSL IR for NIR
drivers which means we won't need the special GLSL IR type
handling for building the resource list in a NIR based linker.

i965 has been doing this since b828f7a27b2b.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
23 months agolima: support indexed draw with bias
Icenowy Zheng [Tue, 22 Oct 2019 14:14:56 +0000 (22:14 +0800)]
lima: support indexed draw with bias

When doing an indexed draw with index_bias set to a non-zero value (e.g.
by glDrawElementsBaseVertex), the vertex buffer should be offseted by
index_bias vertices.

Add this offset when setting the vertex buffer address.

Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
Reviewed-by: Vasily Khoruzhick <anarsoul@gmail.com>
23 months agoanv: Move the RT BTI flush workaround to begin_subpass
Jason Ekstrand [Wed, 30 Oct 2019 20:05:29 +0000 (15:05 -0500)]
anv: Move the RT BTI flush workaround to begin_subpass

Now that we're no longer compacting binding table entries, the only time
they can possibly change is when we actually switch subpasses.

Reviewed-by: Rafael Antognolli <rafael.antognolli@intel.com>
23 months agoanv: Stop compacting render targets in the binding table
Jason Ekstrand [Wed, 30 Oct 2019 19:07:47 +0000 (14:07 -0500)]
anv: Stop compacting render targets in the binding table

Instead, always emit one entry for every color attachment in the subpass
or one NULL if there are no color attachments.  This will let us adjust
an Ice Lake workaround so we don't get a stall on every draw call.

Reviewed-by: Rafael Antognolli <rafael.antognolli@intel.com>
23 months agoanv: Don't claim the null RT as a valid color target
Jason Ekstrand [Wed, 30 Oct 2019 20:53:11 +0000 (15:53 -0500)]
anv: Don't claim the null RT as a valid color target

If it's NULL, we can let the compiler go ahead and delete it or flag it
as NULL.

Reviewed-by: Rafael Antognolli <rafael.antognolli@intel.com>
23 months agoanv: Don't delete fragment shaders that write sample mask
Jason Ekstrand [Wed, 30 Oct 2019 20:50:51 +0000 (15:50 -0500)]
anv: Don't delete fragment shaders that write sample mask

Also, use color_outputs_valid rather than nr_color_outputs since it
should be a bit more accurate.

Reviewed-by: Rafael Antognolli <rafael.antognolli@intel.com>
23 months agoglsl: Enable textureSize for samplerExternalOES
Yevhenii Kolesnikov [Mon, 7 Oct 2019 12:59:52 +0000 (15:59 +0300)]
glsl: Enable textureSize for samplerExternalOES

From OES_EGL_image_external_essl3

Closes: https://gitlab.freedesktop.org/mesa/mesa/issues/1901
Signed-off-by: Yevhenii Kolesnikov <yevhenii.kolesnikov@globallogic.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
23 months agoci: Switch over to an autoscaling GKE cluster for builds.
Eric Anholt [Mon, 21 Oct 2019 20:36:14 +0000 (13:36 -0700)]
ci: Switch over to an autoscaling GKE cluster for builds.

The GKE pool we're using is 1-3 32-core VMs, preemptible (to keep
costs down), with 8 jobs concurrent per system.  We have plenty of
memory (4G/core), so we run make -j8 to try to keep the cores busy even
when one job is in a single-threaded step (docker image download, git
clone, artifacts processing, etc.)  When all jobs are generating work
for all the cores, they'll be scheduled fairly.

The nodes in the pool have 300GB boot disks (over-provisioned in space
to provide enough iops and throughput) mounted to /ccache, and
CACHE_DIR set pointing to them.  This means that once a new
autoscaled-up node has run some jobs, it should have a hot ccache from
then on (instead of having to rely on the docker container cache
having our ccache laying around and not getting wiped out by some
other fd.o job).  Local SSDs would provide higher performance, but
unfortunately are not supported with the cluster autoscaler.

For now, the softpipe/llvmpipe test runs are still on the shared
runners, until I can get them ported onto Bas's runner so they can be
parallelized in a single job.

Reviewed-by: Michel Dänzer <mdaenzer@redhat.com>
23 months agoci: Make lava inherit the ccache setup of the .build script.
Eric Anholt [Mon, 28 Oct 2019 22:21:44 +0000 (15:21 -0700)]
ci: Make lava inherit the ccache setup of the .build script.

It was just duplicating the code.

Reviewed-by: Michel Dänzer <mdaenzer@redhat.com>
23 months agomeson: revert glvnd workaround
Eric Engestrom [Wed, 25 Sep 2019 16:38:49 +0000 (17:38 +0100)]
meson: revert glvnd workaround

This effectively reverts MR !2112.

Signed-off-by: Eric Engestrom <eric.engestrom@intel.com>
Reviewed-by: Dylan Baker <dylan@pnwbakers.com>
23 months agomeson: require glvnd 1.2.0
Eric Engestrom [Wed, 25 Sep 2019 16:42:18 +0000 (17:42 +0100)]
meson: require glvnd 1.2.0

Signed-off-by: Eric Engestrom <eric.engestrom@intel.com>
Reviewed-by: Dylan Baker <dylan@pnwbakers.com>
23 months agogitlab-ci: build a recent enough version of GLVND (ie. 1.2.0)
Eric Engestrom [Wed, 25 Sep 2019 19:18:27 +0000 (20:18 +0100)]
gitlab-ci: build a recent enough version of GLVND (ie. 1.2.0)

Signed-off-by: Eric Engestrom <eric.engestrom@intel.com>
Reviewed-by: Dylan Baker <dylan@pnwbakers.com>
23 months agomeson: move idep_xmlconfig_headers to xmlpool/
Eric Engestrom [Thu, 31 Oct 2019 15:35:29 +0000 (15:35 +0000)]
meson: move idep_xmlconfig_headers to xmlpool/

That's where `xmlpool_options_h` is defined, and this way we can make sure
nobody starts making use of it in the future :)

Signed-off-by: Eric Engestrom <eric.engestrom@intel.com>
Acked-by: Dylan Baker <dylan@pnwbakers.com>
23 months agoanv: Use the new BO alloc API for Android
Jason Ekstrand [Thu, 31 Oct 2019 15:28:05 +0000 (10:28 -0500)]
anv: Use the new BO alloc API for Android

Fixes: a44f5ee0d8b "anv: Rework the internal BO allocation API"
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
23 months agozink: emit line-width when using polygon line-mode
Erik Faye-Lund [Wed, 30 Oct 2019 12:57:21 +0000 (13:57 +0100)]
zink: emit line-width when using polygon line-mode

When switching this to dynamic state, I forgot that this also needs to
be emitted when we use a polygon-mode set to lines.

Signed-off-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Fixes: 6d30abb4f14 ("zink: use dynamic state for line-width")
23 months agoradeon: replace xmlpool_options_h with idep_xmlconfig_headers
Eric Engestrom [Sat, 26 Oct 2019 23:55:52 +0000 (00:55 +0100)]
radeon: replace xmlpool_options_h with idep_xmlconfig_headers

Signed-off-by: Eric Engestrom <eric.engestrom@intel.com>
Acked-by: Dylan Baker <dylan@pnwbakers.com>
23 months agor200: replace xmlpool_options_h with idep_xmlconfig_headers
Eric Engestrom [Sat, 26 Oct 2019 23:55:45 +0000 (00:55 +0100)]
r200: replace xmlpool_options_h with idep_xmlconfig_headers

Signed-off-by: Eric Engestrom <eric.engestrom@intel.com>
Acked-by: Dylan Baker <dylan@pnwbakers.com>
23 months agonouveau: replace xmlpool_options_h with idep_xmlconfig_headers
Eric Engestrom [Sat, 26 Oct 2019 23:55:37 +0000 (00:55 +0100)]
nouveau: replace xmlpool_options_h with idep_xmlconfig_headers

Signed-off-by: Eric Engestrom <eric.engestrom@intel.com>
Acked-by: Dylan Baker <dylan@pnwbakers.com>
23 months agoi915: replace xmlpool_options_h with idep_xmlconfig_headers
Eric Engestrom [Sat, 26 Oct 2019 23:55:30 +0000 (00:55 +0100)]
i915: replace xmlpool_options_h with idep_xmlconfig_headers

Signed-off-by: Eric Engestrom <eric.engestrom@intel.com>
Acked-by: Dylan Baker <dylan@pnwbakers.com>
23 months agodri: replace xmlpool_options_h with idep_xmlconfig_headers
Eric Engestrom [Sat, 26 Oct 2019 23:55:06 +0000 (00:55 +0100)]
dri: replace xmlpool_options_h with idep_xmlconfig_headers

Signed-off-by: Eric Engestrom <eric.engestrom@intel.com>
Acked-by: Dylan Baker <dylan@pnwbakers.com>
23 months agotargets/xvmc: replace xmlpool_options_h with idep_xmlconfig_headers
Eric Engestrom [Sat, 26 Oct 2019 23:54:49 +0000 (00:54 +0100)]
targets/xvmc: replace xmlpool_options_h with idep_xmlconfig_headers

Signed-off-by: Eric Engestrom <eric.engestrom@intel.com>
Acked-by: Dylan Baker <dylan@pnwbakers.com>
23 months agotargets/xa: replace xmlpool_options_h with idep_xmlconfig_headers
Eric Engestrom [Sat, 26 Oct 2019 23:54:38 +0000 (00:54 +0100)]
targets/xa: replace xmlpool_options_h with idep_xmlconfig_headers

Signed-off-by: Eric Engestrom <eric.engestrom@intel.com>
Acked-by: Dylan Baker <dylan@pnwbakers.com>
23 months agotargets/vdpau: replace xmlpool_options_h with idep_xmlconfig_headers
Eric Engestrom [Sat, 26 Oct 2019 23:54:28 +0000 (00:54 +0100)]
targets/vdpau: replace xmlpool_options_h with idep_xmlconfig_headers

Signed-off-by: Eric Engestrom <eric.engestrom@intel.com>
Acked-by: Dylan Baker <dylan@pnwbakers.com>
23 months agotargets/va: replace xmlpool_options_h with idep_xmlconfig_headers
Eric Engestrom [Sat, 26 Oct 2019 23:54:19 +0000 (00:54 +0100)]
targets/va: replace xmlpool_options_h with idep_xmlconfig_headers

Signed-off-by: Eric Engestrom <eric.engestrom@intel.com>
Acked-by: Dylan Baker <dylan@pnwbakers.com>
23 months agotargets/omx: replace xmlpool_options_h with idep_xmlconfig_headers
Eric Engestrom [Sat, 26 Oct 2019 23:54:10 +0000 (00:54 +0100)]
targets/omx: replace xmlpool_options_h with idep_xmlconfig_headers

Signed-off-by: Eric Engestrom <eric.engestrom@intel.com>
Acked-by: Dylan Baker <dylan@pnwbakers.com>
23 months agoloader: replace xmlpool_options_h with idep_xmlconfig_headers
Eric Engestrom [Sat, 26 Oct 2019 23:53:37 +0000 (00:53 +0100)]
loader: replace xmlpool_options_h with idep_xmlconfig_headers

Signed-off-by: Eric Engestrom <eric.engestrom@intel.com>
Acked-by: Dylan Baker <dylan@pnwbakers.com>
23 months agopipe-loader: drop unnecessary xmlpool_options_h
Eric Engestrom [Sat, 26 Oct 2019 23:51:41 +0000 (00:51 +0100)]
pipe-loader: drop unnecessary xmlpool_options_h

idep_xmlconfig already covers that

Signed-off-by: Eric Engestrom <eric.engestrom@intel.com>
Acked-by: Dylan Baker <dylan@pnwbakers.com>
23 months agoradv: drop unnecessary xmlpool_options_h
Eric Engestrom [Sat, 26 Oct 2019 23:51:22 +0000 (00:51 +0100)]
radv: drop unnecessary xmlpool_options_h

idep_xmlconfig already covers that

Signed-off-by: Eric Engestrom <eric.engestrom@intel.com>
Acked-by: Dylan Baker <dylan@pnwbakers.com>
23 months agoanv: add missing xmlconfig headers dependency
Eric Engestrom [Sat, 26 Oct 2019 23:04:33 +0000 (00:04 +0100)]
anv: add missing xmlconfig headers dependency

Signed-off-by: Eric Engestrom <eric.engestrom@intel.com>
Acked-by: Dylan Baker <dylan@pnwbakers.com>
23 months agomeson: split out idep_xmlconfig_headers from idep_xmlconfig
Eric Engestrom [Sat, 26 Oct 2019 23:48:36 +0000 (00:48 +0100)]
meson: split out idep_xmlconfig_headers from idep_xmlconfig

A bunch of components need the former but not the latter.

Signed-off-by: Eric Engestrom <eric.engestrom@intel.com>
Acked-by: Dylan Baker <dylan@pnwbakers.com>
23 months agopipe-loader: Build kmsro loader for with all kmsro targets
Alyssa Rosenzweig [Sat, 26 Oct 2019 19:10:22 +0000 (15:10 -0400)]
pipe-loader: Build kmsro loader for with all kmsro targets

Build failure reported by i965 CI, triggered by building dynamic
pipeloaders with kmsro drivers (besides 'frost). At this point, there's
no reason to actually do that -- mesa CI didn't mind -- but let's not
break the build.

v2: Simplify script. Add extra dependencies for v3d.

Fixes: afb0d08cb0f ("pipe-loader: Default to kmsro if probe fails")
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reported-by: Clayton Craft <clayton.a.craft@intel.com>
Tested-by: Clayton Craft <clayton.a.craft@intel.com>
Reviewed-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
23 months agozink: heap-allocate samplers objects
Erik Faye-Lund [Tue, 29 Oct 2019 09:07:53 +0000 (10:07 +0100)]
zink: heap-allocate samplers objects

VkSampler is 64-bit even on 32-bit systems, so casting it to a pointer
is a bad idea there. So let's heap-allocate the sampler-object instead.

Signed-off-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Closes: https://gitlab.freedesktop.org/mesa/mesa/issues/2017
Reviewed-by: Witold Baryluk <witold.baryluk@gmail.com>
Tested-by: Witold Baryluk <witold.baryluk@gmail.com>
23 months agoanv: Zero released anv_bo structs
Jason Ekstrand [Wed, 30 Oct 2019 17:31:12 +0000 (12:31 -0500)]
anv: Zero released anv_bo structs

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
23 months agoanv: Use a bitset for tracking residency
Jason Ekstrand [Tue, 29 Oct 2019 19:26:15 +0000 (14:26 -0500)]
anv: Use a bitset for tracking residency

Now that we can conveniently map between GEM handles and struct anv_bo
pointers, we can use a simple bitset for residency tracking instead of
the complex hash set.  This shaves about 3% off of a CPU-limited example
running with the Dawn WebGPU implementation.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
23 months agoanv: Set the batch allocator for compute pipelines
Jason Ekstrand [Wed, 30 Oct 2019 19:37:45 +0000 (14:37 -0500)]
anv: Set the batch allocator for compute pipelines

Otherwise relocations just up and crash.

Fixes: a3153162a9b "anv: Delay allocation of relocation lists"
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
23 months agoanv: Add a device parameter to anv_execbuf_add_bo
Jason Ekstrand [Tue, 29 Oct 2019 20:18:16 +0000 (15:18 -0500)]
anv: Add a device parameter to anv_execbuf_add_bo

We're about to start needing to lookup BO pointers by GEM handle so we
need access to the device.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
23 months agoanv: Drop anv_bo_init and anv_bo_init_new
Jason Ekstrand [Mon, 28 Oct 2019 23:03:32 +0000 (18:03 -0500)]
anv: Drop anv_bo_init and anv_bo_init_new

BOs are now only ever allocated through the BO cache so there's no need
to have these exposed.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
23 months agoanv: Allocate misc BOs from the cache
Jason Ekstrand [Mon, 28 Oct 2019 22:28:09 +0000 (17:28 -0500)]
anv: Allocate misc BOs from the cache

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
23 months agoanv: Allocate scratch BOs from the cache
Jason Ekstrand [Mon, 28 Oct 2019 21:42:02 +0000 (16:42 -0500)]
anv: Allocate scratch BOs from the cache

While we're here, we get rid of the locking and use a lock-free
algorithm.  The chances of spilling contention are low and this is
actually a bit simpler in some ways.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
23 months agoanv: Allocate batch and fence buffers from the cache
Jason Ekstrand [Mon, 28 Oct 2019 20:42:20 +0000 (15:42 -0500)]
anv: Allocate batch and fence buffers from the cache

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
23 months agoutil: Add a free list structure for use with util_sparse_array
Jason Ekstrand [Mon, 28 Oct 2019 19:49:38 +0000 (14:49 -0500)]
util: Add a free list structure for use with util_sparse_array

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
23 months agoanv: Allocate descriptor buffers from the BO cache
Jason Ekstrand [Fri, 25 Oct 2019 22:15:31 +0000 (17:15 -0500)]
anv: Allocate descriptor buffers from the BO cache

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
23 months agoanv: Set more flags on descriptor pool buffers
Jason Ekstrand [Fri, 25 Oct 2019 22:12:06 +0000 (17:12 -0500)]
anv: Set more flags on descriptor pool buffers

the ASYNC flag, in particular, has the potential to help performance
because it means less sync tracking in the kernel.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
23 months agoanv: Allocate query pool BOs from the cache
Jason Ekstrand [Fri, 25 Oct 2019 22:07:36 +0000 (17:07 -0500)]
anv: Allocate query pool BOs from the cache

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
23 months agoanv: Use the query_slot helper in vkResetQueryPoolEXT
Jason Ekstrand [Fri, 25 Oct 2019 22:07:02 +0000 (17:07 -0500)]
anv: Use the query_slot helper in vkResetQueryPoolEXT

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
23 months agoanv: Allocate block pool BOs from the cache
Jason Ekstrand [Fri, 25 Oct 2019 21:29:29 +0000 (16:29 -0500)]
anv: Allocate block pool BOs from the cache

This commit switches block pools over to being allocated from the BO
cache rather than being allocated manually by the block pool.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
23 months agoanv/tests: Initialize the BO cache and device mutex
Jason Ekstrand [Wed, 30 Oct 2019 16:44:12 +0000 (11:44 -0500)]
anv/tests: Initialize the BO cache and device mutex

We're about to start depending on the BO cache in the state and block
pools so we need them properly initialized for the tests to work.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
23 months agoanv/tests: Zero-initialize instances
Jason Ekstrand [Wed, 30 Oct 2019 16:43:53 +0000 (11:43 -0500)]
anv/tests: Zero-initialize instances

Some of the tests were actually relying on some of those uninitialized
bits to be non-zero.  In particular, a couple want use_softpin = true.

Cc: mesa-stable@lists.freedesktop.org
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
23 months agoanv: Choose BO flags internally in anv_block_pool
Jason Ekstrand [Fri, 25 Oct 2019 23:18:52 +0000 (18:18 -0500)]
anv: Choose BO flags internally in anv_block_pool

All block pools are allocated with the same flags.  There's no good
reason why it needs to be configurable.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
23 months agoanv: Rework the internal BO allocation API
Jason Ekstrand [Fri, 25 Oct 2019 22:45:28 +0000 (17:45 -0500)]
anv: Rework the internal BO allocation API

This makes a number of changes to the current API:

 1. Everything is renamed to anv_device_* instead of anv_bo_cache_*
    because the BO cache is soon going to be the sole BO allocation path
    and not some special case to make import/export work.

 2. Drop the cache parameter.  It's totally redundant with the device
    and just annoying to keep typing.

 3. Rework flags so that they go the convenient direction for usage in
    ANV rather than whichever awkward way the i915 specified it to
    maintain backwards compatibility.  This also gives us the
    opportunity to set some defaults.

 4. Add flags for mapping and coherency.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
23 months agoanv: Use anv_block_pool_foreach_bo in get_bo_from_pool
Jason Ekstrand [Fri, 25 Oct 2019 21:42:47 +0000 (16:42 -0500)]
anv: Use anv_block_pool_foreach_bo in get_bo_from_pool

While we're at it, use gen_48b_address().

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
23 months agoanv: Rework anv_block_pool_expand_range
Jason Ekstrand [Fri, 25 Oct 2019 21:10:11 +0000 (16:10 -0500)]
anv: Rework anv_block_pool_expand_range

The growing algorithms for the softpin case and the userptr version are
almost entirely different.  Having this weird join doesn't make the code
more comprehensible.  This rework does a few things:

 1. Move the comment about 48-bit addresses to anv_device_init where we
    actually unset the EXEC_OBJECT_SUPPORTS_48B_ADDRESS flag.

 2. Separate the paths in anv_block_pool_expand_range so it's easier to
    see what happens in the two different cases.

 3. Use the anv_block_poo::bos array for storing all allocated BOs in
    both paths rather than using the cleanup list in both paths.  This
    lets us make the cleanups array only used for mmaps of the memfd for
    the userptr case.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
23 months agoanv: Fix a potential BO handle leak
Jason Ekstrand [Fri, 25 Oct 2019 20:42:22 +0000 (15:42 -0500)]
anv: Fix a potential BO handle leak

Fixes: 731c4adcf9b "anv/allocator: Add support for non-userptr"
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
23 months agoanv: Handle state pool relocations using "wrapper" BOs
Jason Ekstrand [Fri, 25 Oct 2019 19:52:37 +0000 (14:52 -0500)]
anv: Handle state pool relocations using "wrapper" BOs

Instead of depending on a mutable BO in the state pool for handling
growing state pools, add a concept of "wrapper" BOs which just wrap an
actual BO.  This way, the wrapper can exist once for all of time and we
can put it in relocation lists even if the actual BO it references gets
swapped out.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
23 months agoanv: Replace ANV_BO_EXTERNAL with anv_bo::is_external
Jason Ekstrand [Tue, 29 Oct 2019 01:12:24 +0000 (20:12 -0500)]
anv: Replace ANV_BO_EXTERNAL with anv_bo::is_external

We're not THAT strapped for space that we can't burn one extra bit for
a boolean.  If we're really worried about it, we can always shrink the
flags field to 16 bits because the kernel only uses 7 currently.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
23 months agoanv: Inline anv_block_pool_get_bo
Jason Ekstrand [Fri, 25 Oct 2019 19:51:19 +0000 (14:51 -0500)]
anv: Inline anv_block_pool_get_bo

It has exactly one caller and we're about to change some of the dynamics
which would make this confusing as a separate function.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
23 months agoanv: Declare the bo in the anv_block_pool_foreach_bo loop
Jason Ekstrand [Fri, 25 Oct 2019 21:33:23 +0000 (16:33 -0500)]
anv: Declare the bo in the anv_block_pool_foreach_bo loop

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
23 months agoanv: Stop storing the GEM handle in anv_reloc_list_add
Jason Ekstrand [Fri, 25 Oct 2019 19:33:48 +0000 (14:33 -0500)]
anv: Stop storing the GEM handle in anv_reloc_list_add

We have to go through and rewrite them all anyway so it doesn't do us
any good to put them in the list in anv_reloc_list_add.  Also, for state
pools the handles are likely wrong by the time vkQueueSubmit is called.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
23 months agoanv: Fix a relocation race condition
Jason Ekstrand [Fri, 25 Oct 2019 19:28:02 +0000 (14:28 -0500)]
anv: Fix a relocation race condition

Previously, we would read the offset from the BO in anv_reloc_list_add
to generate the presumed offset and then again in the caller to compute
the 64-bit address to write into the buffer.  However, if the offset
somehow changed between these two points, the presumed offset would no
longer match the written offset.  This is unlikely to actually ever be a
problem in practice because the presumed offset gets recorded first and
so if the written address is wrong then the presumed offset is almost
certainly wrong and the relocation will trigger.  However, it's much
safer to simply have anv_reloc_list_add return the 64-bit address.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
23 months agoanv: Use a util_sparse_array for the GEM handle -> BO map
Jason Ekstrand [Fri, 25 Oct 2019 17:45:41 +0000 (12:45 -0500)]
anv: Use a util_sparse_array for the GEM handle -> BO map

This lets us do less allocation because the anv_bo's are now embedded in
the sparse array and it also allows lock-free translation from GEM
handle to BO which will be useful in future commits.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
23 months agoanv: Move refcount to anv_bo
Jason Ekstrand [Fri, 25 Oct 2019 18:01:55 +0000 (13:01 -0500)]
anv: Move refcount to anv_bo

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
23 months agoutil: Add a util_sparse_array data structure
Jason Ekstrand [Sat, 5 Oct 2019 19:07:50 +0000 (14:07 -0500)]
util: Add a util_sparse_array data structure

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
23 months agomesa: enable msaa in clear_with_quad if needed
Pierre-Eric Pelloux-Prayer [Tue, 29 Oct 2019 18:45:48 +0000 (19:45 +0100)]
mesa: enable msaa in clear_with_quad if needed

If the DrawBuffer sample count is > 1 and msaa is enabled we must also
enable msaa when clearing it.

Fixes: ea5b7de138b ("radeonsi: make gl_SampleMaskIn = 0x1 when MSAA is disabled")
Closes: https://gitlab.freedesktop.org/mesa/mesa/issues/1991
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Tested-by: Witold Baryluk <witold.baryluk@gmail.com>
23 months agointel/perf: fix Android build
Lionel Landwerlin [Thu, 31 Oct 2019 09:34:35 +0000 (11:34 +0200)]
intel/perf: fix Android build

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes: 15b7b56eb2fb ("intel/perf: add TGL support")
Reviewed-by: Eric Engestrom <eric.engestrom@intel.com>
Reviewed-By: Tapani Pälli <tapani.palli@intel.com>
23 months agogitlab-ci: Disable lima jobs
Tomeu Vizoso [Wed, 30 Oct 2019 10:41:41 +0000 (11:41 +0100)]
gitlab-ci: Disable lima jobs

The runner that submits jobs there is down and will turn some time to
get fixed. Disable them for now to keep the CI green.

Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
23 months agoradv: Fix disk_cache_get size argument.
Bas Nieuwenhuizen [Wed, 30 Oct 2019 14:00:39 +0000 (15:00 +0100)]
radv: Fix disk_cache_get size argument.

Got some int->pointer warnings and 20 is not a valid pointer ....

Fixes: 2e3a635ee69 "radv: Add an early exit in the secure compile if we already have the cache entries."
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
23 months agomain: fix several 'may be used uninitialized' warnings
Andrii Simiklit [Mon, 28 Oct 2019 12:23:55 +0000 (14:23 +0200)]
main: fix several 'may be used uninitialized' warnings

This patch fixes approximately 39 warnings in 'texcompress_etc.c'
for the release configuration

v2: Fixed by adding the unreachable case to the etc2_rgb8_fetch_texel
       ( Eric Engestrom <eric.engestrom@intel.com> )

Acked-by: Eric Engestrom <eric.engestrom@intel.com>
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Signed-off-by: Andrii Simiklit <andrii.simiklit@globallogic.com>
23 months agoanv: Remove _mesa_locale_init/fini calls.
Bas Nieuwenhuizen [Thu, 31 Oct 2019 01:36:23 +0000 (02:36 +0100)]
anv: Remove _mesa_locale_init/fini calls.

The resulting locale is not used for Vulkan, and it is not reference
counted, giving issues when multiple instances are created.

CC: 19.2 19.3 <mesa-stable@lists.freedesktop.org>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
23 months agoturnip: Remove _mesa_locale_init/fini calls.
Bas Nieuwenhuizen [Thu, 31 Oct 2019 01:35:51 +0000 (02:35 +0100)]
turnip: Remove _mesa_locale_init/fini calls.

The resulting locale is not used for Vulkan, and it is not reference
counted, giving issues when multiple instances are created.

CC: 19.2 19.3 <mesa-stable@lists.freedesktop.org>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
23 months agoradv: Remove _mesa_locale_init/fini calls.
Bas Nieuwenhuizen [Thu, 31 Oct 2019 01:33:46 +0000 (02:33 +0100)]
radv: Remove _mesa_locale_init/fini calls.

The resulting locale is not used for Vulkan, and it is not reference
counted, giving issues when multiple instances are created.

CC: 19.2 19.3 <mesa-stable@lists.freedesktop.org>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
23 months agoradeonsi: tell the shader disk cache what IR is used
Pierre-Eric Pelloux-Prayer [Wed, 30 Oct 2019 13:28:01 +0000 (14:28 +0100)]
radeonsi: tell the shader disk cache what IR is used

Until 8bef4df196fbb the IR (TGSI or NIR) was used in disk_cache driver_flags.
This commit restores this features to avoid crashing when switching from
one IR to the other.

As radeonsi's default is TGSI, I used "driver_flags & 0x8000000 = 0" for TGSI
to keep the same driver_flags.

Fixes: 8bef4df196f ("radeonsi: add si_debug_options for convenient adding/removing of options")
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
23 months agointel/perf: add TGL support
Lionel Landwerlin [Fri, 20 Sep 2019 18:11:33 +0000 (21:11 +0300)]
intel/perf: add TGL support

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Acked-by: Kenneth Graunke <kenneth@whitecape.org>
23 months agoandroid: Add panfrost support to build scripts
Robert Foss [Tue, 22 Oct 2019 17:31:52 +0000 (19:31 +0200)]
android: Add panfrost support to build scripts

Currently the Android build system doesn't expose the panfrost
driver.

This patch enables the panfrost driver to be build on for the
Android platform.

Signed-off-by: Robert Foss <robert.foss@collabora.com>
Reviewed-By: Rohan Garg <rohan.garg@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
23 months agonir: Build nir_lower_point_size.c in libmesa_nir
Robert Foss [Fri, 25 Oct 2019 15:34:37 +0000 (17:34 +0200)]
nir: Build nir_lower_point_size.c in libmesa_nir

nir_lower_point_size.c was not build into the libmesa_nir library for non-meson
builds. However it was included in the meson build.

This patch fixes that.

Signed-off-by: Robert Foss <robert.foss@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
23 months agov3d: rename vertex shader key (num)_fs_inputs fields
Iago Toral Quiroga [Tue, 29 Oct 2019 07:32:44 +0000 (08:32 +0100)]
v3d: rename vertex shader key (num)_fs_inputs fields

Until now this made sense because we always paired vertex shaders
with fragment shaders, but as soon as we implement geometry and
tessellation shaders that will no longer be the case, so rename
this to (num_)used_outputs.

v2: Use 'used_outputs' instead of ns_outputs, which is more explicit (Eric).

Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
23 months agoandroid: aco: fix Lower to CSSA
Mauro Rossi [Thu, 31 Oct 2019 00:59:07 +0000 (01:59 +0100)]
android: aco: fix Lower to CSSA

Fixes the following building error:

external/mesa/src/amd/compiler/aco_spill.cpp:1768:
error: undefined reference to 'aco::lower_to_cssa(aco::Program*, aco::live&, radv_nir_compiler_options const*)'

Fixes: 0b8216b ("aco: Lower to CSSA")
Signed-off-by: Mauro Rossi <issor.oruam@gmail.com>
23 months agogallium/swr: Fix depth values for blit scenario
Jan Zielinski [Tue, 29 Oct 2019 18:29:27 +0000 (19:29 +0100)]
gallium/swr: Fix depth values for blit scenario

Reviewed-by: Bruce Cherniak <bruce.cherniak@intel.com>
23 months agoiris/gen11+: Move flush for render target change
Jordan Justen [Fri, 15 Feb 2019 19:35:28 +0000 (11:35 -0800)]
iris/gen11+: Move flush for render target change

When starting a BLORP operation, we do the BTI-change flush.  However,
when ending it and transitioning back to regular drawing, we change the
render target again - without a set_framebuffer_state() call.  We need
to do the BTI flush there too.  BLORP flags IRIS_DIRTY_RENDER_BUFFER
now, which will cause the next draw to get the BTI flush again.

(explanation of fix by Ken)

Fixes: 2b956a093a1 ("iris: totally untested icelake support")
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
23 months agoiris: Add IRIS_DIRTY_RENDER_BUFFER state flag
Jordan Justen [Fri, 15 Feb 2019 19:31:31 +0000 (11:31 -0800)]
iris: Add IRIS_DIRTY_RENDER_BUFFER state flag

Fixes: 2b956a093a1 ("iris: totally untested icelake support")
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>