mesa.git
8 years agoilo: set VME for 3DSTATE_PS
Chia-I Wu [Fri, 16 Oct 2015 14:53:05 +0000 (22:53 +0800)]
ilo: set VME for 3DSTATE_PS

When the bit is not set, we can see sampling artifacts on triangle edges when
the mip filter is not GEN6_MIPFILTER_NONE.

8 years agoilo: ignore prefer_linear_threshold when zero
Chia-I Wu [Fri, 16 Oct 2015 08:19:30 +0000 (16:19 +0800)]
ilo: ignore prefer_linear_threshold when zero

This was the intended behavior but it did not work as intended until now.

8 years agoilo: remove some unused kernel params
Chia-I Wu [Fri, 16 Oct 2015 01:50:12 +0000 (09:50 +0800)]
ilo: remove some unused kernel params

8 years agoilo: remove unused ilo_shader_get_type()
Chia-I Wu [Fri, 16 Oct 2015 01:46:25 +0000 (09:46 +0800)]
ilo: remove unused ilo_shader_get_type()

8 years agoilo: remove u_debug.h inclusion from ilo_core.h
Chia-I Wu [Tue, 13 Oct 2015 06:09:24 +0000 (14:09 +0800)]
ilo: remove u_debug.h inclusion from ilo_core.h

Move it to ilo_debug.h.

8 years agoilo: remove u_memory.h inclusion from ilo_core.h
Chia-I Wu [Tue, 13 Oct 2015 06:05:41 +0000 (14:05 +0800)]
ilo: remove u_memory.h inclusion from ilo_core.h

We do not make allocations generally in the core.

8 years agonvc0: do not bind input params at compute state init on Fermi
Samuel Pitoiset [Sat, 17 Oct 2015 15:33:14 +0000 (17:33 +0200)]
nvc0: do not bind input params at compute state init on Fermi

It looks like binding a constant buffer on compute overwrites the 3D
state. To avoid that, we already re-bind all the 3D constant buffers
after launching a compute grid but this is not enough.

Binding the constant buffer of input parameters for the compute state at
initialization corrupts the 3D constant buffers, and it's just useless
to bind it because this is not needed until we really launch a grid.

This fixes some piglit regressions related to interpolation tests
introduced in "nvc0: enable compute support by default on Fermi".

Fixes: 00d6186 (nvc0: enable compute support by default on Fermi)
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
8 years agoi965/vs: Drop hack that created NIR for fixed function vertex programs.
Kenneth Graunke [Thu, 15 Oct 2015 22:34:06 +0000 (15:34 -0700)]
i965/vs: Drop hack that created NIR for fixed function vertex programs.

Marek made core Mesa call ProgramStringNotify(), which solves this
properly.  The hack is no longer needed.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Matt Turner <mattst88@gmail.com>
8 years agoi965/nir: Switch on shader stage in nir_lower_outputs().
Kenneth Graunke [Thu, 15 Oct 2015 22:17:19 +0000 (15:17 -0700)]
i965/nir: Switch on shader stage in nir_lower_outputs().

VS, GS, and FS continue doing the same thing they did before.  We can
simplify the FS code a bit because it is always scalar.

Compute shaders now assert that there are no outputs instead of doing
a loop over 0 outputs.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
8 years agoradeonsi: don't use the AMDGPU intrinsic for CMP
Marek Olšák [Sat, 10 Oct 2015 20:43:19 +0000 (22:43 +0200)]
radeonsi: don't use the AMDGPU intrinsic for CMP

No difference according to shader-db.

Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Reviewed-by: Tom Stellard <thomas.stellard@amd.com>
8 years agoradeonsi: use LRP from gallivm
Marek Olšák [Sat, 10 Oct 2015 20:19:19 +0000 (22:19 +0200)]
radeonsi: use LRP from gallivm

Totals:
SGPRS: 344552 -> 344368 (-0.05 %)
VGPRS: 197132 -> 197552 (0.21 %)
Code Size: 7375376 -> 7366304 (-0.12 %) bytes
LDS: 91 -> 91 (0.00 %) blocks
Scratch: 1679360 -> 1615872 (-3.78 %) bytes per wave

Totals from affected shaders:
SGPRS: 47736 -> 47552 (-0.39 %)
VGPRS: 27952 -> 28372 (1.50 %)
Code Size: 1392724 -> 1383652 (-0.65 %) bytes
LDS: 39 -> 39 (0.00 %) blocks
Scratch: 513024 -> 449536 (-12.38 %) bytes per wave

Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
8 years agoradeonsi: don't emit AMDGPU intrinsics for integer abs, min, max
Marek Olšák [Sat, 10 Oct 2015 19:27:24 +0000 (21:27 +0200)]
radeonsi: don't emit AMDGPU intrinsics for integer abs, min, max

No difference according to shader-db. (with the new S_ABS_I32 pattern)

Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Reviewed-by: Tom Stellard <thomas.stellard@amd.com>
8 years agoradeonsi: don't emit AMDGPU intrinsics for EX2, ROUND, TRUNC
Marek Olšák [Sat, 10 Oct 2015 17:59:57 +0000 (19:59 +0200)]
radeonsi: don't emit AMDGPU intrinsics for EX2, ROUND, TRUNC

No difference according to shader-db.

Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Reviewed-by: Tom Stellard <thomas.stellard@amd.com>
8 years agoradeonsi: initialize output, temp, and address registers to "undef"
Marek Olšák [Sat, 10 Oct 2015 00:40:20 +0000 (02:40 +0200)]
radeonsi: initialize output, temp, and address registers to "undef"

This removes "v_mov v0, 0" which typically occurs before exports.

Totals:
SGPRS: 345216 -> 344552 (-0.19 %)
VGPRS: 197684 -> 197132 (-0.28 %)
Code Size: 7390408 -> 7375376 (-0.20 %) bytes
LDS: 91 -> 91 (0.00 %) blocks
Scratch: 1842176 -> 1679360 (-8.84 %) bytes per wave

Totals from affected shaders:
SGPRS: 101336 -> 100672 (-0.66 %)
VGPRS: 53920 -> 53368 (-1.02 %)
Code Size: 2170176 -> 2155144 (-0.69 %) bytes
LDS: 2 -> 2 (0.00 %) blocks
Scratch: 1015808 -> 852992 (-16.03 %) bytes per wave

Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Reviewed-by: Tom Stellard <thomas.stellard@amd.com>
8 years agogallivm: implement the correct version of LRP
Marek Olšák [Sat, 10 Oct 2015 20:05:58 +0000 (22:05 +0200)]
gallivm: implement the correct version of LRP

The previous version has precision issues. This can be a problem
with tessellation. Sadly, I can't find the article where I read it
anymore. I'm not sure if the unsafe-fp-math flag would be enough to revert
this.

v2: added the comment

8 years agogallivm: set correct opcode info from unary/binary/ternary emits
Marek Olšák [Sat, 10 Oct 2015 19:24:28 +0000 (21:24 +0200)]
gallivm: set correct opcode info from unary/binary/ternary emits

and clear the emit_data structure.

The new radeonsi min/max opcode implementation requires this.

(it looks good according to Roland S.)

8 years agoradeonsi: implement vertex color clamping
Marek Olšák [Wed, 7 Oct 2015 00:36:38 +0000 (02:36 +0200)]
radeonsi: implement vertex color clamping

This is only supported in the compatibility profile (without GS and tess).

Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
8 years agoradeonsi: implement fragment color clamping
Marek Olšák [Tue, 6 Oct 2015 23:47:00 +0000 (01:47 +0200)]
radeonsi: implement fragment color clamping

using the shader key for now.

Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
8 years agoradeonsi: clean up other scratch buffer functions
Marek Olšák [Thu, 8 Oct 2015 23:37:57 +0000 (01:37 +0200)]
radeonsi: clean up other scratch buffer functions

Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
8 years agoradeonsi: clean up copy-pasted scratch buffer updates
Marek Olšák [Thu, 8 Oct 2015 23:35:32 +0000 (01:35 +0200)]
radeonsi: clean up copy-pasted scratch buffer updates

Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
8 years agoradeonsi: unify shader create functions
Marek Olšák [Thu, 8 Oct 2015 23:14:12 +0000 (01:14 +0200)]
radeonsi: unify shader create functions

The shader specifies the processor type, so use that instead.

Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
8 years agoradeonsi: unify shader delete functions
Marek Olšák [Thu, 8 Oct 2015 23:08:42 +0000 (01:08 +0200)]
radeonsi: unify shader delete functions

Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
8 years agoradeonsi: fix a GS copy shader leak
Marek Olšák [Thu, 8 Oct 2015 22:54:17 +0000 (00:54 +0200)]
radeonsi: fix a GS copy shader leak

Cc: mesa-stable@lists.freedesktop.org
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
8 years agoradeonsi: remove an unused ctx parameter in si_shader_destroy
Marek Olšák [Thu, 8 Oct 2015 22:49:13 +0000 (00:49 +0200)]
radeonsi: remove an unused ctx parameter in si_shader_destroy

Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
8 years agoradeonsi: print export_prim_id from the shader key
Marek Olšák [Thu, 8 Oct 2015 22:20:30 +0000 (00:20 +0200)]
radeonsi: print export_prim_id from the shader key

Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
8 years agoradeonsi: disable NaNs for LS and HS
Marek Olšák [Thu, 8 Oct 2015 20:23:18 +0000 (22:23 +0200)]
radeonsi: disable NaNs for LS and HS

They're disabled for all other shaders except compute, but I forgot
to do this for tess stages.

Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
8 years agoradeonsi: clean up si_llvm_init_export_args
Marek Olšák [Tue, 6 Oct 2015 23:28:18 +0000 (01:28 +0200)]
radeonsi: clean up si_llvm_init_export_args

Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
8 years agotgsi: move pipe_shader_from_tgsi_processor function to util
Marek Olšák [Thu, 8 Oct 2015 23:11:31 +0000 (01:11 +0200)]
tgsi: move pipe_shader_from_tgsi_processor function to util

Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
8 years agomesa: remove FLUSH_VERTICES() in _mesa_MatrixMode()
Brian Paul [Wed, 14 Oct 2015 15:08:50 +0000 (09:08 -0600)]
mesa: remove FLUSH_VERTICES() in _mesa_MatrixMode()

Changing the matrix mode alone has no effect on rendering and does
not need to trigger a flush or state validation.

Reviewed-by: Eric Anholt <eric@anholt.net>
Signed-off-by: Marek Olšák <marek.olsak@amd.com>
8 years agost/mesa: fix clip state dependencies
Marek Olšák [Sat, 17 Oct 2015 12:20:01 +0000 (14:20 +0200)]
st/mesa: fix clip state dependencies

This allows removing FLUSH_VERTICES in MatrixMode.

Cc: mesa-stable@lists.freedesktop.org
Reviewed-by: Brian Paul <brianp@vmware.com>
8 years agogallium/hud: fix possible NULL pointer dereference
Marek Olšák [Sat, 17 Oct 2015 17:05:46 +0000 (19:05 +0200)]
gallium/hud: fix possible NULL pointer dereference

Trivial.

8 years agoscons: fix MSVC, MinGW build
Brian Paul [Sat, 17 Oct 2015 16:02:04 +0000 (10:02 -0600)]
scons: fix MSVC, MinGW build

Duplicate the glsl_types_hack.cpp work-around from the libgl-xlib target.

8 years agobuild: fix make-check after a6a6a71
Rob Clark [Sat, 17 Oct 2015 13:49:19 +0000 (09:49 -0400)]
build: fix make-check after a6a6a71

   commit a6a6a71092ba912803ae2b47eb56e3afdf36feb5
   Author:     Rob Clark <robclark@freedesktop.org>
   AuthorDate: Sat Oct 10 14:13:50 2015 -0400

       glsl: (mostly) remove libglsl_util

Was a bit too ambitious on removal of libglsl_util.. it is still needed
by some of the tests.

Signed-off-by: Rob Clark <robclark@freedesktop.org>
8 years agobuild: fix out-of-tree build after b9b40ef
Rob Clark [Sat, 17 Oct 2015 13:28:23 +0000 (09:28 -0400)]
build: fix out-of-tree build after b9b40ef

   commit b9b40ef9b7644ea24768bc8b7464b1719efe99bf
   Author:     Rob Clark <robclark@freedesktop.org>
   AuthorDate: Sat Oct 10 13:55:07 2015 -0400

       nir: remove dependency on glsl

broke things for i965 out of tree build.

Signed-off-by: Rob Clark <robclark@freedesktop.org>
8 years agonvc0: add support for performance monitoring metrics on Fermi
Samuel Pitoiset [Sun, 11 Oct 2015 09:23:54 +0000 (11:23 +0200)]
nvc0: add support for performance monitoring metrics on Fermi

As explained in the CUDA toolkit documentation, "a metric is a
characteristic of an application that is calculated from one or more
event values."

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
8 years agoglsl: (mostly) remove libglsl_util
Rob Clark [Sat, 10 Oct 2015 18:13:50 +0000 (14:13 -0400)]
glsl: (mostly) remove libglsl_util

Now that NIR does not depend on glsl, we can (mostly[*]) get rid of the
libglsl_util hack.

[*] glsl_compiler is the one remaining user of libglsl_util

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Signed-off-by: Rob Clark <robclark@freedesktop.org>
8 years agonir: remove dependency on glsl
Rob Clark [Sat, 10 Oct 2015 17:55:07 +0000 (13:55 -0400)]
nir: remove dependency on glsl

Move glsl_types into NIR, now that the dependency on glsl_symbol_table
has been split out.

Possibly makes sense to rename things at this point, but if we do that
I'd like to keep it split out into a separate patch to make git history
easier to follow (IMHO).

v2: fix android build
v3: I f***ing hate scons.. but at least it builds

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Signed-off-by: Rob Clark <robclark@freedesktop.org>
8 years agoglsl: move half<->float convertion to util
Rob Clark [Sat, 10 Oct 2015 17:26:03 +0000 (13:26 -0400)]
glsl: move half<->float convertion to util

Needed in NIR too, so move out of mesa/main/imports.c

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Signed-off-by: Rob Clark <robclark@freedesktop.org>
8 years agoglsl: move builtin vector types to glsl_types.cpp
Rob Clark [Sat, 10 Oct 2015 16:39:57 +0000 (12:39 -0400)]
glsl: move builtin vector types to glsl_types.cpp

First step at untangling NIR's dependency on glsl_types without bringing
in the dependency on glsl_symbol_table.  The builtin types are now in
glsl_types (which will end up in NIR), but adding them to the symbol-
table stays in builtin_types.cpp (which will not be part of NIR).

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Signed-off-by: Rob Clark <robclark@freedesktop.org>
8 years agoglsl: couple shader_enums cleanups
Rob Clark [Fri, 9 Oct 2015 20:27:45 +0000 (16:27 -0400)]
glsl: couple shader_enums cleanups

Add missing enum to gl_system_value_name() and move VARYING_SLOT_MAX /
FRAG_RESULT_MAX / etc into shader_enums.h as suggested by Emil.

v2: add STATIC_ASSERT()'s

Reported-by: Emil Velikov <emil.l.velikov@gmail.com>
Acked-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Signed-off-by: Rob Clark <robclark@freedesktop.org>
8 years agoglsl: initialise record array count to 1
Timothy Arceri [Thu, 15 Oct 2015 03:10:35 +0000 (14:10 +1100)]
glsl: initialise record array count to 1

This was only being done in one of the two process methods.

Fixes an issue with samplers using the array size of a previous record.

Tested-by: Marek Olšák <marek.olsak@amd.com>
Cc: Jason Ekstrand <jason@jlekstrand.net>
8 years agonir: add atomic lowering support for AoA
Timothy Arceri [Wed, 22 Jul 2015 22:32:00 +0000 (08:32 +1000)]
nir: add atomic lowering support for AoA

Cc: Francisco Jerez <currojerez@riseup.net>
Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
8 years agonir: wrapper for glsl_type arrays_of_arrays_size()
Timothy Arceri [Wed, 22 Jul 2015 22:31:59 +0000 (08:31 +1000)]
nir: wrapper for glsl_type arrays_of_arrays_size()

Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
8 years agoconfigure: show which gallium drivers/sts are built
Ilia Mirkin [Wed, 14 Oct 2015 19:49:58 +0000 (15:49 -0400)]
configure: show which gallium drivers/sts are built

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
8 years agotgsi: initialize ctx.file in tgsi_dump_instruction()
Brian Paul [Fri, 16 Oct 2015 20:31:22 +0000 (14:31 -0600)]
tgsi: initialize ctx.file in tgsi_dump_instruction()

Fixes segfault because of uninitialized file pointer.
Trivial.

8 years agonvc0: add a note about MP counters on GF100/GF110
Samuel Pitoiset [Fri, 16 Oct 2015 08:21:44 +0000 (10:21 +0200)]
nvc0: add a note about MP counters on GF100/GF110

MP counters on GF100/GF110 (compute capability 2.0) are buggy
because there is a context-switch problem that we need to fix.
Results might be wrong sometimes, be careful!

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
8 years agonvc0: add MP counters variants for GF100/GF110
Samuel Pitoiset [Tue, 13 Oct 2015 23:15:43 +0000 (01:15 +0200)]
nvc0: add MP counters variants for GF100/GF110

GF100 and GF110 chipsets are compute capability 2.0, while the other
Fermi chipsets are compute capability 2.1. That's why, some MP counters
are different between these chipsets and we need to handle variants.

Signed-off-by: Samuel Pitoiet <samuel.pitoiset@gmail.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
8 years agonvc0: move SW/HW queries info to their respective files
Samuel Pitoiset [Tue, 13 Oct 2015 20:16:23 +0000 (22:16 +0200)]
nvc0: move SW/HW queries info to their respective files

This will help for handling HW SM queries variants on Fermi.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
8 years agonvc0: enable compute support by default on Fermi
Samuel Pitoiset [Fri, 9 Oct 2015 14:53:18 +0000 (16:53 +0200)]
nvc0: enable compute support by default on Fermi

Compute support was not enabled by default because weird effects
on 3D state happened, but I can't reproduce them anymore.

This also enables MP performance counters by default on Fermi.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
8 years agonvc0: allow only one active query for the MP counters group
Samuel Pitoiset [Mon, 28 Sep 2015 15:29:37 +0000 (17:29 +0200)]
nvc0: allow only one active query for the MP counters group

Because we can't expose the number of hardware counters needed for each
different query, we don't want to allow more than one active query
simultaneously to avoid failure when the maximum number of counters
is reached. Note that these groups of GPU counters are currently only
used by AMD_performance_monitor.

Like for Kepler, this limits the maximum number of active queries
to 1 on Fermi.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
8 years agonvc0: read MP counters of all GPCs on Fermi
Samuel Pitoiset [Fri, 9 Oct 2015 14:10:19 +0000 (16:10 +0200)]
nvc0: read MP counters of all GPCs on Fermi

When a card has more than one GPC, the grid used by the compute
kernel which reads MP performance counters seems to be too small.
The consequence is that the kernel is not launched on all TPCs.

Increasing the grid size using the number of GPCs now launches
enough blocks and we can read MP performance counters of all TPCs.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
8 years agonvc0: store the number of GPCs to nvc0_screen
Samuel Pitoiset [Tue, 6 Oct 2015 20:24:31 +0000 (22:24 +0200)]
nvc0: store the number of GPCs to nvc0_screen

NOUVEAU_GETPARAM_GRAPH_UNITS param returns the number of GPCs, the total
number of TPCs and the number of ROP units. Note that when the DRM
version is too old the default number of GPCs is fixed to 4.

This will be used to launch the compute kernel which is used to read MP
performance counters over all GPCs.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
8 years agonvc0: fix unaligned mem access when reading MP counters on Fermi
Samuel Pitoiset [Fri, 9 Oct 2015 09:22:20 +0000 (11:22 +0200)]
nvc0: fix unaligned mem access when reading MP counters on Fermi

Memory access have to be aligned to 128-bits. Note that this
doesn't happen when the card only has TPC.

This patch fixes the following dmesg fail:

gr: GPC0/TPC1/MP trap: global 00000004 [MULTIPLE_WARP_ERRORS] warp 000f
[UNALIGNED_MEM_ACCESS]

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
8 years agonvc0: fix monitoring multiple MP counters queries on Fermi
Samuel Pitoiset [Fri, 9 Oct 2015 09:18:45 +0000 (11:18 +0200)]
nvc0: fix monitoring multiple MP counters queries on Fermi

For strange reasons, the signal id depends on the slot selected on Fermi
but not on Kepler. Fortunately, the signal ids are just offseted by the
slot id!

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
8 years agonvc0: fix queries which use multiple MP counters on Fermi
Samuel Pitoiset [Fri, 9 Oct 2015 09:14:31 +0000 (11:14 +0200)]
nvc0: fix queries which use multiple MP counters on Fermi

Queries which use more than one MP counters was misconfigured and
computing the final result was also wrong because sources need to
be configured on different hardware counters instead.

According to the blob, computing the result is now as follows:

FOR  i..n
val += ctr[i] * pow(2, i)

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
8 years agonvc0: allow to use 8 MP counters on Fermi
Samuel Pitoiset [Fri, 9 Oct 2015 09:01:56 +0000 (11:01 +0200)]
nvc0: allow to use 8 MP counters on Fermi

On Fermi, we have one domain of 8 MP counters while we have
two domains of 4 MP counters on Kepler.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
8 years agonvc0: fix sequence field init for MP counters on Fermi
Samuel Pitoiset [Fri, 9 Oct 2015 13:33:23 +0000 (15:33 +0200)]
nvc0: fix sequence field init for MP counters on Fermi

Sequence fields are located at MP[i] + 0x20 in the buffer object.
This is used to check if result is available for MP[i].

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
8 years agonvc0: correctly enable the MP counters' multiplexer on Fermi
Samuel Pitoiset [Fri, 9 Oct 2015 08:55:25 +0000 (10:55 +0200)]
nvc0: correctly enable the MP counters' multiplexer on Fermi

Writing 0x408000 to 0x419e00 (like on Kepler) has no effect on Fermi
because we only have one domain of 8 counters. Instead, we have to
write 0x80000000.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
8 years agonvc0: rip off the kepler MP-enabling logic from the Fermi codepath
Samuel Pitoiset [Fri, 9 Oct 2015 08:54:15 +0000 (10:54 +0200)]
nvc0: rip off the kepler MP-enabling logic from the Fermi codepath

Writing 0x1fcb to 0x419eac is definitely not related to MP counters and
has no effect on Fermi (although this enables MP counters on Kepler).

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
8 years agonvc0: split out begin_query() hook used by MP counters
Samuel Pitoiset [Fri, 9 Oct 2015 08:45:04 +0000 (10:45 +0200)]
nvc0: split out begin_query() hook used by MP counters

The way we configure MP performance counters is going to pretty
different between Fermi and Kepler. Having two separate functions
is much better.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
8 years agonvc0: remove useless call to query_get_cfg() in nvc0_hw_sm_query_end()
Samuel Pitoiset [Fri, 9 Oct 2015 08:36:39 +0000 (10:36 +0200)]
nvc0: remove useless call to query_get_cfg() in nvc0_hw_sm_query_end()

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
8 years agosvga: only count hardware buffer mappings for HUD
Brian Paul [Tue, 13 Oct 2015 00:40:27 +0000 (18:40 -0600)]
svga: only count hardware buffer mappings for HUD

Don't count client memory buffer mappings since they're basically free.

Reviewed-by: Charmaine Lee <charmainel@vmware.com>
8 years agosvga: add new GALLIUM_HUD queries
Neha Bhende [Fri, 9 Oct 2015 22:10:16 +0000 (16:10 -0600)]
svga: add new GALLIUM_HUD queries

Add new GALLIUM_HUD queries for:
    num-shaders
    num-resources
    num-state-objects
    num-validations
    map-buffer-time
    num-surface-views
    num-resources-mapped
    num-flushes

Most of this patch was originally written by Neha.  Additional clean-ups
and num-flushes counter added by Brian Paul.

Reviewed-by: Brian Paul <brianp@vmware.com>
Reviewed-by: Charmaine Lee <charmainel@vmware.com>
8 years agosvga: use new svga_new_shader_variant() function
Brian Paul [Fri, 9 Oct 2015 03:06:18 +0000 (21:06 -0600)]
svga: use new svga_new_shader_variant() function

To simplify upcoming new HUD shader count implementation.

Reviewed-by: Charmaine Lee <charmainel@vmware.com>
8 years agosvga: pass context to svga_tgsi_vgpu9_translate()
Brian Paul [Fri, 9 Oct 2015 03:03:27 +0000 (21:03 -0600)]
svga: pass context to svga_tgsi_vgpu9_translate()

Will be used for upcoming change.

Reviewed-by: Charmaine Lee <charmainel@vmware.com>
8 years agosvga: remove svga_tgsi_vgpu9_translate() call in GS path
Brian Paul [Fri, 9 Oct 2015 03:00:37 +0000 (21:00 -0600)]
svga: remove svga_tgsi_vgpu9_translate() call in GS path

We can never have geometry shaders with vgpu9.

Reviewed-by: Charmaine Lee <charmainel@vmware.com>
8 years agoglsl: silence warning about unhandled ast_unsized_array_dim case in switch
Brian Paul [Thu, 15 Oct 2015 13:26:49 +0000 (07:26 -0600)]
glsl: silence warning about unhandled ast_unsized_array_dim case in switch

Reviewed-by: Timothy Arceri <t_arceri@yahoo.com.au>
8 years agost/mesa: fix incorrect pointer type arguments in st_new_program()
Brian Paul [Thu, 15 Oct 2015 13:25:51 +0000 (07:25 -0600)]
st/mesa: fix incorrect pointer type arguments in st_new_program()

Silences 5 warnings of the type:
state_tracker/st_cb_program.c: In function 'st_new_program':
state_tracker/st_cb_program.c:108:7: warning: passing argument 1 of
'_mesa_init_gl_program' from incompatible pointer type [enabled by default]
       return _mesa_init_gl_program(&prog->Base, target, id);
       ^
Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>
8 years agoRevert "mesa: remove FLUSH_VERTICES() in _mesa_MatrixMode()"
Brian Paul [Fri, 16 Oct 2015 15:10:22 +0000 (09:10 -0600)]
Revert "mesa: remove FLUSH_VERTICES() in _mesa_MatrixMode()"

This reverts commit 0de5e0f3fb0f3671a3ecec6ab4473f9131ecd0ae.

Michel Dänzer spotted two piglit regressions from the change.  I suspect
that removing the FLUSH_VERTICES() actually exposed a bug elsewhere but
I don't have time to hunt down the root issue at this time.

8 years agoglsl: fix check SSBOs support for builtin functions
Samuel Iglesias Gonsalvez [Fri, 16 Oct 2015 06:44:38 +0000 (08:44 +0200)]
glsl: fix check SSBOs support for builtin functions

has_shader_storage_buffer_objects() returns true also if the OpenGL
context is 4.30 or ES 3.1.

Previously, we were saying that all atomic*() GLSL builtin functions
for SSBOs were not available when OpenGL ES 3.1 context was in use.

Fixes 48 dEQP-GLES31 tests:

dEQP-GLES31.functional.ssbo.atomic.*

Signed-off-by: Samuel Iglesias Gonsalvez <siglesias@igalia.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
8 years agomesa: Set api prefix to version string when overriding version
Tapani Pälli [Tue, 13 Oct 2015 05:49:57 +0000 (08:49 +0300)]
mesa: Set api prefix to version string when overriding version

Otherwise there are problems when user overrides version and application
such as Piglit wants to detect used api with glGetString(GL_VERSION).

This makes it currently impossible to run glslparsertest tests for
OpenGL ES when using version override.

Below is example when using MESA_GLES_VERSION_OVERRIDE=3.1.

Before:
"3.1 Mesa 11.1.0-devel (git-24a1a15)"

After:
"OpenGL ES 3.1 Mesa 11.1.0-devel (git-78042ff)"

v2: only include api prefix for OpenGL ES (Boyan Ding)

Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Cc: "11.0" <mesa-stable@lists.freedesktop.org>
8 years agonir: Get the number of SSBOs and UBOs right
Iago Toral Quiroga [Thu, 15 Oct 2015 06:47:09 +0000 (08:47 +0200)]
nir: Get the number of SSBOs and UBOs right

Before d31f98a272e429d and 56e2bdbca36a20 we had a sigle index space for UBOs
and SSBOs, so NumBufferInterfaceBlocks would contain the combined number of
blocks, not just one kind. This means that for shader programs using both
UBOs and SSBOs, we were setting num_ssbos and num_ubos to a larger number than
we should. Since the above commits  we have separate index spaces for each
so we can just get the right numbers.

Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
8 years agoi965/vec4: Use the right number of UBOs
Iago Toral Quiroga [Thu, 15 Oct 2015 06:48:03 +0000 (08:48 +0200)]
i965/vec4: Use the right number of UBOs

Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
8 years agoi965/fs: use the right number of UBOs
Iago Toral Quiroga [Thu, 15 Oct 2015 06:47:40 +0000 (08:47 +0200)]
i965/fs: use the right number of UBOs

Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
8 years agofreedreno: add debug option to dirty state after draw
Rob Clark [Thu, 15 Oct 2015 20:28:17 +0000 (16:28 -0400)]
freedreno: add debug option to dirty state after draw

Similar to "dclear", "ddraw" will mark all state dirty after each draw.

Signed-off-by: Rob Clark <robclark@freedesktop.org>
8 years agofreedreno/a3xx: cache-flush is needed after MEM_WRITE
Rob Clark [Thu, 15 Oct 2015 20:22:23 +0000 (16:22 -0400)]
freedreno/a3xx: cache-flush is needed after MEM_WRITE

Otherwise the mem2gmem blit would see potentially bogus texture
coordinates.  Fixes an issue that shows up with glamor.

CC: "11.0" <mesa-stable@lists.freedesktop.org>
Signed-off-by: Rob Clark <robclark@freedesktop.org>
8 years agogallium/util: fix debug_get_flags_option on 32-bit harder
Rob Clark [Thu, 15 Oct 2015 17:30:24 +0000 (13:30 -0400)]
gallium/util: fix debug_get_flags_option on 32-bit harder

(yes, we want PRI?64, but we want the x version rather than the u
version)

Signed-off-by: Rob Clark <robclark@freedesktop.org>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
8 years agonv30: include the header of ffs prototype
Chih-Wei Huang [Thu, 15 Oct 2015 15:46:32 +0000 (23:46 +0800)]
nv30: include the header of ffs prototype

It fixes a building error of the android 6.0 64-bit target.

Signed-off-by: Chih-Wei Huang <cwhuang@linux.org.tw>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Cc: mesa-stable@lists.freedesktop.org
8 years agonv50/ir: use C++11 standard std::unordered_map if possible
Chih-Wei Huang [Thu, 15 Oct 2015 15:46:30 +0000 (23:46 +0800)]
nv50/ir: use C++11 standard std::unordered_map if possible

Note Android version before Lollipop is not supported.

Signed-off-by: Chih-Wei Huang <cwhuang@linux.org.tw>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Cc: mesa-stable@lists.freedesktop.org
8 years agonir/prog: Don't double-insert the fog-coord variable
Jason Ekstrand [Thu, 15 Oct 2015 16:20:24 +0000 (09:20 -0700)]
nir/prog: Don't double-insert the fog-coord variable

nir_variable_create already inserts it in the right list for us so
inserting it again causes a linked list corruption.

Reviewed-by: Matt Turner <mattst88@gmail.com>
8 years agonir/glsl: Use shader_prog->Name for naming the NIR shader
Jason Ekstrand [Fri, 9 Oct 2015 01:36:27 +0000 (18:36 -0700)]
nir/glsl: Use shader_prog->Name for naming the NIR shader

This has the better name to use. Aparently, sh->Name is usually 0.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Neil Roberts <neil@linux.intel.com>
8 years agonir: Add helpers for creating variables and adding them to lists
Jason Ekstrand [Fri, 9 Oct 2015 14:05:11 +0000 (07:05 -0700)]
nir: Add helpers for creating variables and adding them to lists

Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
8 years agonir/prog: Use nir_foreach_variable
Jason Ekstrand [Fri, 9 Oct 2015 14:02:57 +0000 (07:02 -0700)]
nir/prog: Use nir_foreach_variable

Reviewed-by: Matt Turner <mattst88@gmail.com>
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
8 years agomesa: wrap a ridiculously long line in es1_conversion.c
Brian Paul [Wed, 14 Oct 2015 15:53:53 +0000 (09:53 -0600)]
mesa: wrap a ridiculously long line in es1_conversion.c

Reviewed-by: Eric Anholt <eric@anholt.net>
8 years agomesa: add num_buffers() helper in blend.c
Brian Paul [Wed, 14 Oct 2015 15:53:26 +0000 (09:53 -0600)]
mesa: add num_buffers() helper in blend.c

Reviewed-by: Eric Anholt <eric@anholt.net>
8 years agomesa: optimize _UsesDualSrc blend flag setting
Brian Paul [Wed, 14 Oct 2015 16:08:18 +0000 (10:08 -0600)]
mesa: optimize _UsesDualSrc blend flag setting

For glBlendFunc and glBlendFuncSeparate(), the _UsesDualSrc flag
will be the same for all buffers, so no need to compute it N times.

Reviewed-by: Eric Anholt <eric@anholt.net>
8 years agomesa: fix incorrect error string in _mesa_BlendEquationiARB()
Brian Paul [Wed, 14 Oct 2015 15:34:39 +0000 (09:34 -0600)]
mesa: fix incorrect error string in _mesa_BlendEquationiARB()

Reviewed-by: Eric Anholt <eric@anholt.net>
8 years agomesa: move validate_blend_factors() call after no-change check
Brian Paul [Wed, 14 Oct 2015 15:35:53 +0000 (09:35 -0600)]
mesa: move validate_blend_factors() call after no-change check

A redundant call to glBlendFuncSeparateiARB() is more likely than getting
invalid values, so do the no-op check first.

Reviewed-by: Eric Anholt <eric@anholt.net>
8 years agomesa: optimize no-change check in _mesa_BlendEquationSeparate()
Brian Paul [Wed, 14 Oct 2015 15:45:36 +0000 (09:45 -0600)]
mesa: optimize no-change check in _mesa_BlendEquationSeparate()

Reviewed-by: Eric Anholt <eric@anholt.net>
8 years agomesa: optimize no-change check in _mesa_BlendEquation()
Brian Paul [Wed, 14 Oct 2015 15:41:11 +0000 (09:41 -0600)]
mesa: optimize no-change check in _mesa_BlendEquation()

Same story as preceeding change to _mesa_BlendFuncSeparate().

Reviewed-by: Eric Anholt <eric@anholt.net>
8 years agomesa: optimize no-change check in _mesa_BlendFuncSeparate()
Brian Paul [Wed, 14 Oct 2015 15:31:41 +0000 (09:31 -0600)]
mesa: optimize no-change check in _mesa_BlendFuncSeparate()

Streamline the checking for no state change in _mesa_BlendFuncSeparate()
(and _mesa_BlendFunc()).  If _BlendFuncPerBuffer is false, we only need
to check the 0th buffer state.  Move argument validation after the no-op
check.

I'm looking at an app that issues about 1000 redundant glBlendFunc()
calls per frame!

Reviewed-by: Eric Anholt <eric@anholt.net>
8 years agomesa: short-cut new_state == _NEW_LINE in _mesa_update_state_locked()
Brian Paul [Wed, 14 Oct 2015 15:10:19 +0000 (09:10 -0600)]
mesa: short-cut new_state == _NEW_LINE in _mesa_update_state_locked()

We can skip to the end of _mesa_update_state_locked() if only the
_NEW_LINE flag is set since none of the derived state depends on it
(just like _NEW_CURRENT_ATTRIB).  Note that we still call the
ctx->Driver.UpdateState() function, of course.

v2: use bitmask-based test, per Eric.

Reviewed-by: Eric Anholt <eric@anholt.net>
8 years agomesa: remove FLUSH_VERTICES() in _mesa_MatrixMode()
Brian Paul [Wed, 14 Oct 2015 15:08:50 +0000 (09:08 -0600)]
mesa: remove FLUSH_VERTICES() in _mesa_MatrixMode()

Changing the matrix mode alone has no effect on rendering and does
not need to trigger a flush or state validation.

Reviewed-by: Eric Anholt <eric@anholt.net>
8 years agomesa: android: Fix the incorrect path of sse_minmax.c
Chih-Wei Huang [Mon, 12 Oct 2015 15:36:59 +0000 (23:36 +0800)]
mesa: android: Fix the incorrect path of sse_minmax.c

Cc: "10.6 11.0" <mesa-stable@lists.freedesktop.org>
Fixes: 669cfc267a1 (android: mesa: fix the path of the SSE4_1
optimisations)
Signed-off-by: Chih-Wei Huang <cwhuang@linux.org.tw>
Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>
8 years agoi965: android: add the i965_compile_FILES sources to the driver
Mauro Rossi [Sun, 11 Oct 2015 11:49:38 +0000 (13:49 +0200)]
i965: android: add the i965_compile_FILES sources to the driver

i965_compile_FILES are needed otherwise we'll error out as below:

target SharedLib: i915_dri (out/target/product/x86/obj/SHARED_LIBRARIES/i915_dri_intermediates/LINKED/i915_dri.so)
external/mesa/src/mesa/drivers/dri/i965/brw_ir_fs.h:181: error: undefined reference to 'fs_inst::~fs_inst()'
...
...
external/mesa/src/mesa/drivers/dri/i965/intel_screen.c:1484: error: undefined reference to 'brw_compiler_create'
collect2: error: ld returned 1 exit status
build/core/shared_library.mk:81: recipe for target 'out/target/product/x86/obj/SHARED_LIBRARIES/i965_dri_intermediates/LINKED/i965_dri.so' failed
make: *** [out/target/product/x86/obj/SHARED_LIBRARIES/i965_dri_intermediates/LINKED/i965_dri.so] Error 1

[Emil Velikov: tweak commit message]
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
8 years agoprogram: convert _mesa_init_gl_program() to take struct gl_program *
Emil Velikov [Tue, 13 Oct 2015 10:26:09 +0000 (11:26 +0100)]
program: convert _mesa_init_gl_program() to take struct gl_program *

Rather than accepting a void pointer, only to down and up cast around
it, convert the function to take the base (struct gl_program) pointer.

Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
8 years agonir: include nir_instr_set.h in the tarball
Emil Velikov [Sat, 10 Oct 2015 15:13:38 +0000 (16:13 +0100)]
nir: include nir_instr_set.h in the tarball

Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
8 years agoglsl: Allow arrays of arrays in GLSL ES 3.10 and GLSL 4.30
Timothy Arceri [Fri, 5 Jun 2015 23:10:55 +0000 (09:10 +1000)]
glsl: Allow arrays of arrays in GLSL ES 3.10 and GLSL 4.30

V3: use a check_*_allowed style function for requirements checking
rather than has_* which doesn't encapsulate the error message

V2: add missing 's' to the extension name in error messages
 and add decimal place in version string

Reviewed-by: Marta Lofstedt <marta.lofstedt@intel.com>
8 years agoglsl: allow for AoA in calculating offset to ubo start region
Timothy Arceri [Fri, 9 Oct 2015 11:00:20 +0000 (22:00 +1100)]
glsl: allow for AoA in calculating offset to ubo start region

Reviewed-by: Samuel Iglesias Gonsálvez <siglesias@igalia.com>
8 years agoglsl: build ubo name and indexing offset for AoA
Timothy Arceri [Fri, 9 Oct 2015 10:54:09 +0000 (21:54 +1100)]
glsl: build ubo name and indexing offset for AoA

V2: split out unrelated change as suggested by Samuel

Reviewed-by: Samuel Iglesias Gonsálvez <siglesias@igalia.com>