mesa.git
4 years agoloader/dri3: Process event after each fence wait
Thomas Hellstrom [Tue, 5 Sep 2017 07:58:08 +0000 (09:58 +0200)]
loader/dri3: Process event after each fence wait

This tries to mimic dri2 behaviour where events are typically processed
while waiting for X replies. Since, during steady-state dri3 rendering, we
seldom wait for xcb replies, and haven't enabled any automatic event
processing, instead check for events after a fence wait.

Signed-off-by: Thomas Hellstrom <thellstrom@vmware.com>
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
4 years agost/mesa: skip draw calls with pipe_draw_info::count == 0
Marek Olšák [Fri, 1 Sep 2017 21:27:35 +0000 (23:27 +0200)]
st/mesa: skip draw calls with pipe_draw_info::count == 0

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=102502

Cc: 17.2 <mesa-stable@lists.freedesktop.org>
Tested-by: Alexandre Demers <alexandre.f.demers@gmail.com>
Tested-by: Dieter Nützel <Dieter@nuetzel-hh.de>
Acked-by: Timothy Arceri <tarceri@itsqueeze.com>
4 years agodocs: update envvar docs to reflect MESA_NO_ERROR change
Eric Engestrom [Thu, 7 Sep 2017 10:10:55 +0000 (11:10 +0100)]
docs: update envvar docs to reflect MESA_NO_ERROR change

I changed the behaviour earlier today, but forgot to update the
corresponding docs.

Fixes: 77713a0acb09f475d29f "mesa: allow user to set MESA_NO_ERROR=0"
Suggested-by: Emil Velikov <emil.l.velikov@gmail.com>
Signed-off-by: Eric Engestrom <eric.engestrom@imgtec.com>
4 years agoradv: do not use a bitfield when dirtying the vertex buffers
Samuel Pitoiset [Wed, 6 Sep 2017 13:46:18 +0000 (15:46 +0200)]
radv: do not use a bitfield when dirtying the vertex buffers

Useless to track which one has been updated because we
re-upload all the vertex buffers in one shot.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
4 years agoradv: remove unused radv_meta_saved_state::vertex_saved field
Samuel Pitoiset [Wed, 6 Sep 2017 13:38:59 +0000 (15:38 +0200)]
radv: remove unused radv_meta_saved_state::vertex_saved field

It's always false.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
4 years agomesa: allow user to set MESA_NO_ERROR=0
Eric Engestrom [Wed, 6 Sep 2017 14:24:02 +0000 (14:24 +0000)]
mesa: allow user to set MESA_NO_ERROR=0

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=102530
Cc: Michel Dänzer <michel@daenzer.net>
Cc: Alexandre Demers <alexandre.f.demers@gmail.com>
Signed-off-by: Eric Engestrom <eric.engestrom@imgtec.com>
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
4 years agoutil: rename include guard to avoid clash
Eric Engestrom [Wed, 6 Sep 2017 14:23:52 +0000 (14:23 +0000)]
util: rename include guard to avoid clash

src/mesa/main/debug.h uses the same include guard.

Signed-off-by: Eric Engestrom <eric.engestrom@imgtec.com>
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
4 years agollvmpipe, tgsi: hook up dx10 gather4 opcode
Roland Scheidegger [Tue, 5 Sep 2017 15:59:37 +0000 (17:59 +0200)]
llvmpipe, tgsi: hook up dx10 gather4 opcode

Trivial. We already support tg4 for legacy tex opcodes, so the actual
texture sampling code already handles it.
(Just like TG4, we don't handle additional capabilities and always sample
red channel.)

Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
4 years agollvmpipe, draw: increase shader cache limits
Roland Scheidegger [Mon, 4 Sep 2017 22:17:31 +0000 (00:17 +0200)]
llvmpipe, draw: increase shader cache limits

We're not particularly concerned with memory usage, if the tradeoff is
shader recompiles. And it's common for apps to have a lot of shaders
nowadays (and, since our shaders include a LOT of context state of course
we may create quite a bit more shaders even).
So quadruple the amount of shaders draw will cache (from 128 to 512).
For llvmpipe (fs shaders) quadruple the number of instructions, keep the
number of variants the same for now (only with very simple, non-texturing
shaders the variant limit could really be reached), and simplify the
definition, it's probably easier to just have one different definition
per branch...

Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
4 years agoac/surface: reduce gfx9_surface_layout size.
Dave Airlie [Wed, 6 Sep 2017 03:47:51 +0000 (13:47 +1000)]
ac/surface: reduce gfx9_surface_layout size.

152->144.

Signed-off-by: Dave Airlie <airlied@redhat.com>
4 years agoradv: reduce radv_amdgpu_winsys struct size.
Dave Airlie [Wed, 6 Sep 2017 03:40:50 +0000 (13:40 +1000)]
radv: reduce radv_amdgpu_winsys struct size.

1168->1160.

Signed-off-by: Dave Airlie <airlied@redhat.com>
4 years agoradv: reduce radv_image struct size.
Dave Airlie [Wed, 6 Sep 2017 03:39:58 +0000 (13:39 +1000)]
radv: reduce radv_image struct size.

1480->1472.

Signed-off-by: Dave Airlie <airlied@redhat.com>
4 years agoradv: reduce radv_shader_variant struct size.
Dave Airlie [Wed, 6 Sep 2017 03:39:07 +0000 (13:39 +1000)]
radv: reduce radv_shader_variant struct size.

544->536

Signed-off-by: Dave Airlie <airlied@redhat.com>
4 years agoradv: reduce radv_cmd_state struct size.
Dave Airlie [Wed, 6 Sep 2017 03:38:30 +0000 (13:38 +1000)]
radv: reduce radv_cmd_state struct size.

1632->1624.

Signed-off-by: Dave Airlie <airlied@redhat.com>
4 years agoradv: reduce meta_saved_state struct size.
Dave Airlie [Wed, 6 Sep 2017 03:37:42 +0000 (13:37 +1000)]
radv: reduce meta_saved_state struct size.

904->896.

Signed-off-by: Dave Airlie <airlied@redhat.com>
4 years agonir: put compact into bitfields in nir_variable_data
Dave Airlie [Wed, 6 Sep 2017 03:18:45 +0000 (13:18 +1000)]
nir: put compact into bitfields in nir_variable_data

This being declared bool means it won't get merged with the previous
bitfields, this seems like an oversight rather than deliberate.

Noticed when running pahole.

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Signed-off-by: Dave Airlie <airlied@redhat.com>
4 years agoanv: Annotate entrypoint table with index and func name
Chad Versace [Fri, 25 Aug 2017 12:04:13 +0000 (05:04 -0700)]
anv: Annotate entrypoint table with index and func name

This helps when debugging a broken entrypoint table.

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
4 years agoradeon/uvd: fix the assertion check for YUYV format
Leo Liu [Tue, 5 Sep 2017 17:30:57 +0000 (13:30 -0400)]
radeon/uvd: fix the assertion check for YUYV format

Fixes:7319ff87("radeon/uvd: add YUYV format support for target buffer")

Signed-off-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
4 years agointel: Add brand string for KBL-R
Anuj Phogat [Thu, 31 Aug 2017 18:33:12 +0000 (11:33 -0700)]
intel: Add brand string for KBL-R

Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
4 years agointel: Remove unused device info for KBL GT1.5
Anuj Phogat [Thu, 31 Aug 2017 18:29:03 +0000 (11:29 -0700)]
intel: Remove unused device info for KBL GT1.5

Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
4 years agointel: Change a KBL pci id to GT2 from GT1.5
Anuj Phogat [Thu, 31 Aug 2017 18:32:41 +0000 (11:32 -0700)]
intel: Change a KBL pci id to GT2 from GT1.5

Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
4 years agointel: Fix few KBL brand strings
Anuj Phogat [Thu, 31 Aug 2017 18:18:21 +0000 (11:18 -0700)]
intel: Fix few KBL brand strings

Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
4 years agointel: Remove unused Kabylake pci ids
Anuj Phogat [Thu, 31 Aug 2017 18:14:42 +0000 (11:14 -0700)]
intel: Remove unused Kabylake pci ids

These PCI IDs are not used in any Kabylake SKUs.

Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
4 years agoRevert "Android: add -Wno-date-time flag for clang"
Emil Velikov [Tue, 5 Sep 2017 14:10:45 +0000 (15:10 +0100)]
Revert "Android: add -Wno-date-time flag for clang"

This reverts commit 6dae9176d60d12de61aa03906c44f81e20ef7622.

No longer needed as of last commit.

Cc: Rob Herring <robh@kernel.org>
4 years agomesa: replace date/time macros with MESA_GIT_SHA1
Emil Velikov [Tue, 5 Sep 2017 14:02:03 +0000 (15:02 +0100)]
mesa: replace date/time macros with MESA_GIT_SHA1

Former is non-deterministic, results in non-reproducible builds and
compilers throw a warning about it.

Cc: Rob Herring <robh@kernel.org>
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Eric Engestrom <eric.engestrom@imgtec.com>
4 years agomesa: don't use %s for PACKAGE_VERSION macro
Emil Velikov [Tue, 5 Sep 2017 13:48:49 +0000 (14:48 +0100)]
mesa: don't use %s for PACKAGE_VERSION macro

The macro itself is a well defined string, which cannot cause issues
with printf or other printf-like functions.

All other places through Mesa already use it directly, so let's update
the final two instances.

Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Eric Engestrom <eric.engestrom@imgtec.com>
4 years agodocs/release-calendar: update and extend
Emil Velikov [Tue, 5 Sep 2017 14:09:15 +0000 (15:09 +0100)]
docs/release-calendar: update and extend

v2: Correct 17.1.10 version, adjust some names.
v3: Add missing <tr> (Andres)

Cc: Juan A. Suárez <jasuarez@igalia.com>
Cc: Andres Gomez <agomez@igalia.com>
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Andres Gomez <agomez@igalia.com>
Reviewed-by: Eric Engestrom <eric.engestrom@imgtec.com> (v1)
4 years agodocs/releasing: polish LLVM_CONFIG wording/handling
Emil Velikov [Mon, 4 Sep 2017 16:19:43 +0000 (17:19 +0100)]
docs/releasing: polish LLVM_CONFIG wording/handling

Use consistent way to manage "non-default" llvm installations, clearly
documenting it.

AKA, use LLVM_CONFIG throughout and unset for the Windows/mingw builds.

v2: unset the save_ variable (Andres)

Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Andres Gomez <agomez@igalia.com>
Reviewed-by: Eric Engestrom <eric.engestrom@imgtec.com> (v1)
4 years agodocs/releasing: remove -jX instances
Emil Velikov [Mon, 4 Sep 2017 16:08:15 +0000 (17:08 +0100)]
docs/releasing: remove -jX instances

One can control the number of jobs via MAKEFLAGS. As such there's
little reason to set the number of jobs for each make invocation.

Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Andres Gomez <agomez@igalia.com>
Reviewed-by: Eric Engestrom <eric.engestrom@imgtec.com>
4 years ago.gitignore: list *.orig and *.rej
Emil Velikov [Wed, 30 Aug 2017 15:29:59 +0000 (16:29 +0100)]
.gitignore: list *.orig and *.rej

Should prevent accidental check-in of patch artefacts.

Suggested-by: Mike Lothian <mike@fireburn.co.uk>
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Eric Engestrom <eric@engestrom.ch>
4 years agoegl/x11: advertise __DRI_USE_INVALIDATE for DRI2
Emil Velikov [Thu, 3 Aug 2017 18:29:28 +0000 (19:29 +0100)]
egl/x11: advertise __DRI_USE_INVALIDATE for DRI2

Back in 2012 (commit 1e7776ca2bc - egl: Remove bogus invalidate code.)
the loader use of invalidate() was purged as "bogus". One of the factors
defining that statement was the lack of the loader-side invalidate
extension - __DRI_USE_INVALIDATE.

Since then the commit was reverted (commit eed0a80137d - egl: Restore
"bogus" DRI2 invalidate event code.), always performing the driver
invalidate call, although the loader was never updated to expose the
extension.

Do so allowing the driver to do fine grained tuning.

Cc: Eric Anholt <eric@anholt.net>
Cc: Kenneth Graunke <kenneth@whitecape.org>
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Eric Anholt <eric@anholt.net
4 years agoegl/x11/dri3: adding missing __DRI_BACKGROUND_CALLABLE extension
Emil Velikov [Thu, 3 Aug 2017 18:29:27 +0000 (19:29 +0100)]
egl/x11/dri3: adding missing __DRI_BACKGROUND_CALLABLE extension

Fixes: 3b7b6adf3ac ("egl: Implement __DRI_BACKGROUND_CALLABLE")
Cc: Timothy Arceri <tarceri@itsqueeze.com>
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
4 years agoi965: expose RGBA visuals only on Android
Emil Velikov [Mon, 31 Jul 2017 18:46:23 +0000 (19:46 +0100)]
i965: expose RGBA visuals only on Android

As Marek pointed out in earlier commit - exposing RGBA on other
platforms introduces ~500 Visuals, which are not tested.

Note that this does not quite happen, yet. Reason being that the GLX
code does not check the masks - see scaralEqual().

Thus as we fix that, we'll run into the issue described.

v2: Rebase, while keeping loaderPrivate
v3: Beef-up commit message, getCapability() returns unsigned (Tapani)

Fixes: 1bf703e4ea5 ("dri_interface,egl,gallium: only expose RGBA visuals
on Android")
Cc: Tomasz Figa <tfiga@chromium.org>
Cc: Chad Versace <chadversary@chromium.org>
Cc: Marek Olšák <maraeo@gmail.com>
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
4 years agoswr/rast: FE/Clipper - unify SIMD8/16 functions using simdlib types
Tim Rowley [Tue, 15 Aug 2017 23:51:45 +0000 (18:51 -0500)]
swr/rast: FE/Clipper - unify SIMD8/16 functions using simdlib types

Reviewed-by: Bruce Cherniak <bruce.cherniak@intel.com>
4 years agoswr/rast: Remove use of C++14 template variable
Tim Rowley [Thu, 10 Aug 2017 21:11:35 +0000 (16:11 -0500)]
swr/rast: Remove use of C++14 template variable

SWR rasterizer must remain C++11 compliant.

Reviewed-by: Bruce Cherniak <bruce.cherniak@intel.com>
4 years agoswr/rast: SIMD16 FE remove templated immediates workaround
Tim Rowley [Wed, 9 Aug 2017 23:48:58 +0000 (18:48 -0500)]
swr/rast: SIMD16 FE remove templated immediates workaround

Fixed properly in gcc-compatible fashion.

Reviewed-by: Bruce Cherniak <bruce.cherniak@intel.com>
4 years agoswr/rast: SIMD16 PA - rename Assemble_simd16 to Assemble
Tim Rowley [Mon, 7 Aug 2017 23:13:54 +0000 (18:13 -0500)]
swr/rast: SIMD16 PA - rename Assemble_simd16 to Assemble

For consistency and to support overloading.

Reviewed-by: Bruce Cherniak <bruce.cherniak@intel.com>
4 years agoswr/rast: FE/Binner - unify SIMD8/16 functions using simdlib types
Tim Rowley [Fri, 4 Aug 2017 23:07:01 +0000 (18:07 -0500)]
swr/rast: FE/Binner - unify SIMD8/16 functions using simdlib types

Reviewed-by: Bruce Cherniak <bruce.cherniak@intel.com>
4 years agoswr/rast: Removed some trailing whitespace caught during review
Tim Rowley [Tue, 1 Aug 2017 20:21:04 +0000 (15:21 -0500)]
swr/rast: Removed some trailing whitespace caught during review

Reviewed-by: Bruce Cherniak <bruce.cherniak@intel.com>
4 years agoswr: set caps for VB 4-byte alignment
Tim Rowley [Fri, 18 Aug 2017 16:51:59 +0000 (11:51 -0500)]
swr: set caps for VB 4-byte alignment

Needed to compensate for change to fetch jit requiring
alignment.

Fixes regressions in piglit: vertex-buffer-offsets and about
another hundred of the vs-input*byte* tests.

Reviewed-by: Bruce Cherniak <bruce.cherniak@intel.com>
4 years agoswr/rast: Allow gather of floats from fetch shader with 2-4GB offsets
Tim Rowley [Wed, 9 Aug 2017 22:32:28 +0000 (17:32 -0500)]
swr/rast: Allow gather of floats from fetch shader with 2-4GB offsets

Reviewed-by: Bruce Cherniak <bruce.cherniak@intel.com>
4 years agoradv: fix error code when resizing the upload BO
Samuel Pitoiset [Wed, 6 Sep 2017 13:24:49 +0000 (15:24 +0200)]
radv: fix error code when resizing the upload BO

malloc() failures are unrelated to the device memory.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
4 years agomesa/st/st_glsl_to_tgsi_temprename.cpp: Fix compilation with MSVC
Gert Wollny [Wed, 6 Sep 2017 12:21:25 +0000 (14:21 +0200)]
mesa/st/st_glsl_to_tgsi_temprename.cpp: Fix compilation with MSVC

If <windows.h> is included then max is a macro that clashes
with std::numeric_limits::max, hence undefine it.
For some reason the struct access_record is not recognizes
outside the anonymouse namespace, make it a class.
The patch successfully was tested on AppVeyor.

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
4 years agomesa/st: glsl_to_tgsi: tie in new temporary register merge approach
Gert Wollny [Fri, 30 Jun 2017 06:55:17 +0000 (08:55 +0200)]
mesa/st: glsl_to_tgsi: tie in new temporary register merge approach

This patch replaces the old register lifetime estiamtion and
rename mapping evaluation with the new one.

Performance to compare between the current and the new implementation
were measured by running the shader-db in one thread.

-----------------------------------------------------------
                    old          new(std::sort)

---------------- time ./run -j1 shaders --------------------

  real              5.80s          5.75s
  user              5.75s          5.70s
  sys               0.05s          0.05s

---- valgrind --tool=callgrind --dump-instr=yes------------

 merge               0.08%         0.18%
 estimate lifetime   0.02%         0.11%
 evaluate mapping  (incl=0.3%)     0.04%
 apply mapping       0.03%         0.02%

---   perf (approximate because of statistic sampling) ----

merge (total)        0.09%         0.16%
estimate lifetime    0.03%         0.10%
evaluate mapping  (incl=0.02%)     0.04%
apply mapping        0.04%         0.04%

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
4 years agomesa/st: glsl_to_tgsi: Add test set for evaluation of rename mapping
Gert Wollny [Fri, 30 Jun 2017 06:49:41 +0000 (08:49 +0200)]
mesa/st: glsl_to_tgsi: Add test set for evaluation of rename mapping

The patch adds tests for the register rename mapping evaluation and
combined life time estimation and renaming.

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
4 years agomesa/st: glsl_to_tgsi: add register rename mapping evaluator
Gert Wollny [Fri, 30 Jun 2017 06:45:48 +0000 (08:45 +0200)]
mesa/st: glsl_to_tgsi: add register rename mapping evaluator

The remapping evaluator first sorts the temporary registers ascending
based on their first life time instruction, and then uses a binary search
to find merge canidates.
For the initial sorting it uses std::sort because qsort is quite slow in
comparison. By removing the define USE_STL_SORT in
  src/mesa/state_tracker/st_glsl_to_tgsi_temprename.cpp
one can enable the alternative code path that uses qsort.

Registers that are not written to are not considered for renaming since in
glsl_to_tgsi_visitor::renumber_registers they are eliminated anyway.

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
4 years agomesa/st: glsl_to_tgsi: add tests for the new temporary lifetime tracker
Gert Wollny [Fri, 30 Jun 2017 06:37:36 +0000 (08:37 +0200)]
mesa/st: glsl_to_tgsi: add tests for the new temporary lifetime tracker

This patch adds a set of unit tests for the new lifetime tracker.

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
4 years agomesa/st: glsl_to_tgsi: implement new temporary register lifetime tracker
Gert Wollny [Fri, 30 Jun 2017 06:35:06 +0000 (08:35 +0200)]
mesa/st: glsl_to_tgsi: implement new temporary register lifetime tracker

This patch adds a class for tracking the life times of temporary registers
in the glsl to tgsi translation. The algorithm runs in three steps:
First, in order to minimize the number of needed memory allocations the
program is scanned to evaluate the number of scopes.
Then, the program is scanned  second time to record the important register
access time points: first and last reads and writes and their link to the
execution scope (loop, if/else branch, switch case).
In the third step for each register the actual minimal life time is
evaluated.

In addition, when compiled in debug mode (i.e. NDEBUG is not defined)
the shaders and estimated temporary life times can be logged to stderr
by setting the environment variable GLSL_TO_TGSI_RENAME_DEBUG.

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
4 years agomesa/st: glsl_to_tgsi move some helper classes to extra files
Gert Wollny [Wed, 21 Jun 2017 08:05:23 +0000 (10:05 +0200)]
mesa/st: glsl_to_tgsi move some helper classes to extra files

To prepare the implementation of a temp register lifetime tracker
some of the classes are moved into seperate header/implementation
files to make them accessible from other files.

Specifically these are:

    class st_src_reg;
    class st_dst_reg;
    class glsl_to_tgsi_instruction;
    struct rename_reg_pair;

    int swizzle_for_type(const glsl_type *type, int component);

  as inline:

    bool is_resource_instruction(unsigned opcode);
    unsigned num_inst_dst_regs(const glsl_to_tgsi_instruction *op);
    unsigned num_inst_src_regs(const glsl_to_tgsi_instruction *op);

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
4 years agost_glsl_to_tgsi: rewrite rename registers to use array fully.
Dave Airlie [Tue, 30 May 2017 05:52:13 +0000 (15:52 +1000)]
st_glsl_to_tgsi: rewrite rename registers to use array fully.

Instead of having to search the whole array, just use the whole
thing and store a valid bit in there with the rename.

Removes this from the profile on some of the fp64 tests

Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
4 years agoradeonsi/gfx9: proper workaround for LS/HS VGPR initialization bug
Nicolai Hähnle [Tue, 29 Aug 2017 21:11:38 +0000 (23:11 +0200)]
radeonsi/gfx9: proper workaround for LS/HS VGPR initialization bug

When the HS wave is empty, the hardware writes the LS VGPRs starting at
v0 instead of v2. Workaround by shifting them back into place when
necessary. For simplicity, this is always done in the LS prolog.

According to the hardware team, this will be fixed in future chips,
so take that into account already.

Note that this is not a bug fix, as the bug was already worked
around by commit 166823bfd26 ("radeonsi/gfx9: add a temporary workaround
for a tessellation driver bug"). This change merely replaces the
workaround by one that should be better.

v2: add workaround code to shader only when necessary
v3: clarify the prefer_mono comment

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
4 years agoac/debug: take ASIC generation into account when printing registers
Nicolai Hähnle [Mon, 4 Sep 2017 09:05:13 +0000 (11:05 +0200)]
ac/debug: take ASIC generation into account when printing registers

There were some overlapping changes in gfx9 especially in the CB/DB
blocks which made register dumps rather misleading.

The split is along the lines of the header files, so we'll print VI-only
fields on SI and CI, for example, but we won't print GFX9 fields on
SI/CI/VI, and we won't print SI/CI/VI fields on GFX9.

Acked-by: Marek Olšák <marek.olsak@amd.com>
4 years agoamd/common: pass chip_class to ac_dump_reg
Nicolai Hähnle [Mon, 4 Sep 2017 08:35:06 +0000 (10:35 +0200)]
amd/common: pass chip_class to ac_dump_reg

Acked-by: Marek Olšák <marek.olsak@amd.com>
4 years agoac/sid_tables: add FieldTable object
Nicolai Hähnle [Mon, 4 Sep 2017 08:02:36 +0000 (10:02 +0200)]
ac/sid_tables: add FieldTable object

Automatically re-use table entries like StringTable and IntTable do.
This allows us to get rid of the "fields_owner" logic, and simplifies
the next change.

Acked-by: Marek Olšák <marek.olsak@amd.com>
4 years agoac/sid_tables: remove unused variable varname_values
Nicolai Hähnle [Mon, 4 Sep 2017 07:24:04 +0000 (09:24 +0200)]
ac/sid_tables: remove unused variable varname_values

Acked-by: Marek Olšák <marek.olsak@amd.com>
4 years agoradeonsi/gfx9: always flush DB metadata on framebuffer changes
Nicolai Hähnle [Mon, 4 Sep 2017 09:09:46 +0000 (11:09 +0200)]
radeonsi/gfx9: always flush DB metadata on framebuffer changes

This fixes GL45-CTS.shader_image_load_store.basic-glsl-earlyFragTests.

Cc: mesa-stable@lists.freedesktop.org
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
4 years agoutil/ralloc: set prev-pointers correctly in ralloc_adopt
Nicolai Hähnle [Sat, 26 Aug 2017 01:06:09 +0000 (03:06 +0200)]
util/ralloc: set prev-pointers correctly in ralloc_adopt

Found by inspection.

I'm not aware of any actual failures caused by this, but a precise
sequence of ralloc_adopt and ralloc_free should be able to cause
problems.

v2: make the code slightly clearer (Eric)

Reviewed-by: Eric Engestrom <eric.engestrom@imgtec.com>
4 years agomesa/main: Fix GetTextureImage error reporting
Iago Toral Quiroga [Tue, 5 Sep 2017 11:06:37 +0000 (13:06 +0200)]
mesa/main: Fix GetTextureImage error reporting

GetTex*Image should return INVALID_ENUM if target is not valid, however,
GetTextureImage does not receive a target, and instead should return
INVALID_OPERATION if the effective target is not valid. From the
OpenGL 4.6 core profile spec, section 8.11 Texture Queries:

"An INVALID_OPERATION error is generated by GetTextureImage if the effective
 target is not one of TEXTURE_1D, TEXTURE_2D, TEXTURE_3D, TEXTURE_1D_ARRAY,
 TEXTURE_2D_ARRAY, TEXTURE_CUBE_MAP_ARRAY, TEXTURE_RECTANGLE, or
 TEXTURE_CUBE_MAP (for GetTextureImage only)."

Fixes:
KHR-GL45.direct_state_access.textures_image_query_errors

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
4 years agoegl: remove unused 'Screens' array from _egl_display
Tapani Pälli [Tue, 5 Sep 2017 11:48:56 +0000 (14:48 +0300)]
egl: remove unused 'Screens' array from _egl_display

This was used by EGL_MESA_screen_surface that has been removed
in commit 7a58262e58d8edac3308777def0950032628edee.

Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Eric Engestrom <eric.engestrom@imgtec.com>
Reviewed-by: Emil Velikov <eml.velikov@collabora.com>
4 years agoRevert "radv: disable support for VEGA for now."
Dave Airlie [Mon, 21 Aug 2017 03:25:59 +0000 (04:25 +0100)]
Revert "radv: disable support for VEGA for now."

This reverts commit 611076a41aac3095a82dff2432943d7f8d429822.

With the two previous commits, vega shouldn't be unstable,
doesn't pass CTS, but can do a complete run, and games shouldn't
hang anymore, so bring it back online.

Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Cc: "17.2" <mesa-stable@lists.freedesktop.org>
Signed-off-by: Dave Airlie <airlied@redhat.com>
4 years agoradv/gfx9: set descriptor up for base_mip to level range.
Dave Airlie [Mon, 21 Aug 2017 20:08:10 +0000 (21:08 +0100)]
radv/gfx9: set descriptor up for base_mip to level range.

This is required on GFX9, fixes a bug in Talos where all the
mipmaps overlay each other.

Just pushing this as well as it fixes Talos.

Cc: "17.2" <mesa-stable@lists.freedesktop.org>
Signed-off-by: Dave Airlie <airlied@redhat.com>
4 years agoradv: disable 1d/2d linear optimisation on gfx9.
Dave Airlie [Tue, 22 Aug 2017 02:47:09 +0000 (12:47 +1000)]
radv: disable 1d/2d linear optimisation on gfx9.

This causes hangs in some of the CTS tests with a 2d
1536x2 texture.

This fixes hangs with:
dEQP-VK.pipeline.image.suballocation.sampling_type.combined.iew_type.1d_aray.format.r4g4b4a4_unorm_pack16.count_1.size.512x1_array_of_3
if we reenable it, make sure these don't regress.

Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Cc: "17.2" <mesa-stable@lists.freedesktop.org>
Signed-off-by: Dave Airlie <airlied@redhat.com>
4 years agoradv/gfx9: fix buffer size on gfx9.
Dave Airlie [Fri, 25 Aug 2017 00:15:32 +0000 (01:15 +0100)]
radv/gfx9: fix buffer size on gfx9.

The VI sizing only applies to VI.

This fixes:
dEQP-VK.image.image_size.buffer.*

Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Signed-off-by: Dave Airlie <airlied@redhat.com>
4 years agoradv: Fix vkCopyImage with both depth and stencil aspects.
Bas Nieuwenhuizen [Tue, 5 Sep 2017 22:28:22 +0000 (00:28 +0200)]
radv: Fix vkCopyImage with both depth and stencil aspects.

Fixes: f4e499ec791 "radv: add initial non-conformant radv vulkan driver"
Reviewed-by: Dave Airlie <airlied@redhat.com>
4 years agomesa/mtypes: repack gl_sampler_object.
Dave Airlie [Sun, 3 Sep 2017 11:20:35 +0000 (21:20 +1000)]
mesa/mtypes: repack gl_sampler_object.

160->152.

Reviewed-by: Thomas Helland <thomashelland90@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
4 years agomesa/mtypes: repack gl_texture_object.
Dave Airlie [Sun, 3 Sep 2017 11:17:47 +0000 (21:17 +1000)]
mesa/mtypes: repack gl_texture_object.

reduces size from 1144 to 1128.

Reviewed-by: Thomas Helland <thomashelland90@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
4 years agomesa/mtypes: repack gl_shader_program_data.
Dave Airlie [Sun, 3 Sep 2017 11:12:17 +0000 (21:12 +1000)]
mesa/mtypes: repack gl_shader_program_data.

This reduces the size from 144 bytes to 128 bytes.

Reviewed-by: Thomas Helland <thomashelland90@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
4 years agomesa/mtypes: reorganise gl_shader
Dave Airlie [Sun, 3 Sep 2017 11:08:34 +0000 (21:08 +1000)]
mesa/mtypes: reorganise gl_shader

This reduces this from 200->182 bytes.

Reviewed-by: Thomas Helland <thomashelland90@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
4 years agomesa/mtypes: repack display list structs.
Dave Airlie [Sun, 3 Sep 2017 10:37:01 +0000 (20:37 +1000)]
mesa/mtypes: repack display list structs.

This reduces each of these by 8 bytes.

Reviewed-by: Thomas Helland <thomashelland90@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
4 years agomesa/mtypes: reduce size of gl_sync_object.
Dave Airlie [Sun, 3 Sep 2017 10:35:19 +0000 (20:35 +1000)]
mesa/mtypes: reduce size of gl_sync_object.

Drops from 40->32 bytes.

Reviewed-by: Thomas Helland <thomashelland90@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
4 years agomesa/mtypes: reorg vertex/fragment program state.
Dave Airlie [Sun, 3 Sep 2017 10:08:18 +0000 (20:08 +1000)]
mesa/mtypes: reorg vertex/fragment program state.

reduces both of these by 8 bytes.

Reviewed-by: Thomas Helland <thomashelland90@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
4 years agomesa/bindless: reorder gl_bindless_image gl_bindless_sampler.
Dave Airlie [Sun, 3 Sep 2017 09:53:07 +0000 (19:53 +1000)]
mesa/bindless: reorder gl_bindless_image gl_bindless_sampler.

This makes these use 16-bytes instead of 24-bytes.

Reviewed-by: Thomas Helland <thomashelland90@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
4 years agoradv: fix a memleak when compiling the GS copy shader
Samuel Pitoiset [Fri, 1 Sep 2017 12:07:43 +0000 (14:07 +0200)]
radv: fix a memleak when compiling the GS copy shader

Found by inspection.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Eric Engestrom <eric.engestrom@imgtec.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
4 years agosvga: move index buffer bind flag assertion
Charmaine Lee [Fri, 1 Sep 2017 19:34:01 +0000 (12:34 -0700)]
svga: move index buffer bind flag assertion

The buffer bind flags can be promoted in svga_buffer_handle(), so
move the assertion after it. This has already been done for
vertex buffer in commit 6b4bf7e8be, but it misses the one for
index buffer.

Fixes assertion running WarThunder.

Reviewed-by: Neha Bhende <bhenden@vmware.com>
4 years agosvga: avoid emitting redundant SetShaderResources and SetVertexBuffers
Charmaine Lee [Tue, 1 Aug 2017 22:58:50 +0000 (15:58 -0700)]
svga: avoid emitting redundant SetShaderResources and SetVertexBuffers

Minor performance improvement in avoiding binding the same shader resource
or the same vertex buffer for the same slot.

Tested with MTT glretrace.

v2: Per Brian's suggestion, add a helper function to do vertex buffer
    comparision.
v3: Change the helper function to vertex_buffers_equal().

Reviewed-by: Brian Paul <brianp@vmware.com>
4 years agospirv: Add support for the HelperInvocation builtin
Jason Ekstrand [Tue, 22 Aug 2017 05:11:49 +0000 (22:11 -0700)]
spirv: Add support for the HelperInvocation builtin

I have no idea how this got missed but it's been missing since forever.

Cc: mesa-stable@lists.freedesktop.org
Reviewed-by: Samuel Iglesias Gonsálvez <siglesias@igalia.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
4 years agoloader/dri3: Use client local back to front blit in copySubBuffer if available
Thomas Hellstrom [Mon, 4 Sep 2017 12:05:25 +0000 (14:05 +0200)]
loader/dri3: Use client local back to front blit in copySubBuffer if available

The copySubBuffer functionality always attempted a server side blit from
back to fake front if a fake front was present, and we weren't displaying
on a remote GPU.

Now that we always have local blit capability on modern drivers, first
attempt a local blit, and only if that fails, try the server blit.

Signed-off-by: Thomas Hellstrom <thellstrom@vmware.com>
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Reviewed-by: Axel Davy <axel.davy@normalesup.org>
4 years agoradeonsi/gfx9: implement primitive binning
Marek Olšák [Tue, 29 Aug 2017 01:58:22 +0000 (03:58 +0200)]
radeonsi/gfx9: implement primitive binning

This increases performance, but it was tuned for Raven, not Vega.
We don't know yet how Vega will perform, hopefully not worse.

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
4 years agoradeonsi: add more state flags into si_state_dsa
Marek Olšák [Tue, 29 Aug 2017 18:55:11 +0000 (20:55 +0200)]
radeonsi: add more state flags into si_state_dsa

3 flags for primitive binning, 2 flags for out-of-order rasterization
(but that will be done some other time)

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
4 years agoradeonsi/gfx9: don't use BREAK_BATCH and FLUSH_DFSM if DFSM is disabled
Marek Olšák [Mon, 28 Aug 2017 21:44:16 +0000 (23:44 +0200)]
radeonsi/gfx9: don't use BREAK_BATCH and FLUSH_DFSM if DFSM is disabled

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
4 years agovbo: fix build errors on android
Tapani Pälli [Mon, 4 Sep 2017 05:02:13 +0000 (08:02 +0300)]
vbo: fix build errors on android

incompatible pointer to integer conversion assigning to 'GLintptr' (aka 'int')
from 'const char *' [-Werror,-Wint-conversion]

      offset = indices;
             ^ ~~~~~~~

Fixes: 2d93b462b4d ("vbo: fix offset in minmax cache key")
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Charmaine Lee <charmainel@vmware.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
4 years agodocs: add news item and link release notes for 17.2.0
Emil Velikov [Mon, 4 Sep 2017 17:26:34 +0000 (18:26 +0100)]
docs: add news item and link release notes for 17.2.0

Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
4 years agodocs: add sha256 checksums for 17.2.0
Emil Velikov [Mon, 4 Sep 2017 17:24:29 +0000 (18:24 +0100)]
docs: add sha256 checksums for 17.2.0

Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
(cherry picked from commit b4473dd5191878249ccb53f40407206f1e57fa6f)

4 years agodocs: Update 17.2.0 release notes
Emil Velikov [Mon, 4 Sep 2017 17:16:16 +0000 (18:16 +0100)]
docs: Update 17.2.0 release notes

Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
(cherry picked from commit f5925b2897308530c64e1abf44ebc1ee0e017ada)

4 years agoradeonsi: eliminate PS color outputs when colormask kills them
Marek Olšák [Tue, 29 Aug 2017 01:41:18 +0000 (03:41 +0200)]
radeonsi: eliminate PS color outputs when colormask kills them

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
4 years agogallium/radeon: sort DBG shader flags according to pipe_shader_type
Marek Olšák [Tue, 29 Aug 2017 11:14:34 +0000 (13:14 +0200)]
gallium/radeon: sort DBG shader flags according to pipe_shader_type

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
4 years agoradeonsi: ensure cache flushes happen before SET_PREDICATION packets
Nicolai Hähnle [Fri, 25 Aug 2017 07:04:40 +0000 (09:04 +0200)]
radeonsi: ensure cache flushes happen before SET_PREDICATION packets

The data is read when the render_cond_atom is emitted, so we must
delay emitting the atom until after the flush.

Fixes: 0fe0320dc074 ("radeonsi: use optimal packet order when doing a pipeline sync")
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
4 years agoradeonsi: fix ARB_transform_feedback_overflow_query on <= VI
Nicolai Hähnle [Fri, 25 Aug 2017 14:19:56 +0000 (16:19 +0200)]
radeonsi: fix ARB_transform_feedback_overflow_query on <= VI

The result written by the shader workaround needs to be written back, or
the CP may read stale data.

Fixes: 78476cfe071a ("radeonsi: enable ARB_transform_feedback_overflow_query")
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
4 years agoradeonsi: fix compute shader state dumping
Nicolai Hähnle [Fri, 25 Aug 2017 14:08:50 +0000 (16:08 +0200)]
radeonsi: fix compute shader state dumping

Fixes: 420c438589c8 ("radeonsi: log draw and compute state into log context")
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
4 years agoradeonsi: add an assertion that only two-dimensional constant references are used
Nicolai Hähnle [Wed, 23 Aug 2017 16:14:32 +0000 (18:14 +0200)]
radeonsi: add an assertion that only two-dimensional constant references are used

v2: remove some redundant checks

Acked-by: Roland Scheidegger <sroland@vmware.com> (v1)
Tested-by: Dieter Nützel <Dieter@nuetzel-hh.de> (v1)
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
4 years agogallium/radeon: always use two-dimensional constant references
Nicolai Hähnle [Wed, 23 Aug 2017 16:13:57 +0000 (18:13 +0200)]
gallium/radeon: always use two-dimensional constant references

Acked-by: Roland Scheidegger <sroland@vmware.com>
Tested-by: Dieter Nützel <Dieter@nuetzel-hh.de>
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
4 years agogallium/tests: always use two-dimensional constant references
Nicolai Hähnle [Wed, 23 Aug 2017 16:13:40 +0000 (18:13 +0200)]
gallium/tests: always use two-dimensional constant references

Acked-by: Roland Scheidegger <sroland@vmware.com>
Tested-by: Dieter Nützel <Dieter@nuetzel-hh.de>
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
4 years agopp: always use two-dimensional constant references
Nicolai Hähnle [Wed, 23 Aug 2017 16:13:30 +0000 (18:13 +0200)]
pp: always use two-dimensional constant references

Acked-by: Roland Scheidegger <sroland@vmware.com>
Tested-by: Dieter Nützel <Dieter@nuetzel-hh.de>
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
4 years agogallium/hud: always use two-dimensional constant references
Nicolai Hähnle [Wed, 23 Aug 2017 16:13:15 +0000 (18:13 +0200)]
gallium/hud: always use two-dimensional constant references

Acked-by: Roland Scheidegger <sroland@vmware.com>
Tested-by: Dieter Nützel <Dieter@nuetzel-hh.de>
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
4 years agonine: always generate two-dimensional constant file accesses
Nicolai Hähnle [Wed, 23 Aug 2017 16:04:05 +0000 (18:04 +0200)]
nine: always generate two-dimensional constant file accesses

Acked-by: Roland Scheidegger <sroland@vmware.com>
Tested-by: Dieter Nützel <Dieter@nuetzel-hh.de>
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
4 years agost/glsl_to_tgsi: inline src_register into translate_src
Nicolai Hähnle [Wed, 23 Aug 2017 16:07:58 +0000 (18:07 +0200)]
st/glsl_to_tgsi: inline src_register into translate_src

src_register has no meaningful standalone use, it only makes sense when
called from translate_src.

v2: fix input array handling

Acked-by: Roland Scheidegger <sroland@vmware.com> (v1)
Tested-by: Dieter Nützel <Dieter@nuetzel-hh.de>
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
4 years agost/glsl_to_tgsi: ir_load_ubo always has a second index
Nicolai Hähnle [Wed, 23 Aug 2017 15:09:09 +0000 (17:09 +0200)]
st/glsl_to_tgsi: ir_load_ubo always has a second index

Acked-by: Roland Scheidegger <sroland@vmware.com>
Tested-by: Dieter Nützel <Dieter@nuetzel-hh.de>
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
4 years agost/drawpixels: always use two-dimensional constant references
Nicolai Hähnle [Sat, 26 Aug 2017 22:42:11 +0000 (00:42 +0200)]
st/drawpixels: always use two-dimensional constant references

Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
4 years agotgsi/build: always generate two-dimensional constant file accesses
Nicolai Hähnle [Sat, 26 Aug 2017 22:42:53 +0000 (00:42 +0200)]
tgsi/build: always generate two-dimensional constant file accesses

Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
4 years agotgsi/ureg: always emit constants (and their decls) as 2D
Nicolai Hähnle [Wed, 23 Aug 2017 15:48:27 +0000 (17:48 +0200)]
tgsi/ureg: always emit constants (and their decls) as 2D

Acked-by: Roland Scheidegger <sroland@vmware.com>
Tested-by: Dieter Nützel <Dieter@nuetzel-hh.de>
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>