mesa.git
5 years agoscons: put the generated git_sha1.h file in top-level src/ directory
Brian Paul [Wed, 15 Jun 2016 16:42:34 +0000 (10:42 -0600)]
scons: put the generated git_sha1.h file in top-level src/ directory

To match what's done in the automake build.

v2: Use git rev-parse to get a 10-character hash ID
    Fix Python imports

Reviewed-by: Eric Engestrom <eric.engestrom@imgtec.com>
Reviewed-by: José Fonseca <jfonseca@vmware.com>
5 years agoswr: switch from overriding -march to selecting features
Tim Rowley [Thu, 16 Jun 2016 19:56:39 +0000 (14:56 -0500)]
swr: switch from overriding -march to selecting features

Acked-by: Chuck Atkins <chuck.atkins@kitware.com>
Tested-by: Chuck Atkins <chuck.atkins@kitware.com>
5 years agomesa: remove remaining tabs in api_validate.c
Timothy Arceri [Fri, 17 Jun 2016 05:12:38 +0000 (15:12 +1000)]
mesa: remove remaining tabs in api_validate.c

Reviewed-by: Samuel Iglesias Gonsálvez <siglesias@igalia.com>
5 years agoi965/fs: indirect addressing with doubles is not supported in CHV/BSW/BXT
Samuel Iglesias Gonsálvez [Mon, 13 Jun 2016 06:29:53 +0000 (08:29 +0200)]
i965/fs: indirect addressing with doubles is not supported in CHV/BSW/BXT

From the Cherryview's PRM, Volume 7, 3D Media GPGPU Engine, Register Region
Restrictions, page 844:

  "When source or destination datatype is 64b or operation is integer DWord
   multiply, indirect addressing must not be used."

v2:
- Fix it for Broxton too.

v3:
- Simplify code by using subscript() and not creating a new num_components
variable (Kenneth).

Signed-off-by: Samuel Iglesias Gonsálvez <siglesias@igalia.com>
Cc: "12.0" <mesa-stable@lists.freedesktop.org>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=95462
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
5 years agoi965/fs: Fix single-precision to double-precision conversions for CHV/BSW/BXT
Iago Toral Quiroga [Mon, 13 Jun 2016 07:13:23 +0000 (03:13 -0400)]
i965/fs: Fix single-precision to double-precision conversions for CHV/BSW/BXT

From the Cherryview PRM, Volume 7, 3D Media GPGPU Engine,
Register Region Restrictions:

   "When source or destination is 64b (...), regioning in Align1
    must follow these rules:

    1. Source and destination horizontal stride must be aligned to
       the same qword.
    (...)"

v2:
- Fix it for Broxton too.

v3:
- Remove inst->regs_written change as it is not necessary (Ken)

Cc: "12.0" <mesa-stable@lists.freedesktop.org>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=95462
Tested-by: Mark Janes <mark.a.janes@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
5 years agodocs: Mention GL_ARB_ES3_1_compatibility in release notes.
Kenneth Graunke [Fri, 17 Jun 2016 00:10:08 +0000 (17:10 -0700)]
docs: Mention GL_ARB_ES3_1_compatibility in release notes.

Ilia reminded me that I forgot this.

5 years agoi965: Fix comment about CS scratch space encodings on Broadwell+.
Kenneth Graunke [Tue, 14 Jun 2016 08:35:20 +0000 (01:35 -0700)]
i965: Fix comment about CS scratch space encodings on Broadwell+.

I typo'd this.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
5 years agodocs: Update ARB_ES3_1_compatibility status for i965.
Kenneth Graunke [Thu, 16 Jun 2016 21:39:44 +0000 (14:39 -0700)]
docs: Update ARB_ES3_1_compatibility status for i965.

5 years agoi965: Drop perf_debug about rasterizer discard in SOL vs. clipper.
Kenneth Graunke [Wed, 11 May 2016 00:54:45 +0000 (17:54 -0700)]
i965: Drop perf_debug about rasterizer discard in SOL vs. clipper.

I recently experimented with performing rasterizer discard in the SOL
unit instead of the clipper, and as far as I can tell, it's basically
the same performance.  The clipper comes directly after SOL anyway,
and setting the clipper to REJECT_ALL should be pretty darn cheap.

Keep the perf_debug on Sandybridge, where the GS actually does work.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
5 years agoi965: Enable GL_ARB_ES3_1_compatibility on Gen8+ if CS are available.
Kenneth Graunke [Fri, 13 May 2016 01:08:49 +0000 (18:08 -0700)]
i965: Enable GL_ARB_ES3_1_compatibility on Gen8+ if CS are available.

There are almost no tests in any test suite, but what little I've found
seems to work.  Ilia believes everything is in place.

v2: Predicate the enable on ES 3.1 being available (Gen8+) and also
    ARB_compute_shader being available (requested by Ilia).

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Dave Airlie <airlied@redhat.com>
5 years agomesa: If validation fails in a debug context just emit a debug message
Ian Romanick [Mon, 13 Jun 2016 16:59:10 +0000 (09:59 -0700)]
mesa: If validation fails in a debug context just emit a debug message

There are quite a few pipelines that desktop applications (including a
bunch of piglit test) can expect to have run but don't meet the GLES
requirements.  Instead of failing validation, just emit a debug message.

Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=96358
Cc: "12.0" <mesa-stable@lists.freedesktop.org>
Cc: Gregory Hainaut <gregory.hainaut@gmail.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Timothy Arceri <timothy.arceri@collabora.com>
5 years agoglsl: Always strip arrayness in precision_qualifier_allowed
Ian Romanick [Mon, 13 Jun 2016 22:22:34 +0000 (15:22 -0700)]
glsl: Always strip arrayness in precision_qualifier_allowed

Previously some callers of precision_qualifier_allowed would strip the
arrayness from the type and some would not.  As a result, some places
would not notice that float[6], for example, needed a precision
qualifier.

Fixes the new piglit test no-default-float-array-precision.frag.

Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=96358
Cc: "12.0" <mesa-stable@lists.freedesktop.org>
Cc: Gregory Hainaut <gregory.hainaut@gmail.com>
Cc: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Timothy Arceri <timothy.arceri@collabora.com>
5 years agomesa/main: Update _mesa_new_shader.
Jose Fonseca [Thu, 16 Jun 2016 14:22:37 +0000 (15:22 +0100)]
mesa/main: Update _mesa_new_shader.

Left over from 31dee99e052902bc08ddbb1009748dc982ac3211.  It should fix
Clang Windows build.

Trivial.

5 years agost/vdpau: we support lumakeying now
Christian König [Thu, 9 Jun 2016 12:44:39 +0000 (14:44 +0200)]
st/vdpau: we support lumakeying now

Signed-off-by: Christian König <christian.koenig@amd.com>
5 years agovl: support luma keying for interlaced surfaces as well
Christian König [Thu, 9 Jun 2016 12:43:10 +0000 (14:43 +0200)]
vl: support luma keying for interlaced surfaces as well

We had the CSC code twice in there, factor it out into a separate function.

Signed-off-by: Christian König <christian.koenig@amd.com>
5 years agoi965: remove remaining tabs in brw_link.cpp
Timothy Arceri [Thu, 16 Jun 2016 06:12:09 +0000 (16:12 +1000)]
i965: remove remaining tabs in brw_link.cpp

Acked-by: Kenneth Graunke <kenneth@whitecape.org>
5 years agovbo: Use a bitmask to track the active arrays in vbo_save*.
Mathias Fröhlich [Sun, 22 May 2016 12:10:19 +0000 (14:10 +0200)]
vbo: Use a bitmask to track the active arrays in vbo_save*.

The use of a bitmask makes functions iterating only active
attributes less visible in profiles.

v2: Use _mesa_bit_scan{,64} instead of open coding.
v3: Use u_bit_scan{,64} instead of _mesa_bit_scan{,64}.

Reviewed-by: Brian Paul <brianp@vmware.com>
Signed-off-by: Mathias Fröhlich <Mathias.Froehlich@web.de>
5 years agovbo: Use a bitmask to track the active arrays in vbo_exec*.
Mathias Fröhlich [Sun, 22 May 2016 12:10:19 +0000 (14:10 +0200)]
vbo: Use a bitmask to track the active arrays in vbo_exec*.

The use of a bitmask makes functions iterating only active
attributes less visible in profiles.

v2: Use _mesa_bit_scan{,64} instead of open coding.
v3: Use u_bit_scan{,64} instead of _mesa_bit_scan{,64}.

Reviewed-by: Brian Paul <brianp@vmware.com>
Signed-off-by: Mathias Fröhlich <Mathias.Froehlich@web.de>
5 years agomesa: Use bitmask/ffs to iterate the active_samplers bitmask.
Mathias Fröhlich [Sun, 22 May 2016 12:10:19 +0000 (14:10 +0200)]
mesa: Use bitmask/ffs to iterate the active_samplers bitmask.

Replaces an iterate and test bit in a bitmask loop by a
loop only iterating over the bits set in the bitmask.

v2: Use _mesa_bit_scan{,64} instead of open coding.
v3: Use u_bit_scan{,64} instead of _mesa_bit_scan{,64}.

Reviewed-by: Brian Paul <brianp@vmware.com>
Signed-off-by: Mathias Fröhlich <Mathias.Froehlich@web.de>
5 years agomesa: Use bitmask/ffs to iterate the enabled textures.
Mathias Fröhlich [Sun, 22 May 2016 12:10:19 +0000 (14:10 +0200)]
mesa: Use bitmask/ffs to iterate the enabled textures.

Replaces an iterate and test bit in a bitmask loop by a
loop only iterating over the bits set in the bitmask.

v2: Use _mesa_bit_scan{,64} instead of open coding.
v3: Use u_bit_scan{,64} instead of _mesa_bit_scan{,64}.

Reviewed-by: Brian Paul <brianp@vmware.com>
Signed-off-by: Mathias Fröhlich <Mathias.Froehlich@web.de>
5 years agomesa: Use designated bool value to check texture unit completeness.
Mathias Fröhlich [Sun, 22 May 2016 12:10:19 +0000 (14:10 +0200)]
mesa: Use designated bool value to check texture unit completeness.

The change helps to use the bitmask/ffs in the next change.

Reviewed-by: Brian Paul <brianp@vmware.com>
Signed-off-by: Mathias Fröhlich <Mathias.Froehlich@web.de>
5 years agomesa: Use bitmask/ffs to iterate SamplersUsed
Mathias Fröhlich [Sun, 22 May 2016 12:10:19 +0000 (14:10 +0200)]
mesa: Use bitmask/ffs to iterate SamplersUsed

Replaces an iterate and test bit in a bitmask loop by a
loop only iterating over the bits set in the bitmask.

v2: Use _mesa_bit_scan{,64} instead of open coding.
v3: Use u_bit_scan{,64} instead of _mesa_bit_scan{,64}.

Reviewed-by: Brian Paul <brianp@vmware.com>
Signed-off-by: Mathias Fröhlich <Mathias.Froehlich@web.de>
5 years agoi965: Use bitmask/ffs to iterate used vertex attributes.
Mathias Fröhlich [Sun, 22 May 2016 12:10:19 +0000 (14:10 +0200)]
i965: Use bitmask/ffs to iterate used vertex attributes.

Replaces an iterate and test bit in a bitmask loop by a
loop only iterating over the bits set in the bitmask.

v2: Use _mesa_bit_scan{,64} instead of open coding.
v3: Use u_bit_scan{,64} instead of _mesa_bit_scan{,64}.

Reviewed-by: Brian Paul <brianp@vmware.com>
Signed-off-by: Mathias Fröhlich <Mathias.Froehlich@web.de>
5 years agoi965: Use bitmask/ffs to iterate enabled clip planes.
Mathias Fröhlich [Sun, 22 May 2016 12:10:19 +0000 (14:10 +0200)]
i965: Use bitmask/ffs to iterate enabled clip planes.

Replaces an iterate and test bit in a bitmask loop by a
loop only iterating over the bits set in the bitmask.

v2: Use _mesa_bit_scan{,64} instead of open coding.
v3: Use u_bit_scan{,64} instead of _mesa_bit_scan{,64}.

Reviewed-by: Brian Paul <brianp@vmware.com>
Signed-off-by: Mathias Fröhlich <Mathias.Froehlich@web.de>
5 years agoradeon/r200: Use bitmask/ffs to iterate enabled clip planes.
Mathias Fröhlich [Sun, 22 May 2016 12:10:19 +0000 (14:10 +0200)]
radeon/r200: Use bitmask/ffs to iterate enabled clip planes.

Replaces an iterate and test bit in a bitmask loop by a
loop only iterating over the bits set in the bitmask.

v2: Use _mesa_bit_scan{,64} instead of open coding.
v3: Use u_bit_scan{,64} instead of _mesa_bit_scan{,64}.

Reviewed-by: Brian Paul <brianp@vmware.com>
Signed-off-by: Mathias Fröhlich <Mathias.Froehlich@web.de>
5 years agomesa: Use bitmask/ffs to iterate enabled clip planes.
Mathias Fröhlich [Sun, 22 May 2016 12:10:19 +0000 (14:10 +0200)]
mesa: Use bitmask/ffs to iterate enabled clip planes.

Replaces an iterate and test bit in a bitmask loop by a
loop only iterating over the bits set in the bitmask.

v2: Use _mesa_bit_scan{,64} instead of open coding.
v3: Use u_bit_scan{,64} instead of _mesa_bit_scan{,64}.

Reviewed-by: Brian Paul <brianp@vmware.com>
Signed-off-by: Mathias Fröhlich <Mathias.Froehlich@web.de>
5 years agomesa: Use bitmask/ffs to iterate color material attributes.
Mathias Fröhlich [Sun, 22 May 2016 12:10:19 +0000 (14:10 +0200)]
mesa: Use bitmask/ffs to iterate color material attributes.

Replaces an iterate and test bit in a bitmask loop by a
loop only iterating over the bits set in the bitmask.

v2: Use _mesa_bit_scan{,64} instead of open coding.
v3: Use u_bit_scan{,64} instead of _mesa_bit_scan{,64}.

Reviewed-by: Brian Paul <brianp@vmware.com>
Signed-off-by: Mathias Fröhlich <Mathias.Froehlich@web.de>
5 years agomesa: Use bitmask/ffs to build ff fragment shader keys.
Mathias Fröhlich [Sun, 22 May 2016 12:10:19 +0000 (14:10 +0200)]
mesa: Use bitmask/ffs to build ff fragment shader keys.

Replaces an iterate and test bit in a bitmask loop by a
loop only iterating over the bits set in the bitmask.
The bitmask used here for iteration is a combination
of different enabled masks present for texture units.

v2: Use _mesa_bit_scan{,64} instead of open coding.
v3: Use u_bit_scan{,64} instead of _mesa_bit_scan{,64}.

Reviewed-by: Brian Paul <brianp@vmware.com>
Signed-off-by: Mathias Fröhlich <Mathias.Froehlich@web.de>
5 years agomesa: Use bitmask/ffs to build ff vertex shader keys.
Mathias Fröhlich [Sun, 22 May 2016 12:10:19 +0000 (14:10 +0200)]
mesa: Use bitmask/ffs to build ff vertex shader keys.

Replaces an iterate and test bit in a bitmask loop by a
loop only iterating over the bits set in the bitmask.
The bitmask used here for iteration is a combination
of different enabled masks present for texture units.

v2: Use _mesa_bit_scan{,64} instead of open coding.
v3: Use u_bit_scan{,64} instead of _mesa_bit_scan{,64}.

Reviewed-by: Brian Paul <brianp@vmware.com>
Signed-off-by: Mathias Fröhlich <Mathias.Froehlich@web.de>
5 years agomesa: Remove the linked list of enabled lights
Mathias Fröhlich [Sun, 22 May 2016 12:10:19 +0000 (14:10 +0200)]
mesa: Remove the linked list of enabled lights

Clean up after conversion to bitmasks.

Reviewed-by: Brian Paul <brianp@vmware.com>
Signed-off-by: Mathias Fröhlich <Mathias.Froehlich@web.de>
5 years agomesa: Switch to bitmask based enabled lights in gen_matypes.c
Mathias Fröhlich [Sun, 22 May 2016 12:10:19 +0000 (14:10 +0200)]
mesa: Switch to bitmask based enabled lights in gen_matypes.c

Reviewed-by: Brian Paul <brianp@vmware.com>
Signed-off-by: Mathias Fröhlich <Mathias.Froehlich@web.de>
5 years agoradeon/r200: Use bitmask/ffs to iterate enabled lights
Mathias Fröhlich [Sun, 22 May 2016 12:10:19 +0000 (14:10 +0200)]
radeon/r200: Use bitmask/ffs to iterate enabled lights

Replaces a loop that iterates all lights and test
which of them is enabled by a loop only iterating over
the bits set in the enabled bitmask.

v2: Use _mesa_bit_scan{,64} instead of open coding.
v3: Use u_bit_scan{,64} instead of _mesa_bit_scan{,64}.

Reviewed-by: Brian Paul <brianp@vmware.com>
Signed-off-by: Mathias Fröhlich <Mathias.Froehlich@web.de>
5 years agonouveau: Use bitmask/ffs to iterate enabled lights
Mathias Fröhlich [Sun, 22 May 2016 12:10:19 +0000 (14:10 +0200)]
nouveau: Use bitmask/ffs to iterate enabled lights

Replaces a loop that iterates all lights and test
which of them is enabled by a loop only iterating over
the bits set in the enabled bitmask.

v2: Use _mesa_bit_scan{,64} instead of open coding.
v3: Use u_bit_scan{,64} instead of _mesa_bit_scan{,64}.

Reviewed-by: Brian Paul <brianp@vmware.com>
Signed-off-by: Mathias Fröhlich <Mathias.Froehlich@web.de>
5 years agotnl: Use bitmask/ffs to iterate enabled lights
Mathias Fröhlich [Sun, 22 May 2016 12:10:19 +0000 (14:10 +0200)]
tnl: Use bitmask/ffs to iterate enabled lights

Replaces loops that iterate all lights and test
which of them is enabled by a loop only iterating over
the bits set in the enabled bitmask.

v2: Use _mesa_bit_scan{,64} instead of open coding.
v3: Use u_bit_scan{,64} instead of _mesa_bit_scan{,64}.

Reviewed-by: Brian Paul <brianp@vmware.com>
Signed-off-by: Mathias Fröhlich <Mathias.Froehlich@web.de>
5 years agomesa: Use bitmask/ffs to iterate enabled lights for ff shader keys.
Mathias Fröhlich [Sun, 22 May 2016 12:10:19 +0000 (14:10 +0200)]
mesa: Use bitmask/ffs to iterate enabled lights for ff shader keys.

Replaces a loop that iterates all lights and test
which of them is enabled by a loop only iterating over
the bits set in the enabled bitmask.

v2: Use _mesa_bit_scan{,64} instead of open coding.
v3: Use u_bit_scan{,64} instead of _mesa_bit_scan{,64}.

Reviewed-by: Brian Paul <brianp@vmware.com>
Signed-off-by: Mathias Fröhlich <Mathias.Froehlich@web.de>
5 years agomesa: Use bitmask/ffs to iterate enabled lights
Mathias Fröhlich [Sun, 22 May 2016 12:10:19 +0000 (14:10 +0200)]
mesa: Use bitmask/ffs to iterate enabled lights

Replaces loops that iterate all lights and test
which of them is enabled by a loop only iterating over
the bits set in the enabled bitmask.

v2: Use _mesa_bit_scan{,64} instead of open coding.
v3: Use u_bit_scan{,64} instead of _mesa_bit_scan{,64}.

Reviewed-by: Brian Paul <brianp@vmware.com>
Signed-off-by: Mathias Fröhlich <Mathias.Froehlich@web.de>
5 years agomesa: Track enabled lights in a bitmask
Mathias Fröhlich [Sun, 22 May 2016 12:10:19 +0000 (14:10 +0200)]
mesa: Track enabled lights in a bitmask

This enables some optimizations afterwards.

Reviewed-by: Brian Paul <brianp@vmware.com>
Signed-off-by: Mathias Fröhlich <Mathias.Froehlich@web.de>
5 years agomesa: Rename CoordReplaceBits back to CoordReplace.
Mathias Fröhlich [Sun, 22 May 2016 12:10:19 +0000 (14:10 +0200)]
mesa: Rename CoordReplaceBits back to CoordReplace.

It used to be called like that and fits better with 80 columns.

Reviewed-by: Brian Paul <brianp@vmware.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Signed-off-by: Mathias Fröhlich <Mathias.Froehlich@web.de>
5 years agomesa: Remove the now unused CoordsReplace array.
Mathias Fröhlich [Sun, 22 May 2016 12:10:19 +0000 (14:10 +0200)]
mesa: Remove the now unused CoordsReplace array.

Now that all users are converted, remove the array.

Reviewed-by: Brian Paul <brianp@vmware.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Signed-off-by: Mathias Fröhlich <Mathias.Froehlich@web.de>
5 years agoi965: Convert i965 to use CoordsReplaceBits.
Mathias Fröhlich [Sun, 22 May 2016 12:10:19 +0000 (14:10 +0200)]
i965: Convert i965 to use CoordsReplaceBits.

Switch over to use the CoordsReplaceBits bitmask.

Reviewed-by: Brian Paul <brianp@vmware.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Signed-off-by: Mathias Fröhlich <Mathias.Froehlich@web.de>
5 years agoi915: Convert i915 to use CoordsReplaceBits.
Mathias Fröhlich [Sun, 22 May 2016 12:10:19 +0000 (14:10 +0200)]
i915: Convert i915 to use CoordsReplaceBits.

Switch over to use the CoordsReplaceBits bitmask.

Reviewed-by: Brian Paul <brianp@vmware.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Signed-off-by: Mathias Fröhlich <Mathias.Froehlich@web.de>
5 years agor200: convert r200 to use CoordsReplaceBits.
Mathias Fröhlich [Sun, 22 May 2016 12:10:19 +0000 (14:10 +0200)]
r200: convert r200 to use CoordsReplaceBits.

Switch over to use the CoordsReplaceBits bitmask.

Reviewed-by: Brian Paul <brianp@vmware.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Signed-off-by: Mathias Fröhlich <Mathias.Froehlich@web.de>
5 years agogallium: Convert the state_tracker to use CoordsReplaceBits.
Mathias Fröhlich [Sun, 22 May 2016 12:10:19 +0000 (14:10 +0200)]
gallium: Convert the state_tracker to use CoordsReplaceBits.

Switch over to use the CoordsReplaceBits bitmask.

Reviewed-by: Brian Paul <brianp@vmware.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Signed-off-by: Mathias Fröhlich <Mathias.Froehlich@web.de>
5 years agoswrast: Convert swrast to use CoordsReplaceBits.
Mathias Fröhlich [Sun, 22 May 2016 12:10:19 +0000 (14:10 +0200)]
swrast: Convert swrast to use CoordsReplaceBits.

Switch over to use the CoordsReplaceBits bitmask.

Reviewed-by: Brian Paul <brianp@vmware.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Signed-off-by: Mathias Fröhlich <Mathias.Froehlich@web.de>
5 years agomesa: Add gl_point_attrib::CoordReplaceBits bitfield.
Mathias Fröhlich [Sun, 22 May 2016 12:10:19 +0000 (14:10 +0200)]
mesa: Add gl_point_attrib::CoordReplaceBits bitfield.

The aim is to replace the CoordReplace array by
a bitfield. Until all drivers are converted,
establish the bitfield in parallel to the
CoordReplace array.

v2: Fix bitmask logic.

Reviewed-by: Brian Paul <brianp@vmware.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Signed-off-by: Mathias Fröhlich <Mathias.Froehlich@web.de>
5 years agomesa/glsl: stop using GL shader type internally
Timothy Arceri [Sun, 5 Jun 2016 03:17:51 +0000 (13:17 +1000)]
mesa/glsl: stop using GL shader type internally

Instead use the internal gl_shader_stage enum everywhere. This
makes things more consistent and gets rid of unnecessary
conversions.

Ideally it would be nice to remove the Type field from gl_shader
altogether but currently it is used to differentiate between
gl_shader and gl_shader_program in the ShaderObjects hash table.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
5 years agoauxilary/os: allow appending to GALLIUM_LOG_FILE
Brian Paul [Wed, 15 Jun 2016 02:35:53 +0000 (20:35 -0600)]
auxilary/os: allow appending to GALLIUM_LOG_FILE

If the log file specified by the GALLIUM_LOG_FILE begins with '+', open
the file in append mode.  This is useful to log all gallium output for
an entire piglit run, for example.

v2: put GALLIUM_LOG_FILE support inside an #ifdef DEBUG block.

Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
5 years agoanv: Fix a harmless overflow warning
Chad Versace [Tue, 14 Jun 2016 23:20:07 +0000 (16:20 -0700)]
anv: Fix a harmless overflow warning

anv_pipeline_binding::index is a uint8_t, but some code assigned to it
UINT16_MAX.

Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
Reviewd-by: Jason Ekstrand <jason@jlekstrand.net>
5 years agovc4: fix vc4_resource_from_handle() stride calculation
Rob Herring [Tue, 14 Jun 2016 21:17:44 +0000 (16:17 -0500)]
vc4: fix vc4_resource_from_handle() stride calculation

The expected stride calculation is completely wrong. It should
ultimately be multiplying cpp and width rather than dividing. The width
also needs to be aligned to the tiling width first before converting to
stride bytes.

The whole stride check here is possibly pointless. Any buffers which
were allocated outside of vc4 may have strides with larger alignment
requirements.

Signed-off-by: Rob Herring <robh@kernel.org>
Reviewed-by: Eric Anholt <eric@anholt.net>
5 years agoi965: Use a uniform for gl_PatchVerticesIn in the TCS on Gen8+.
Kenneth Graunke [Wed, 1 Jun 2016 07:08:55 +0000 (00:08 -0700)]
i965: Use a uniform for gl_PatchVerticesIn in the TCS on Gen8+.

We still need to recompile the passthrough shader when this value
changes, as it also affects the output vertex count.  But otherwise,
we can eliminate recompiles on Gen8+.

We probably want to do this for Gen7 as well, but that requires
rewriting the input release code to use a loop, which is a trade-off
I'd need to consider in more detail.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Cc: mesa-stable@lists.freedesktop.org
5 years agoglsl: Optionally lower TCS gl_PatchVerticesIn to a uniform.
Kenneth Graunke [Fri, 27 May 2016 03:21:58 +0000 (20:21 -0700)]
glsl: Optionally lower TCS gl_PatchVerticesIn to a uniform.

i965 has no special hardware for this, so the best way to implement
this is to pass it in via a uniform.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Cc: mesa-stable@lists.freedesktop.org
5 years agoi965: Use a uniform for gl_PatchVerticesIn in the TES.
Kenneth Graunke [Wed, 1 Jun 2016 07:08:55 +0000 (00:08 -0700)]
i965: Use a uniform for gl_PatchVerticesIn in the TES.

Fixes three GL44-CTS.tessellation_shader subtests:
- max_patch_vertices
- single.max_patch_vertices
- tessellation_control_to_tessellation_evaluation.gl_PatchVerticesIn

These use gl_PatchVerticesIn in the TES, but don't link against a
TCS (which would allow the linker to lower it to a constant).  We had
no handling for the system value in the backend, so it would just
assert fail.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Cc: mesa-stable@lists.freedesktop.org
5 years agoglsl: Optionally lower TES gl_PatchVerticesIn to a uniform.
Kenneth Graunke [Fri, 27 May 2016 03:21:58 +0000 (20:21 -0700)]
glsl: Optionally lower TES gl_PatchVerticesIn to a uniform.

i965 has no special hardware for this, so we need to pass this value in
as a uniform (unless the TES is linked against a TCS, in which case the
linker can just replace this with a constant).

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Cc: mesa-stable@lists.freedesktop.org
5 years agowinsys/radeon: use the common job queue for multithreaded command submission v2
Marek Olšák [Sat, 11 Jun 2016 12:58:55 +0000 (14:58 +0200)]
winsys/radeon: use the common job queue for multithreaded command submission v2

v2: fixup after renaming to util_queue_fence

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
5 years agogallium/util: import the multithreaded job queue from amdgpu winsys (v2)
Marek Olšák [Sat, 11 Jun 2016 11:10:49 +0000 (13:10 +0200)]
gallium/util: import the multithreaded job queue from amdgpu winsys (v2)

v2: rename the event to util_queue_fence

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
5 years agoradeonsi: fix undefined left-shift into sign bit
Nicolai Hähnle [Fri, 13 May 2016 05:04:04 +0000 (00:04 -0500)]
radeonsi: fix undefined left-shift into sign bit

Reviewed-by: Brian Paul <brianp@vmware.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
5 years agost_glsl_to_tgsi: don't read potentially uninitialized buffer variable
Nicolai Hähnle [Fri, 13 May 2016 06:56:44 +0000 (01:56 -0500)]
st_glsl_to_tgsi: don't read potentially uninitialized buffer variable

Found by -fsanitize=undefined. Note that this should be a harmless issue in
practice because the inst->op check always dominates anyway.

Reviewed-by: Brian Paul <brianp@vmware.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
5 years agomesa/main: fix integer overflows in _mesa_image_offset
Nicolai Hähnle [Fri, 13 May 2016 06:48:04 +0000 (01:48 -0500)]
mesa/main: fix integer overflows in _mesa_image_offset

Found using -fsanitize=undefined.

Cc: "11.1 11.2 12.0" <mesa-stable@lists.freedesktop.org>
Reviewed-by: Brian Paul <brianp@vmware.com>
5 years agoi965: remove type_size_vec4_times_4()
Timothy Arceri [Tue, 14 Jun 2016 04:39:16 +0000 (14:39 +1000)]
i965: remove type_size_vec4_times_4()

type_size_vec4_times_4() was introduced as a fix in 8dcf807cb43383
however since 3810c1561 we can just use type_size_scalar() and
get the actual number of outputs we need.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
5 years agomesa: Pass gl_constant_value union into _mesa_fetch_state().
Kenneth Graunke [Fri, 27 May 2016 02:56:48 +0000 (19:56 -0700)]
mesa: Pass gl_constant_value union into _mesa_fetch_state().

We've had some trouble in the past with copying integers around via
float pointers, as the C compiler sometimes uses x87 floating point
registers to load values on 32-bit systems.  Passing the
gl_constant_value union should be safer.

To avoid churn, this patch creates a "GLfloat *value" variable so
existing uses can stay the same.

Not observed to fix anything, but I was in the area adding more integer
state vars, and thought it'd be wise.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Dave Airlie <airlied@redhat.com>
Cc: mesa-stable@lists.freedesktop.org
5 years agogallium/radeon: num-cs-flushes query should display per-frame average
Marek Olšák [Fri, 10 Jun 2016 11:14:31 +0000 (13:14 +0200)]
gallium/radeon: num-cs-flushes query should display per-frame average

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
5 years agogallium/radeon: add driver queries for compute/dma call stats and spills
Marek Olšák [Thu, 9 Jun 2016 21:16:43 +0000 (23:16 +0200)]
gallium/radeon: add driver queries for compute/dma call stats and spills

also print the average count per frame

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
5 years agoradeonsi: don't generate "ret void undef"
Marek Olšák [Thu, 9 Jun 2016 00:22:25 +0000 (02:22 +0200)]
radeonsi: don't generate "ret void undef"

Use LLVMBuildRetVoid in epilogs and the GS copy shader and
si_llvm_build_ret otherwise.

Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
5 years agoradeonsi: try to hit direct hw MSAA resolve by changing micro mode in clear
Marek Olšák [Wed, 8 Jun 2016 19:00:22 +0000 (21:00 +0200)]
radeonsi: try to hit direct hw MSAA resolve by changing micro mode in clear

We could also do MSAA resolve in a compute shader like Vulkan and remove
these workarounds.

v2: comment the magic numbers

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
5 years agoradeonsi: clarify the MSAA resolve limitation with scanout
Marek Olšák [Wed, 8 Jun 2016 18:51:50 +0000 (20:51 +0200)]
radeonsi: clarify the MSAA resolve limitation with scanout

this is the correct hw requirement

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
5 years agogallium/radeon: add micro_tile_mode to radeon_surf
Marek Olšák [Wed, 8 Jun 2016 18:24:21 +0000 (20:24 +0200)]
gallium/radeon: add micro_tile_mode to radeon_surf

for easier access

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
5 years agoAdded pbuffer hooks for surfaceless platform
Gurchetan Singh [Mon, 16 May 2016 23:34:07 +0000 (16:34 -0700)]
Added pbuffer hooks for surfaceless platform

This change enables the creation of pbuffer
surfaces on the surfaceless platform.

v3: Going back to single-buffered pbuffer
plus additional code review changes

Reviewed-by: Chad Versace <chad.versace@intel.com>
5 years agogallium/util: don't use blocksize for minify for assertions
Roland Scheidegger [Tue, 14 Jun 2016 01:31:20 +0000 (03:31 +0200)]
gallium/util: don't use blocksize for minify for assertions

The previous assertions required for texture sizes smaller than block_size
that src_box.x + src_box.width still be block size.
(e.g. for a texture with width 3, and src_box.x = 0, src_box.width would
have to be 4 to not assert.)
This caused some assertions with some other state tracker.
It looks though like callers aren't expected to round up widths to block sizes
(for sizes larger than block size the assertion would still have verified it
wouldn't have been rounded up) so we simply shouldn't use a minify which
rounds up to block size.
(No piglit change with llvmpipe.)

Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
Reviewed-by: Brian Paul <brianp@vmware.com>
5 years agollvmpipe: hack-fix bugs due to bogus bind flags
Roland Scheidegger [Mon, 13 Jun 2016 15:49:01 +0000 (17:49 +0200)]
llvmpipe: hack-fix bugs due to bogus bind flags

The gallium contract would be that bind flags must indicate all possible
bindings a resource might get used, but fact is the mesa state tracker does
not set bind flags correctly, and this is more or less unfixable due to GL.

This caused a bug with piglit arb_uniform_buffer_object-rendering-dsa
since 6e6fd911da8a1d9cd62fe0a8a4cc0fb7bdccfe02 - the commit is correct,
but it caused us to miss updates to fs UBOs completely, since the
corresponding buffer didn't have the appropriate bind flag set (thus we
wouldn't check if it is indeed currently bound).
See the discussion about this starting here:
https://lists.freedesktop.org/archives/mesa-dev/2016-June/119829.html

So, update the bind flags when we detect such usage.
Note we update this value for now only in places which matter for us - that
is creating sampler/surface view, or binding constant buffer. There's plenty
more places (setting streamout buffers, vertex/index buffers, ...) where
things can be set with the wrong bind flags, but the bind flags there never
matter.

While here also make sure we only set dirty constant bit when it's a fs
constant buffer - totally doesn't matter if it's vs/gs.

Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
5 years agofreedreno: support start param for sampler views/states
Rob Clark [Sat, 11 Jun 2016 16:59:00 +0000 (12:59 -0400)]
freedreno: support start param for sampler views/states

Signed-off-by: Rob Clark <robclark@freedesktop.org>
5 years agofreedreno: only do extra vertex-buffer state logic on a2xx
Rob Clark [Fri, 10 Jun 2016 15:42:56 +0000 (11:42 -0400)]
freedreno: only do extra vertex-buffer state logic on a2xx

Possibly this should move into an fd2 wrapper fxn, similar to the
texture state tracking done for fd3/fd4 (clamp emulation, etc)

Signed-off-by: Rob Clark <robclark@freedesktop.org>
5 years agofreedreno: use util_copy_constant_buffer() helper
Rob Clark [Tue, 7 Jun 2016 18:35:09 +0000 (14:35 -0400)]
freedreno: use util_copy_constant_buffer() helper

Signed-off-by: Rob Clark <robclark@freedesktop.org>
5 years agost/vdpau: replace 0.f and 1.f with 0.0f and 1.0f respectively
Nayan Deshmukh [Fri, 10 Jun 2016 15:34:08 +0000 (21:04 +0530)]
st/vdpau: replace 0.f and 1.f with 0.0f and 1.0f respectively

Signed-off-by: Nayan Deshmukh <nayan26deshmukh@gmail.com>
Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>
5 years agoi965: Check return value of screen->image.loader->getBuffers (v2)
Tomasz Figa [Mon, 13 Jun 2016 10:53:21 +0000 (19:53 +0900)]
i965: Check return value of screen->image.loader->getBuffers (v2)

The images struct is an uninitialized local variable on the stack. If the
callback returns 0, the struct might not have been updated and so should
be considered uninitialized. Currently the code ignores the return value,
which (depending on stack contents) might end up in reading a non-zero
value from images.image_mask and dereferencing further fields.

Another solution would be to initialize image_mask with 0, but checking
the return value seems more sensible and it is what Gallium is doing.

v2: fix typos in commit message,
    fix indentation,
    remove unnecessary parentheses and pointer dereference to keep line
    length reasonable.

Cc: 11.2 12.0 <mesa-stable@lists.freedesktop.org>
Signed-off-by: Tomasz Figa <tfiga@chromium.org>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
5 years agost/dri: Clear drawable texture_mask in dri2_invalidate_drawable
Michel Dänzer [Thu, 9 Jun 2016 06:15:19 +0000 (15:15 +0900)]
st/dri: Clear drawable texture_mask in dri2_invalidate_drawable

This makes sure that dri_set_tex_buffer2 -> dri_drawable_validate_att
will re-create the front left attachment buffer after the drawable got
invalidated.

Fixes window contents not updating until the window is resized when
using DRI2 PRIME.

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
5 years agoglsl/builtin_variables: Populate MaxCombinedShaderStorageBlocks on GLSL 4.40
Eduardo Lima Mitev [Fri, 10 Jun 2016 17:15:33 +0000 (19:15 +0200)]
glsl/builtin_variables: Populate MaxCombinedShaderStorageBlocks on GLSL 4.40

Built-in variable "MaxCombinedShaderStorageBlocks" was added to GLSL 4.40
revision 9.

Section "1.2.1 Changes since revision 8 of GLSL version 4.40",
page 3 of the PDF states:

    "Bug 11734: Add gl_MaxCombinedShaderOutputResources and mark
    gl_MaxCombinedImageUnitsAndFragmentOutputs  as deprecated."

Fixes: GL44-CTS.shader_image_load_store.basic-glsl-const
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
5 years agost/va: ensure linear memory for dmabuf
Julien Isorce [Tue, 14 Jun 2016 07:40:33 +0000 (08:40 +0100)]
st/va: ensure linear memory for dmabuf

In order to do zero-copy between two different devices
the memory should not be tiled.

Tested with GStreamer on a laptop that has 2 GPUs:
1- gstvaapidecode:
   HW decoding and dmabuf export with nouveau driver on Nvidia GPU.
2- glimagesink:
   EGLImage imports dmabuf on Intel GPU.

TEST: DRI_PRIME=1 gst-launch vaapidecodebin ! glimagesink

Signed-off-by: Julien Isorce <j.isorce@samsung.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
5 years agoisl: Replace bash generator with python generator
Dylan Baker [Mon, 13 Jun 2016 18:19:18 +0000 (11:19 -0700)]
isl: Replace bash generator with python generator

This replaces the current bash generator with a python based generator
using mako. It's quite fast and works with both python 2.7 and python
3.5, and should work with 3.3+ and maybe even 3.2.

It produces an almost identical file except for a minor layout changes,
and the addition of a "generated file, do not edit" warning.

Cc: "12.0" <mesa-stable@lists.freedesktop.org>
Signed-off-by: Dylan Baker <dylanx.c.baker@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
5 years agomesa: Make use of u_bit_scan{,64}.
Mathias Fröhlich [Thu, 9 Jun 2016 04:35:34 +0000 (06:35 +0200)]
mesa: Make use of u_bit_scan{,64}.

Reviewed-by: Brian Paul <brianp@vmware.com>
Tested-by: Brian Paul <brianp@vmware.com>
Signed-off-by: Mathias Fröhlich <Mathias.Froehlich@web.de>
5 years agomesa/gallium: Move u_bit_scan{,64} from gallium to util.
Mathias Fröhlich [Thu, 9 Jun 2016 04:35:34 +0000 (06:35 +0200)]
mesa/gallium: Move u_bit_scan{,64} from gallium to util.

The functions are also useful for mesa.
Introduce src/util/bitscan.{h,c}. Move ffs function
implementations from src/mesa/main/imports.{h,c}.
Move bit scan related functions from
src/gallium/auxiliary/util/u_math.h. Merge platform
handling with what is available from within mesa.

v2: Try to fix MSVC compile.

Reviewed-by: Brian Paul <brianp@vmware.com>
Tested-by: Brian Paul <brianp@vmware.com>
Signed-off-by: Mathias Fröhlich <Mathias.Froehlich@web.de>
5 years agoclover: Include generated sources in AM_CPPFLAGS
Aaron Watry [Tue, 14 Jun 2016 02:46:33 +0000 (21:46 -0500)]
clover: Include generated sources in AM_CPPFLAGS

git_sha1.c is generated in $(top_builddir)/src.

Fixes out-of-tree builds since 4825264f75c83576.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=96516
Signed-off-by: Aaron Watry <awatry@gmail.com>
Reviewed-and-Tested-by: Michel Dänzer <michel.daenzer@amd.com>
5 years agonv50/ir: make Graph destructor virtual
Stephan Bergmann [Thu, 9 Jun 2016 15:13:20 +0000 (17:13 +0200)]
nv50/ir: make Graph destructor virtual

Avoid ASan new-delete-type-mismatch when Function::domTree is created as
DominatorTree in Function::convertToSSA but destroyed only as base
Graph in ~Function.

Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
5 years agoi965/compiler: Bring back the INTEL_PRECISE_TRIG environment variable
Jason Ekstrand [Sat, 11 Jun 2016 20:17:27 +0000 (13:17 -0700)]
i965/compiler: Bring back the INTEL_PRECISE_TRIG environment variable

This was removed in d9546b0c5d and replced with the precise_trig driconf
option.  However, we still need precise trig in the Vulkan driver so this
commit brings back the environment variable and compiler->precise_trig is
effectively the logical OR of the two.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=96484
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Cc: "12.0" <mesa-stable@lists.freedesktop.org>
5 years agoi965: Defeat the register stride checker in pull uniform messages.
Samuel Iglesias Gonsálvez [Thu, 9 Jun 2016 11:03:59 +0000 (13:03 +0200)]
i965: Defeat the register stride checker in pull uniform messages.

Pulling DF uniforms from pull constant buffer generates messages like:
    send(4)         g12<1>DF        g12<0,1,0>F
         sampler ld SIMD4x2 Surface = 1 Sampler = 0 mlen 1 rlen 1

which produces GPU hangs in Cherryview/Braswell:

    "For 64-bit Align1 operation or multiplication of dwords in CHV,
     source horizontal stride must be aligned to qword."

This seems to be documented in the Cherryview PRM, Volume 7, Page 843:

    "When source or destination datatype is 64b or operation is integer
     DWord multiply, regioning in Align1 must follow these rules:

     1. Source and Destination horizontal stride must be aligned to the
        same qword."

We should set the destination type to UD, D, or F so that
the register stride checker doesn't notice.  The destination type of
send messages is basically irrelevant anyway.

Cc: "12.0" <mesa-stable@lists.freedesktop.org>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=95462
Signed-off-by: Samuel Iglesias Gonsálvez <siglesias@igalia.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
5 years agoi965: Defeat the register stride checker in URB reads.
Kenneth Graunke [Wed, 8 Jun 2016 23:24:50 +0000 (16:24 -0700)]
i965: Defeat the register stride checker in URB reads.

Pulling DF inputs from the URB generates messages like:

   send(8)         g23<1>DF        g1<8,8,1>UD
                   urb 3 SIMD8 read mlen 1 rlen 2      { align1 1Q };

which makes the simulator angry:

   "For 64-bit Align1 operation or multiplication of dwords in CHV,
    source horizontal stride must be aligned to qword."

This seems to be documented in the Cherryview PRM, Volume 7, Page 823:

   "When source or destination datatype is 64b or operation is integer
    DWord multiply, regioning in Align1 must follow these rules:

    1. Source and Destination horizontal stride must be aligned to the
       same qword."

Setting the source horizontal stride to QWord is insane, as it's the
message header containing 8 URB handles in a single 32-bit DWord.
Instead, we should whack the destination type to UD, D, or F so that
the register stride checker doesn't notice.  The destination type of
send messages is basically irrelevant anyway.

Cc: "12.0" <mesa-stable@lists.freedesktop.org>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=95462
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
5 years agoi965: Fix issues with number of VS URB entries on Cherryview/Broxton.
Kenneth Graunke [Wed, 8 Jun 2016 22:55:18 +0000 (15:55 -0700)]
i965: Fix issues with number of VS URB entries on Cherryview/Broxton.

Cherryview/Broxton annoyingly have a minimum number of VS URB entries
of 34, which is not a multiple of 8.  When the VS size is less than 9,
the number of VS entries has to be a multiple of 8.

Notably, BLORP programmed the minimum number of VS URB entries (34), with
a size of 1 (less than 9), which is invalid.

It seemed like this could be a problem in the regular URB code as well,
so I went ahead and updated that to be safe.

Cc: "12.0" <mesa-stable@lists.freedesktop.org>
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
5 years agoglsl: make sure UBO arrays are sized in ES
Timothy Arceri [Tue, 14 Jun 2016 00:13:41 +0000 (10:13 +1000)]
glsl: make sure UBO arrays are sized in ES

This check was removed in 5b2675093e86 add it back in.

Reviewed-by: Dave Airlie <airlied@redhat.com>
Cc: "12.0" <mesa-stable@lists.freedesktop.org>
https://bugs.freedesktop.org/show_bug.cgi?id=96349

5 years agoclover: Update OpenCL version string to match OpenGL
Vedran Miletić [Mon, 6 Jun 2016 10:43:33 +0000 (12:43 +0200)]
clover: Update OpenCL version string to match OpenGL

Change MESA into Mesa in CL_PLATFORM_VERSION and CL_DEVICE_VERSION. For
both, always append git version suffix from git_sha1.h.

v5: move semicolon to same line as MESA_GIT_SHA1.
v4: drop #ifdef guards.
v3: add missing include.
v2: change CL_DEVICE_VERSION as well.

Cc: <mesa-stable@lists.freedesktop.org>
Reviewed-by: Francisco Jerez <currojerez@riseup.net>
5 years agoi965/fs: Fix regs_written for SIMD-lowered instructions some more.
Francisco Jerez [Sat, 11 Jun 2016 00:55:39 +0000 (17:55 -0700)]
i965/fs: Fix regs_written for SIMD-lowered instructions some more.

ISTR having suggested this during review of the recent FP64 changes to
the SIMD lowering pass, but it doesn't look like it was taken into
account in the end.  Using the fs_reg::component_size helper instead
of this open-coded variant makes sure that the stride is taken into
account correctly.  Fixes at least the following piglit tests with
spilling forced on (since otherwise regs_written would be calculated
incorrectly and the spilling code would be rather confused about how
much data needs to be spilled):

 spec.arb_gpu_shader_fp64.shader_storage.layout-std140-fp64-shader
 spec.arb_gpu_shader_fp64.shader_storage.layout-std140-fp64-mixed-shader

Cc: <mesa-stable@lists.freedesktop.org>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
5 years agoi965: Fix cross-primitive scratch corruption when changing the per-thread allocation.
Francisco Jerez [Fri, 10 Jun 2016 23:41:59 +0000 (16:41 -0700)]
i965: Fix cross-primitive scratch corruption when changing the per-thread allocation.

I haven't found any mention of this in the hardware docs, but
experimentally what seems to be going on is that when the per-thread
scratch slot size is changed between two pipelined draw calls, shader
invocations using the old and new scratch size setting may end up
being executed in parallel, causing their scratch offset calculations
to be based in a different partitioning of the scratch space, which
can cause their thread-local scratch space to overlap leading to
cross-thread scratch corruption.

I've been experimenting with alternative workarounds, like emitting a
PIPE_CONTROL with DC flush and CS stall between draw (or dispatch
compute) calls using different per-thread scratch allocation settings,
or avoiding reuse of the scratch BO if the per-thread scratch
allocation doesn't exactly match the original.  Both seem to be as
effective as this workaround, but they have potential performance
implications, while this should be basically for free.

Fixes over 40 failures in our CI system with spilling forced on
(including CTS, dEQP and Piglit failures) on a number of different
platforms from Gen4 to Gen9.  The 'glsl-max-varyings' piglit test
seems to be able to reproduce this bug consistently in the vertex
shader on at least Gen4, Gen8 and Gen9 with spilling forced on.

Cc: <mesa-stable@lists.freedesktop.org>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
5 years agoi965: Keep track of the per-thread scratch allocation in brw_stage_state.
Francisco Jerez [Mon, 13 Jun 2016 21:56:22 +0000 (14:56 -0700)]
i965: Keep track of the per-thread scratch allocation in brw_stage_state.

This will be used to find out what per-thread slot size a previously
allocated scratch BO was used with in order to fix a hardware race
condition without introducing additional stalls or memory allocations.
Instead of calling brw_get_scratch_bo() manually from the various
codegen functions, call a new helper function that keeps track of the
per-thread scratch size and conditionally allocates a larger scratch
BO.

v2: Handle BO allocation manually instead of relying on
    brw_get_scratch_bo (Ken).

Cc: <mesa-stable@lists.freedesktop.org>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
5 years agoi965: Fix scratch overallocation if the original slot size was already a power of...
Francisco Jerez [Thu, 9 Jun 2016 00:53:24 +0000 (17:53 -0700)]
i965: Fix scratch overallocation if the original slot size was already a power of two.

The bitwise arithmetic trick used in brw_get_scratch_size() to clamp
the scratch allocation to 1KB has the unintended side effect that it
will cause us to allocate 2x the required amount of scratch space if
the original per-thread scratch size happened to be already a power of
two.  Instead use the obvious MAX2 idiom to clamp the scratch
allocation to the expected range.

Cc: <mesa-stable@lists.freedesktop.org>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
5 years agomesa: Make TexSubImage check negative dimensions sooner.
Kenneth Graunke [Thu, 14 Apr 2016 09:19:59 +0000 (02:19 -0700)]
mesa: Make TexSubImage check negative dimensions sooner.

Two dEQP tests expect INVALID_VALUE errors for negative width/height
parameters, but get INVALID_OPERATION because they haven't actually
created a destination image.  This is arguably not a bug in Mesa, as
there's no specified ordering of error conditions.

However, it's also really easy to make the tests pass, and there's
no real harm in doing these checks earlier.

Fixes:
dEQP-GLES3.functional.negative_api.texture.texsubimage3d_neg_width_height
dEQP-GLES31.functional.debug.negative_coverage.get_error.texture.texsubimage3d_neg_width_height

v2: Drop redundant check (caught by Anuj Phogat).

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
5 years agoutil: update some assertions in util_resource_copy_region()
Brian Paul [Mon, 13 Jun 2016 15:54:12 +0000 (09:54 -0600)]
util: update some assertions in util_resource_copy_region()

To cope with copies of compressed images which are not multiples of
the block size.  Suggested by Jose.

Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
Reviewed-by: Roland Scheidegger <sroland@sroland@vmware.com>
5 years agoi965: Fix encode_slm_size() to take a generation, not a device info.
Kenneth Graunke [Mon, 13 Jun 2016 19:18:23 +0000 (12:18 -0700)]
i965: Fix encode_slm_size() to take a generation, not a device info.

In the Vulkan driver, we have the generation number (a compile time
constant) but not necessarily the brw_device_info struct.  I meant
to rework the function to take a generation number instead of a
brw_device_info pointer to accomodate this.  But I forgot, and left
it taking a brw_device_info pointer, while making Vulkan pass the
generation number (8, 9, ...) directly.  This led to crashes.

Brown paper bag fix for commit 87d062a94080373995170f51063a9649.

Cc: "12.0" <mesa-stable@lists.freedesktop.org>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=96504
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
5 years agoi965: Don't leak scratch BOs for TCS/TES.
Kenneth Graunke [Sun, 12 Jun 2016 22:44:55 +0000 (15:44 -0700)]
i965: Don't leak scratch BOs for TCS/TES.

These need to be freed too.

Cc: "12.0" <mesa-stable@lists.freedesktop.org>
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
5 years agoanv/pipeline: Don't dereference NULL dynamic state pointers
Nanley Chery [Thu, 9 Jun 2016 21:48:00 +0000 (14:48 -0700)]
anv/pipeline: Don't dereference NULL dynamic state pointers

Add guards to prevent dereferencing NULL dynamic pipeline state. Asserts
of pCreateInfo members are moved to the earliest points at which they
should not be NULL.

This fixes a segfault seen in the McNopper demo, VKTS_Example09.

v3 (Jason Ekstrand):
   - Fix disabled rasterization check
   - Revert opaque detection of color attachment usage

Signed-off-by: Nanley Chery <nanley.g.chery@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Cc: "12.0" <mesa-stable@lists.freedesktop.org>
5 years agoanv: Document and rename anv_pipeline_init_dynamic_state()
Nanley Chery [Thu, 9 Jun 2016 19:12:29 +0000 (12:12 -0700)]
anv: Document and rename anv_pipeline_init_dynamic_state()

To reduce confusion, clarify that the state being copied is not dynamic.

This agrees with the Vulkan spec's usage of the term. Various sections
specify that the various pipeline state which have VkDynamicState enums
(e.g. viewport, scissor, etc.) may or may not be dynamic.

Signed-off-by: Nanley Chery <nanley.g.chery@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Cc: "12.0" <mesa-stable@lists.freedesktop.org>
5 years agonvc0/ir: clamp the UBO index for compute on Kepler
Samuel Pitoiset [Mon, 13 Jun 2016 15:13:28 +0000 (17:13 +0200)]
nvc0/ir: clamp the UBO index for compute on Kepler

We already check that the address is not "too far", but we should also
clamp the UBO index in order to avoid looking at the wrong place in the
driver cb. This is a pretty rare situation though.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Cc: "12.0" <mesa-stable@lists.freedesktop.org>
5 years agoradeonsi: enable scratch coalescing
Marek Olšák [Wed, 8 Jun 2016 11:21:25 +0000 (13:21 +0200)]
radeonsi: enable scratch coalescing

This makes one particular compute shader 8x faster.

Latest LLVM git is required.

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>