mesa.git
18 months agoradeonsi: make cs_preamble_state optional
Marek Olšák [Thu, 18 Jun 2020 04:51:19 +0000 (00:51 -0400)]
radeonsi: make cs_preamble_state optional

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5798>

18 months agowinsys/amdgpu: make amdgpu_bo_unmap non-static
Marek Olšák [Thu, 18 Jun 2020 04:51:44 +0000 (00:51 -0400)]
winsys/amdgpu: make amdgpu_bo_unmap non-static

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5798>

18 months agoac: add tables for CP register shadowing
Marek Olšák [Mon, 15 Jun 2020 20:31:43 +0000 (16:31 -0400)]
ac: add tables for CP register shadowing

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5798>

18 months agoac: add helper ac_get_register_name
Marek Olšák [Sun, 24 May 2020 12:30:39 +0000 (08:30 -0400)]
ac: add helper ac_get_register_name

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5798>

18 months agoradeonsi: sort registers in si_init_cs_preamble_state according to GPU gen
Marek Olšák [Tue, 7 Jul 2020 04:02:19 +0000 (00:02 -0400)]
radeonsi: sort registers in si_init_cs_preamble_state according to GPU gen

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5798>

18 months agoradeonsi: sort registers in si_emit_initial_compute_regs according to GPU gen
Marek Olšák [Tue, 7 Jul 2020 04:02:19 +0000 (00:02 -0400)]
radeonsi: sort registers in si_emit_initial_compute_regs according to GPU gen

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5798>

18 months agoradeonsi/gfx10: set the correct value for OFFCHIP_BUFFERING
Marek Olšák [Tue, 7 Jul 2020 03:51:25 +0000 (23:51 -0400)]
radeonsi/gfx10: set the correct value for OFFCHIP_BUFFERING

Copied from PAL. Higher values break tessellation, which I was only able
to reproduce with register shadowing enabled.

Fixes: 0bf3e6fae7f82b4f16fbcbb05a1ae47f7930e189 "radeonsi/gfx10: double the number of tessellation offchip buffers per SE"
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5798>

18 months agoradeonsi: add missing initialization of registers
Marek Olšák [Tue, 7 Jul 2020 02:05:00 +0000 (22:05 -0400)]
radeonsi: add missing initialization of registers

(random initial gfx10 commit:)
Fixes: 78cdf9a99f0 - amd/addrlib: add gfx10 support
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5798>

18 months agodocs: add some very basic documentation about zink
Erik Faye-Lund [Sun, 19 Jul 2020 10:13:40 +0000 (12:13 +0200)]
docs: add some very basic documentation about zink

Reviewed-by: Eric Engestrom <eric@engestrom.ch>
Reviewed-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Reviewed-by: Marcin Ślusarz <marcin.slusarz@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5967>

18 months agoradv/winsys: be more robust when a CS failed during recording
Samuel Pitoiset [Sun, 12 Jul 2020 17:13:18 +0000 (19:13 +0200)]
radv/winsys: be more robust when a CS failed during recording

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5872>

18 months agoradv/winsys: return a Vulkan error code when binding virtual buffers/images
Samuel Pitoiset [Tue, 21 Jul 2020 13:55:38 +0000 (15:55 +0200)]
radv/winsys: return a Vulkan error code when binding virtual buffers/images

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5872>

18 months agoradv/winsys: remove useless check when binding virtual buffers/images
Samuel Pitoiset [Tue, 21 Jul 2020 13:51:13 +0000 (15:51 +0200)]
radv/winsys: remove useless check when binding virtual buffers/images

Size must be greater than 0.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5872>

18 months agoradv/winsys: check more allocation failures
Samuel Pitoiset [Sun, 12 Jul 2020 14:00:35 +0000 (16:00 +0200)]
radv/winsys: check more allocation failures

While we are at it, use local variables first to make sure to
not leak memory if something bad happens.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5872>

18 months agoradv: add missing return values check for some winsys calls
Samuel Pitoiset [Sun, 12 Jul 2020 16:35:25 +0000 (18:35 +0200)]
radv: add missing return values check for some winsys calls

Make sure to handle errors properly.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5872>

18 months agonir/tests: Add tests for opt_if_simplification
Danylo Piliaiev [Tue, 21 Jul 2020 12:51:55 +0000 (15:51 +0300)]
nir/tests: Add tests for opt_if_simplification

Test cases:

opt_if_simplification - the most trivial test case.

opt_if_simplification_single_source_phi_after_if - tests that
opt_if_simplification correctly handles single-source phis after
the if, found in https://gitlab.freedesktop.org/mesa/mesa/-/issues/3282

Signed-off-by: Danylo Piliaiev <danylo.piliaiev@globallogic.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5945>

18 months agonir/opt_if: Fix opt_if_simplification when else branch has jump
Danylo Piliaiev [Thu, 16 Jul 2020 18:09:08 +0000 (21:09 +0300)]
nir/opt_if: Fix opt_if_simplification when else branch has jump

Consider the following case:

 if ssa_1 {
    block block_2:
    /* succs: block_4 */
 } else {
    block block_3:
    ...
    break
    /* succs: block_5 */
 }

 block block_4:
 vec1 32 ssa_100 = phi block_2: ssa_2

After block_3 extraction and reinsertion, phi->pred becomes invalid
and isn't updated by reinsertion since it is unreachable from block_3.

Call nir_opt_remove_phis_block before moving block to eliminate single
source phis after the if.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/3282
Fixes: e3e929f8c342b32dc8f5296adf8fb337866fa40a
Signed-off-by: Danylo Piliaiev <danylo.piliaiev@globallogic.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5945>

18 months agozink: omit Lod image operand in ntv when not using an image texture dim
Mike Blumenkrantz [Thu, 2 Jul 2020 15:46:28 +0000 (11:46 -0400)]
zink: omit Lod image operand in ntv when not using an image texture dim

according to spec, this is invalid (and it's not being used anyway)

Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5911>

18 months agozink: add some asserts for building access chains in ntv
Mike Blumenkrantz [Fri, 26 Jun 2020 19:14:20 +0000 (15:14 -0400)]
zink: add some asserts for building access chains in ntv

we're never going to pass a 0 here, and it's going to be an error if we do

Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5911>

18 months agozink: handle texelFetchOffset with offsets
Mike Blumenkrantz [Tue, 23 Jun 2020 19:14:34 +0000 (15:14 -0400)]
zink: handle texelFetchOffset with offsets

we need to explicitly add the offset in this case since it's not available
as a spirv param

fixes spec@glsl-1.30@execution@fs-texelfetchoffset-2d

Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5911>

18 months agozink: use helper function to handle uvec/bvec types
Mike Blumenkrantz [Wed, 10 Jun 2020 15:00:16 +0000 (11:00 -0400)]
zink: use helper function to handle uvec/bvec types

bit_size of 1 means we use a bool type here, 32 means uint, so we can just
handle that automatically for all relevant cases

ref shaders@glsl-vs-continue-in-switch-in-do-while

Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5911>

18 months agoaco: fix scratch loads which cross element_size boundaries
Daniel Schürmann [Mon, 20 Jul 2020 10:07:55 +0000 (12:07 +0200)]
aco: fix scratch loads which cross element_size boundaries

Previously, we've set element_size == 16 which causes loads from
packed vec3 arrays to cross the boundary and return wrong data.
This patch sets element_size = 4 and splits loads into single channel.
Fixes all of dEQP-VK.subgroups.ballot_broadcast.*

Cc: 20.1 <mesa-stable@lists.freedesktop.org>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5977>

18 months agomesa/program: fix shadow property for samplers
Erik Faye-Lund [Mon, 20 Jul 2020 16:06:47 +0000 (18:06 +0200)]
mesa/program: fix shadow property for samplers

When creating a sampler-type, we need to pass the correct vaclue for
the "is_shadow"-parameter to glsl_sampler_type(), otherwise the compiler
backend will have no clue about this being a shadow-sampler.

Fixes: 1c0f92d8a8c ("nir: Create sampler variables in prog_to_nir.")
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5986>

18 months agoci: Disable trace testing on Mali T760
Tomeu Vizoso [Wed, 22 Jul 2020 12:23:15 +0000 (14:23 +0200)]
ci: Disable trace testing on Mali T760

The machine is showing random mis-renderings and we don't have time now
to investigate. Comment it out for now so CI pipelines don't fail due to
it.

Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6023>

18 months agoradv: advertise VK_EXT_shader_atomic_float
Samuel Pitoiset [Mon, 20 Jul 2020 16:38:17 +0000 (18:38 +0200)]
radv: advertise VK_EXT_shader_atomic_float

No hw support for float atomic add for buffer and (sparse) images.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6000>

18 months agoac/nir: add support for nir_intrinsic_shared_atomic_fadd
Samuel Pitoiset [Tue, 21 Jul 2020 08:49:36 +0000 (10:49 +0200)]
ac/nir: add support for nir_intrinsic_shared_atomic_fadd

Only LLVM 10+ has support.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6000>

18 months agoaco: add support for nir_intrinsic_shared_atomic_fadd
Samuel Pitoiset [Tue, 21 Jul 2020 08:44:29 +0000 (10:44 +0200)]
aco: add support for nir_intrinsic_shared_atomic_fadd

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6000>

18 months agoci: Test with more traces
Tomeu Vizoso [Tue, 21 Jul 2020 08:19:17 +0000 (10:19 +0200)]
ci: Test with more traces

Use some more traces from traces-db in the existing jobs.

Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Reviewed-by: Andres Gomez <agomez@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6008>

18 months agoci: Prefix tracie artifacts with the device name
Tomeu Vizoso [Tue, 21 Jul 2020 12:04:42 +0000 (14:04 +0200)]
ci: Prefix tracie artifacts with the device name

Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Reviewed-by: Andres Gomez <agomez@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6008>

18 months agoci: Use smaller glxgears trace
Tomeu Vizoso [Tue, 21 Jul 2020 08:13:56 +0000 (10:13 +0200)]
ci: Use smaller glxgears trace

A smaller version of this trace has been pushed to traces-db, so update
to use this instead.

Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Reviewed-by: Andres Gomez <agomez@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6008>

18 months agoci: Upload images of failed replays to MinIO
Tomeu Vizoso [Tue, 21 Jul 2020 08:48:43 +0000 (10:48 +0200)]
ci: Upload images of failed replays to MinIO

For the llvmpipe and virgl jobs.

Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Reviewed-by: Andres Gomez <agomez@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6008>

18 months agonvc0: add documentation for nve4+ (Kepler) COPY class
Rhys Kidd [Mon, 20 Jul 2020 03:07:48 +0000 (13:07 +1000)]
nvc0: add documentation for nve4+ (Kepler) COPY class

Has been utilised within nouveau in place of the former M2MF class, which was
dropped for Kepler in PGRAPH in favour of:

  - a new P2MF object that only does simple upload; and
  - PCOPY took over responsibility of M2MF's other DMA functions.

Autogenerated headers from envytools commit 32659e654170cb03038ccf2cb165decd3a2409d6

NVIDIA documentation released at:
  https://github.com/NVIDIA/open-gpu-doc/blob/master/classes/dma-copy/cla0b5.h

Signed-off-by: Rhys Kidd <rhyskidd@gmail.com>
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5982>

18 months agonvc0: fix macro define for NVE4_COPY()
Rhys Kidd [Mon, 20 Jul 2020 11:10:25 +0000 (21:10 +1000)]
nvc0: fix macro define for NVE4_COPY()

Fixes: e44089b2f79 ("nvc0: add initial support for nve4+ (Kepler) chipsets")
Signed-off-by: Rhys Kidd <rhyskidd@gmail.com>
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5982>

18 months agoanv: properly handle fence import of sync_fd = -1
Lionel Landwerlin [Sat, 18 Jul 2020 19:51:44 +0000 (22:51 +0300)]
anv: properly handle fence import of sync_fd = -1

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes: 43e8808b82b9eb ("anv: Add support for the SYNC_FD handle type for fences")
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5964>

18 months agomeson: Add mising git_sha1.h dependency.
Bas Nieuwenhuizen [Tue, 21 Jul 2020 23:50:47 +0000 (01:50 +0200)]
meson: Add mising git_sha1.h dependency.

Fixes: 606dff1b73f "vulkan/overlay: Add support for a control socket."
Reviewed-by: Dylan Baker <dylan.c.baker@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6019>

18 months agoaco: fix includes in aco_ir.cpp
Rhys Perry [Tue, 21 Jul 2020 20:48:06 +0000 (21:48 +0100)]
aco: fix includes in aco_ir.cpp

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/3300
Fixes: e75946cfefc ('aco: move some setup code into helpers')
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6015>

18 months agoturnip: disable tiling for NV12/IYUV formats
Jonathan Marek [Thu, 9 Jul 2020 01:00:07 +0000 (21:00 -0400)]
turnip: disable tiling for NV12/IYUV formats

The last change to my previous MR to disable UBWC for the formats ended up
breaking a few tests for A640 at least, because tiled-but-not-UBWC can be
broken in some cases.

Fixes: 1a83279da57f2e ("turnip: enable 420_UNORM formats")
Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5817>

18 months agofreedreno/ir3: Fix SSBO size for bindless SSBO's
Connor Abbott [Tue, 21 Jul 2020 14:20:14 +0000 (16:20 +0200)]
freedreno/ir3: Fix SSBO size for bindless SSBO's

We theoretically could push these sizes to the const file
opportunistically, which appears to be what the blob does, but the
maximum number of SSBO's is way too big to do that unconditionally. Just
use resinfo to get the size for now.

Fixes on turnip: dEQP-VK.ssbo.unsized_array_length.*

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6012>

18 months agoaco: fix copy of uninitialized boolean
Rhys Perry [Fri, 3 Apr 2020 16:44:47 +0000 (17:44 +0100)]
aco: fix copy of uninitialized boolean

This should be harmless but UBSan seems to complain.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6013>

18 months agoradv: fix invalid conversion warnings in vk_format.h
Rhys Perry [Wed, 19 Feb 2020 11:45:59 +0000 (11:45 +0000)]
radv: fix invalid conversion warnings in vk_format.h

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6013>

18 months agoaco: print ACO IR before scheduling instead of after
Rhys Perry [Tue, 18 Feb 2020 16:10:46 +0000 (16:10 +0000)]
aco: print ACO IR before scheduling instead of after

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6013>

18 months agoaco: make validate() usable in tests
Rhys Perry [Thu, 30 Jan 2020 11:49:20 +0000 (11:49 +0000)]
aco: make validate() usable in tests

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6013>

18 months agoaco: move some setup code into helpers
Rhys Perry [Wed, 22 Jan 2020 19:57:20 +0000 (19:57 +0000)]
aco: move some setup code into helpers

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6013>

18 months agoegl/dri2: try to bind old context if bindContext failed
Luigi Santivetti [Tue, 30 Jun 2020 13:59:45 +0000 (14:59 +0100)]
egl/dri2: try to bind old context if bindContext failed

This change mostly touches error handling code paths, where a
bug was found when the DRI driver failed to bind a new DRI
context. Specifically, the reason for it to fail was the window
system unable (for whatever reason) to provide the DRI drawable
with a buffer. In this instance, Mesa un-does the EGL bindings,
but doesn't restore the old DRI context, hence remaining in a
funny state. It's worth mentioning that despite trying, there
is no guarantee that the old DRI context can be restored,
depending on the runtime.

Before this change, if bindContext() failed then
dri2_make_current() would rebind the old EGL context and
surfaces and return EGL_BAD_MATCH. However, it wouldn't rebind
the DRI context and surfaces, thus leaving it in an
inconsistent and unrecoverable state.

After this change, dri2_make_current() tries to bind the old
DRI context and surfaces when bindContext() failed. If unable
to do so, it leaves EGL and the DRI driver in a consistent
state, it reports an error and returns EGL_BAD_MATCH.

Fixes: 4e8f95f64d004aa1 ("egl_dri2: Always unbind old contexts")
Signed-off-by: Luigi Santivetti <luigi.santivetti@imgtec.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Acked-by: Eric Engestrom <eric@engestrom.ch>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5707>

18 months agodri2: do not conflate unbind and bindContext() failure
Luigi Santivetti [Tue, 30 Jun 2020 10:32:49 +0000 (11:32 +0100)]
dri2: do not conflate unbind and bindContext() failure

dri2_make_current() has become hard to follow, address this by
splitting the semantic of needing a call to bindContext() and
its failure.

Cc: mesa-stable
Signed-off-by: Luigi Santivetti <luigi.santivetti@imgtec.com>
Reviewed-by: Eric Engestrom <eric@engestrom.ch>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5707>

18 months agodri2: dri2_make_current() fold multiple if blocks
Luigi Santivetti [Tue, 30 Jun 2020 09:14:08 +0000 (10:14 +0100)]
dri2: dri2_make_current() fold multiple if blocks

dri2_make_current() has become long and convoluted. Address
this by folding together multiple if blocks checking for the
same variable.

Cc: mesa-stable
Signed-off-by: Luigi Santivetti <luigi.santivetti@imgtec.com>
Reviewed-by: Eric Engestrom <eric@engestrom.ch>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5707>

18 months agoaco: use nir_addition_might_overflow to combine additions into SMEM
Rhys Perry [Tue, 12 Nov 2019 17:51:34 +0000 (17:51 +0000)]
aco: use nir_addition_might_overflow to combine additions into SMEM

fossil-db (Navi):
Totals from 24656 (18.14% of 135946) affected shaders:
CodeSize: 120077160 -> 118877304 (-1.00%); split: -1.01%, +0.01%
Instrs: 23192657 -> 22979553 (-0.92%); split: -0.94%, +0.02%
VMEM: 165151115 -> 151861460 (-8.05%); split: +0.14%, -8.19%
SMEM: 18133265 -> 16709635 (-7.85%); split: +0.28%, -8.13%
VClause: 385011 -> 384447 (-0.15%); split: -0.16%, +0.02%
SClause: 954884 -> 838266 (-12.21%); split: -12.34%, +0.12%

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/2720>

18 months agonir: add nir_unsigned_upper_bound and nir_addition_might_overflow
Rhys Perry [Tue, 12 Nov 2019 17:51:19 +0000 (17:51 +0000)]
nir: add nir_unsigned_upper_bound and nir_addition_might_overflow

This adds a nir_unsigned_upper_bound() helper which does something similar
to nir_analyze_range() except it tries to obtain the largest possible
value instead of it's relation to zero.

It also adds nir_addition_might_overflow(), which uses this helper to try
to prove that an unsigned addition does not wrap around.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/2720>

18 months agoaco: add NUW flag
Rhys Perry [Tue, 15 Oct 2019 16:25:57 +0000 (17:25 +0100)]
aco: add NUW flag

This (combined with a pass to actually set the corresponding NIR flags)
should help fix a lot of the regressions from the SMEM addition combining
change.

fossil-db (Navi):
Totals from 12 (0.01% of 135946) affected shaders:
CodeSize: 12376 -> 12304 (-0.58%)
Instrs: 2436 -> 2422 (-0.57%)
VMEM: 1105 -> 1096 (-0.81%)
SClause: 133 -> 130 (-2.26%)

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/2720>

18 months agoaco: allow overflow for some SMEM instructions
Rhys Perry [Fri, 17 Jul 2020 14:01:41 +0000 (15:01 +0100)]
aco: allow overflow for some SMEM instructions

fossil-db (Navi):
Totals from 10184 (7.49% of 135946) affected shaders:
CodeSize: 83419748 -> 82430824 (-1.19%); split: -1.19%, +0.01%
Instrs: 16054612 -> 15908523 (-0.91%); split: -0.93%, +0.02%
VMEM: 1608018 -> 1581829 (-1.63%); split: +0.20%, -1.83%
SMEM: 577031 -> 563492 (-2.35%); split: +0.10%, -2.45%
VClause: 242643 -> 242512 (-0.05%); split: -0.06%, +0.00%
SClause: 640966 -> 569897 (-11.09%)

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/2720>

18 months agoaco: be more careful combining additions that could wrap into loads/stores
Rhys Perry [Tue, 15 Oct 2019 16:00:55 +0000 (17:00 +0100)]
aco: be more careful combining additions that could wrap into loads/stores

SMEM does the addition with 64-bits, not 32. So if the original code
relied on wrapping around (for example, for subtraction), it would break.

Apparently swizzled MUBUF accesses also have issues with combining
additions that could overflow. Normal MUBUF accesses seem fine.

fossil-db (Navi):
Totals from 27219 (20.02% of 135946) affected shaders:
CodeSize: 128303256 -> 131062756 (+2.15%); split: -0.00%, +2.15%
Instrs: 24818911 -> 25280558 (+1.86%); split: -0.01%, +1.87%
VMEM: 162311926 -> 177226874 (+9.19%); split: +9.36%, -0.17%
SMEM: 18182559 -> 20218734 (+11.20%); split: +11.53%, -0.34%
VClause: 423635 -> 424398 (+0.18%); split: -0.02%, +0.20%
SClause: 865384 -> 1104986 (+27.69%); split: -0.00%, +27.69%

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/2748
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/2720>

18 months agogitlab-ci/traces: updated paths and checksums for POLARIS10 traces
Andres Gomez [Wed, 8 Jul 2020 18:33:58 +0000 (21:33 +0300)]
gitlab-ci/traces: updated paths and checksums for POLARIS10 traces

Signed-off-by: Andres Gomez <agomez@igalia.com>
Reviewed-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5890>

18 months agogitlab-ci: get the last frame from a gfxr trace using gfxrecon-info
Andres Gomez [Mon, 13 Jul 2020 22:11:26 +0000 (01:11 +0300)]
gitlab-ci: get the last frame from a gfxr trace using gfxrecon-info

Signed-off-by: Andres Gomez <agomez@igalia.com>
Reviewed-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5890>

18 months agogitlab-ci: build gfxreconstruct from the "dev" branch
Andres Gomez [Wed, 1 Jul 2020 20:45:08 +0000 (23:45 +0300)]
gitlab-ci: build gfxreconstruct from the "dev" branch

We want to use the fix for
https://github.com/LunarG/gfxreconstruct/issues/328 while it is yet
not available in the "master" branch.

Additionally, we get the gfxreconstruct-info tool as an extra.

Signed-off-by: Andres Gomez <agomez@igalia.com>
Reviewed-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5890>

18 months agofreedreno: Use common guardband helper
Connor Abbott [Fri, 17 Jul 2020 13:18:33 +0000 (15:18 +0200)]
freedreno: Use common guardband helper

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5950>

18 months agotu: Use common guardband helper
Connor Abbott [Fri, 17 Jul 2020 13:18:15 +0000 (15:18 +0200)]
tu: Use common guardband helper

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5950>

18 months agofreedreno: Add a helper for computing guardband sizes
Connor Abbott [Fri, 17 Jul 2020 13:15:42 +0000 (15:15 +0200)]
freedreno: Add a helper for computing guardband sizes

This should be much better than the previous method that was more
guesswork-based than anything else. It returns a value within 1 of the
blob for every input value I've tested, and it seems like it returns
slightly better (but still legal) answers when it differs.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5950>

18 months agopanfrost: Remove unused batch_fence->ctx
Alyssa Rosenzweig [Mon, 20 Jul 2020 17:55:22 +0000 (13:55 -0400)]
panfrost: Remove unused batch_fence->ctx

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5995>

18 months agopanfrost: Remove unused batch_fence->signaled
Alyssa Rosenzweig [Mon, 20 Jul 2020 17:53:42 +0000 (13:53 -0400)]
panfrost: Remove unused batch_fence->signaled

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5995>

18 months agopanfrost: Allocate syncobjs in panfrost_flush
Alyssa Rosenzweig [Mon, 20 Jul 2020 17:34:42 +0000 (13:34 -0400)]
panfrost: Allocate syncobjs in panfrost_flush

For implementing panfrost_flush, it suffices to wait on only a single
syncobj, not an entire array of them. This lets us wait on it directly,
without coercing to/from syncfds in the middle (although some complexity
may be added later to support Android winsys).

Further, we should let the fence own the syncobj, tying together the
lifetimes and thus removing the connection between syncobjs and
batch_fence.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5995>

18 months agopanfrost: Skip specifying in_syncs
Alyssa Rosenzweig [Mon, 20 Jul 2020 15:55:25 +0000 (11:55 -0400)]
panfrost: Skip specifying in_syncs

With the current kernel UABI, there is no benefit to explicitly
specifiying dependencies, since the kernel by design adds implicit
dependencies to any referenced BOs. This is something we'd like to
address in the future, but efficient handling with future kernels will
require a tweaked design in userspace as well. So let's do the obvious
thing now, and extend later.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5995>

18 months agopanfrost: Remove wait parameter to flush_all_batches
Alyssa Rosenzweig [Mon, 20 Jul 2020 15:48:16 +0000 (11:48 -0400)]
panfrost: Remove wait parameter to flush_all_batches

It is always false now.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5995>

18 months agopanfrost: Avoid wait=true flushing all batches
Alyssa Rosenzweig [Mon, 20 Jul 2020 15:44:10 +0000 (11:44 -0400)]
panfrost: Avoid wait=true flushing all batches

What is intended is to flush the batches and wait on a particular BO at
a later time. Explicitly forcing a wait immediately is redundant.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5995>

18 months agoaco: implement b2i8/b2i16
Rhys Perry [Mon, 20 Jul 2020 18:21:20 +0000 (19:21 +0100)]
aco: implement b2i8/b2i16

Fixes lots of tests under dEQP-VK.spirv_assembly.type.*

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5993>

18 months agonv50/ir: initialize persampleInvocation to false
Karol Herbst [Tue, 21 Jul 2020 00:30:35 +0000 (02:30 +0200)]
nv50/ir: initialize persampleInvocation to false

Fixes: random KHR-GL45.sample_variables.mask.* fails
Fixes: 66ed9792edb702 ("nv50: Clear nv50_ir_prog_info of dead and codegen specific variables")
Signed-off-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6001>

18 months agonv50/ir/tgsi: silence warning about unhandled GS_INPUT_PRIM property
Karol Herbst [Mon, 20 Jul 2020 21:46:39 +0000 (23:46 +0200)]
nv50/ir/tgsi: silence warning about unhandled GS_INPUT_PRIM property

Fixes: 66ed9792edb702 ("nv50: Clear nv50_ir_prog_info of dead and codegen specific variables")
Signed-off-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6001>

18 months agoradv: disable CPU caching for the upload BO to reduce fetch latency
Samuel Pitoiset [Mon, 20 Jul 2020 11:47:19 +0000 (13:47 +0200)]
radv: disable CPU caching for the upload BO to reduce fetch latency

AMDGPU_GEM_CREATE_CPU_GTT_USWC should be faster when CPU reads
are unexpected (because they aren't cached).

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5978>

18 months agoradv: do not perform read-modify-write with the upload BO
Samuel Pitoiset [Mon, 20 Jul 2020 11:43:40 +0000 (13:43 +0200)]
radv: do not perform read-modify-write with the upload BO

To disable CPU caching.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5978>

18 months agoradv: replace discard with demote for Quantic Dream games
Rhys Perry [Mon, 20 Jul 2020 15:54:22 +0000 (16:54 +0100)]
radv: replace discard with demote for Quantic Dream games

Detroit: Become Human uses dFdx/dFdy immediately after a quad-divergent
discard, which can cause the image to become white.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Cc: <mesa-stable@lists.freedesktop.org>
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/3212
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5991>

18 months agoaco: always set FI on GFX10
Rhys Perry [Mon, 20 Jul 2020 16:19:40 +0000 (17:19 +0100)]
aco: always set FI on GFX10

bounds_ctrl is set to true by default which works around some game bugs,
but that isn't enough on GFX10.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5991>

18 months agoci: Set XDG_CACHE_HOME to tmpfs for bare-metal runners to avoid NFS.
Eric Anholt [Mon, 20 Jul 2020 17:46:51 +0000 (10:46 -0700)]
ci: Set XDG_CACHE_HOME to tmpfs for bare-metal runners to avoid NFS.

We don't want these files shared between builds (it'll get blown away by
the next rsync), and NFS will just increase our latency for hitting the
cache.

Drops a630 gles31 run from 11-17 minutes to 5.5.  Maximum cache size on a
run I've seen is 153M, which it seems we can easily spare.

Fixes: f97acb4bb4b1 ("freedreno/ir3: disk-cache support")
Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Reviewed-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5998>

18 months agogitlab-ci: Fix needs: of the arm64 LAVA test jobs
Tomeu Vizoso [Mon, 13 Jul 2020 15:20:28 +0000 (17:20 +0200)]
gitlab-ci: Fix needs: of the arm64 LAVA test jobs

They were still depending on arm_build, but the build of kernel and
rootfs has been moved to a separate job.

Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Reviewed-by: Daniel Stone <daniels@collabora.com>
Reviewed-By: Rohan Garg <rohan.garg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5472>

18 months agogitlab-ci: Upload tracie artifacts to MinIO
Tomeu Vizoso [Thu, 9 Jul 2020 20:29:39 +0000 (22:29 +0200)]
gitlab-ci: Upload tracie artifacts to MinIO

Upload failed images and the results.yml file to MinIO, to facilitate
debugging.

Also, fix version checking when git is installed as Mesa is going to
output a different renderer string if git is installed.

Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Reviewed-by: Daniel Stone <daniels@collabora.com>
Reviewed-By: Rohan Garg <rohan.garg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5472>

18 months agogitlab-ci: Download traces from MinIO
Tomeu Vizoso [Thu, 9 Jul 2020 10:42:02 +0000 (12:42 +0200)]
gitlab-ci: Download traces from MinIO

Downloading the traces directly from git causes very high egress from
GCE, which is expensive.

So we can expand trace testing further, we are going to keep a cache in
freedesktop.org's MinIO instance. This commit implements downloading
from it.

Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Reviewed-by: Daniel Stone <daniels@collabora.com>
Reviewed-By: Rohan Garg <rohan.garg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5472>

18 months agogitlab-ci: Replay traces on lava devices
Rohan Garg [Tue, 28 Jan 2020 14:19:53 +0000 (15:19 +0100)]
gitlab-ci: Replay traces on lava devices

Submit lava jobs to replay traces on Veyron (Mali T760) and Kevin (Mali
T860) boards.

Signed-off-by: Rohan Garg <rohan.garg@collabora.com>
Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Acked-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Daniel Stone <daniels@collabora.com>
Reviewed-By: Rohan Garg <rohan.garg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5472>

18 months agoiris: Fix CCS check in iris_texture_subdata().
Kenneth Graunke [Tue, 21 Jul 2020 00:08:46 +0000 (17:08 -0700)]
iris: Fix CCS check in iris_texture_subdata().

The intention here was to check "Would the GPU be able to compress
this if we used the PBO-based texture upload path?"  Prior to Gen12,
that meant checking for CCS_E.  On Gen12, there are a lot more types
of compression, and basic CCS_E was replaced by GEN12_CCS_E, making
this check simply not work, so we'd take the CPU path instead.

Instead, check if it has CCS, and isn't the basic "fast clear" CCS_D.

Fixes: 39f06e28485 ("iris: Implement pipe->texture_subdata directly")
Tested-by: Mark Janes <mark.a.janes@intel.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6005>

18 months agonir/lower_int64: lower 64-bit amul
Rhys Perry [Wed, 1 Jul 2020 15:14:16 +0000 (16:14 +0100)]
nir/lower_int64: lower 64-bit amul

Fixes an issue with Renderdoc's shader debugging with ACO.

If nir_opt_algebraic isn't called in-between nir_lower_explicit_io and
nir_lower_int64, we can end up with 64-bit multiplications.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Fixes: 6320e37d4be ('nir: add amul instruction')
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5709>

18 months agoanv: Advertise support for VK_EXT_shader_atomic_float
Jason Ekstrand [Tue, 19 May 2020 15:26:58 +0000 (10:26 -0500)]
anv: Advertise support for VK_EXT_shader_atomic_float

We already have all of the shader code for load/store/exchange.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5992>

18 months agointel/fs: Use the correct logical op for global float atomics
Jason Ekstrand [Tue, 14 Jul 2020 19:40:35 +0000 (14:40 -0500)]
intel/fs: Use the correct logical op for global float atomics

Fixes: e644ed468f98 "intel/fs: Implement nir_intrinsic_global_atomic_*"
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5992>

18 months agospirv: Add support for SPV_EXT_shader_atomic_float
Jason Ekstrand [Tue, 19 May 2020 15:19:55 +0000 (10:19 -0500)]
spirv: Add support for SPV_EXT_shader_atomic_float

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5992>

18 months agospirv: Update headers and grammar json
Jason Ekstrand [Mon, 20 Jul 2020 14:53:33 +0000 (09:53 -0500)]
spirv: Update headers and grammar json

This pulls in commit 63cb1fc131573fa from KhronosGroup/SPIRV-Headers

Acked-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Acked-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5992>

18 months agoegl: inline _EGLAPI into _EGLDriver
Eric Engestrom [Mon, 20 Jul 2020 11:38:24 +0000 (13:38 +0200)]
egl: inline _EGLAPI into _EGLDriver

_EGLDriver was an empty wrapper around _EGLAPI, so let's only keep one
of them. "driver" represents better what's being accessed, so that's the
one we're keeping.

Signed-off-by: Eric Engestrom <eric@engestrom.ch>
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5987>

18 months agoradeonsi: Inhibit clock-gating for perf counters.
Bas Nieuwenhuizen [Sun, 19 Jul 2020 23:43:18 +0000 (01:43 +0200)]
radeonsi: Inhibit clock-gating for perf counters.

Otherwise most counters return 0. Should be much more user friendly
than having to totally disable clock-gating on the kernel cmdline.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5972>

18 months agoamd/registers: add RLC_PERFMON_CLK_CNTL for pre-GFX10
Bas Nieuwenhuizen [Sun, 19 Jul 2020 23:37:11 +0000 (01:37 +0200)]
amd/registers: add RLC_PERFMON_CLK_CNTL for pre-GFX10

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5972>

18 months agoanv: Advertise VK_EXT_image_robustness
Jason Ekstrand [Tue, 9 Jun 2020 15:59:16 +0000 (10:59 -0500)]
anv: Advertise VK_EXT_image_robustness

We already support a superset of VK_EXT_image_robustness via
VK_EXT_robustness2.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5985>

18 months agofreedreno/ir3: Add missing ld_args_build_id to the ir3_delay unit test.
Eric Anholt [Mon, 20 Jul 2020 17:06:02 +0000 (10:06 -0700)]
freedreno/ir3: Add missing ld_args_build_id to the ir3_delay unit test.

It triggers the disk cache for me, and asserts abount not getting the
build id right.

Fixes: f97acb4bb4b1 ("freedreno/ir3: disk-cache support")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5989>

18 months agoradv: advertise VK_EXT_image_robustness
Samuel Pitoiset [Mon, 20 Jul 2020 12:54:58 +0000 (14:54 +0200)]
radv: advertise VK_EXT_image_robustness

All new dEQP-VK.robustness.image_robustness.* pass.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5979>

18 months agoci: bare-metal: use nginx to get results from DUT
Christian Gmeiner [Wed, 10 Jun 2020 12:44:17 +0000 (14:44 +0200)]
ci: bare-metal: use nginx to get results from DUT

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/2655
Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5661>

18 months agomesa: change error code of *TextureSubImage* for incorreect target
Yevhenii Kolesnikov [Thu, 16 Jul 2020 12:13:08 +0000 (15:13 +0300)]
mesa: change error code of *TextureSubImage* for incorreect target

According to the "Errors" list of the OpenGL 4.6 spec, section 8.6
"Alternate Texture Image Specification Commands":

An INVALID_OPERATION error is generated by *TextureSubImage* if the
effective target of texture does not match the command, as shown in table 8.15.

Signed-off-by: Yevhenii Kolesnikov <yevhenii.kolesnikov@globallogic.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5934>

18 months agofreedreno/ir3: Fix disasm of register offsets in ldp/stp.
Eric Anholt [Wed, 8 Jul 2020 20:38:18 +0000 (13:38 -0700)]
freedreno/ir3: Fix disasm of register offsets in ldp/stp.

I had a stp testcase that was getting its offset wrong, and by twiddling
bits and feeding it to qc disasm, I found that the comment was sort of
right: some the cat6a bits implicated in the old comment do get used, as
the high bits of the cat6c offset.  Reallocating those bits also fixes how
we were getting r960.y for r0.y.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5815>

18 months agofreedreno/ir3: Refactor cat6 general dst printing.
Eric Anholt [Wed, 8 Jul 2020 23:51:16 +0000 (16:51 -0700)]
freedreno/ir3: Refactor cat6 general dst printing.

We didn't need the extra branch and temp, we can move it inside of the dst
handling by just duplicating the print of the dst reg.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5815>

18 months agofreedreno/ir3: Add a bunch more tests for cat6 opcodes.
Eric Anholt [Wed, 8 Jul 2020 23:09:48 +0000 (16:09 -0700)]
freedreno/ir3: Add a bunch more tests for cat6 opcodes.

This started with making note of some ldp/stp instructions from the blob
and how we differ from them.  In the process of fixing it, I accidentally
modified behavior of other opcodes, and the other instructions listed will
keep us from doing that.  I also dropped an old stl test that looks like I
took from after a shader 'end' instruction.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5815>

18 months agofreedreno/ir3: Add a note about the instructions in the disasm test.
Eric Anholt [Wed, 8 Jul 2020 23:37:55 +0000 (16:37 -0700)]
freedreno/ir3: Add a note about the instructions in the disasm test.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5815>

18 months agovulkan: Update Vulkan XML and headers to 1.2.148
Jason Ekstrand [Mon, 20 Jul 2020 14:50:21 +0000 (09:50 -0500)]
vulkan: Update Vulkan XML and headers to 1.2.148

Acked-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Acked-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5983>

18 months agoci: Use FDO_CI_CONCURRENT as our -j flags when present in the runner env.
Eric Anholt [Fri, 26 Jun 2020 17:59:41 +0000 (10:59 -0700)]
ci: Use FDO_CI_CONCURRENT as our -j flags when present in the runner env.

fd.o has retuned the x86 runners on packet for -j8.  Rather than having to
tweak our CI every time fd.o decides to rebalance job concurrency, respect
what the runner admin has chosen for their builds (this will also be
convenient for people with large local runners).

Reviewed-by: Michel Dänzer <michel@daenzer.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5669>

18 months agonir/algebraic: fold some nested bcsel
Daniel Schürmann [Wed, 15 Jul 2020 17:31:22 +0000 (19:31 +0200)]
nir/algebraic: fold some nested bcsel

Totals from 14266 (10.62% of 134368) affected shaders (Polaris):
SGPRs: 761756 -> 762732 (+0.13%); split: -0.00%, +0.13%
VGPRs: 430392 -> 430924 (+0.12%); split: -0.05%, +0.17%
SpillSGPRs: 4652 -> 4628 (-0.52%); split: -0.60%, +0.09%
CodeSize: 30133000 -> 29949780 (-0.61%); split: -0.66%, +0.05%
MaxWaves: 102122 -> 102111 (-0.01%); split: +0.00%, -0.01%
Instrs: 5845085 -> 5841668 (-0.06%); split: -0.08%, +0.03%
Cycles: 69033140 -> 68889188 (-0.21%); split: -0.22%, +0.01%
VMEM: 8479021 -> 8474978 (-0.05%); split: +0.03%, -0.08%
SMEM: 831437 -> 830464 (-0.12%); split: +0.06%, -0.18%
VClause: 105411 -> 105410 (-0.00%); split: -0.01%, +0.01%
SClause: 327727 -> 327780 (+0.02%); split: -0.00%, +0.02%
Copies: 372704 -> 373306 (+0.16%); split: -0.16%, +0.32%
Branches: 112260 -> 112269 (+0.01%); split: -0.00%, +0.01%
PreSGPRs: 433308 -> 433631 (+0.07%); split: -0.01%, +0.09%
PreVGPRs: 397888 -> 397905 (+0.00%); split: -0.01%, +0.01%

Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4830>

18 months agonir/algebraic: propagate b2i out of ior/iand
Daniel Schürmann [Wed, 15 Jul 2020 17:30:34 +0000 (19:30 +0200)]
nir/algebraic: propagate b2i out of ior/iand

Totals from 761 (0.57% of 134368) affected shaders (Polaris):
SGPRs: 29496 -> 29488 (-0.03%)
SpillSGPRs: 41 -> 43 (+4.88%)
CodeSize: 1922036 -> 1882408 (-2.06%); split: -2.08%, +0.02%
Instrs: 366051 -> 360362 (-1.55%); split: -1.57%, +0.02%
Cycles: 7692516 -> 7661216 (-0.41%); split: -0.41%, +0.01%
VMEM: 365175 -> 365172 (-0.00%)
VClause: 15324 -> 15322 (-0.01%)
SClause: 9825 -> 9824 (-0.01%); split: -0.02%, +0.01%
Copies: 41216 -> 41294 (+0.19%); split: -0.01%, +0.20%
Branches: 7020 -> 7033 (+0.19%)
PreSGPRs: 22103 -> 22106 (+0.01%)
PreVGPRs: 26518 -> 26515 (-0.01%)

Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4830>

18 months agonir/algebraic: add distributive rules for ior/iand
Daniel Schürmann [Wed, 15 Jul 2020 17:23:54 +0000 (19:23 +0200)]
nir/algebraic: add distributive rules for ior/iand

Totals from 581 (0.43% of 134368) affected shaders (Polaris):
CodeSize: 1389560 -> 1386488 (-0.22%)
Instrs: 264488 -> 263984 (-0.19%)
Cycles: 1057952 -> 1055936 (-0.19%)
VMEM: 296016 -> 291613 (-1.49%)

Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4830>

18 months agonir/algebraic: optimize (a < 0.0) ? -a : a -> fabs(a)
Daniel Schürmann [Thu, 30 Apr 2020 09:58:08 +0000 (10:58 +0100)]
nir/algebraic: optimize (a < 0.0) ? -a : a -> fabs(a)

Totals from affected shaders: (VEGA)
SGPRS: 13920 -> 13920 (0.00 %)
VGPRS: 10252 -> 10252 (0.00 %)
Spilled SGPRs: 62 -> 62 (0.00 %)
Spilled VGPRs: 0 -> 0 (0.00 %)
Private memory VGPRs: 0 -> 0 (0.00 %)
Scratch size: 0 -> 0 (0.00 %) dwords per thread
Code Size: 587648 -> 587224 (-0.07 %) bytes
LDS: 5 -> 5 (0.00 %) blocks
Max Waves: 1489 -> 1489 (0.00 %)

Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4830>

18 months agonir/algebraic: optimize fmul(x, bcsel(c, -1.0, 1.0)) -> bcsel(c, -x, x)
Daniel Schürmann [Wed, 29 Apr 2020 14:38:54 +0000 (15:38 +0100)]
nir/algebraic: optimize fmul(x, bcsel(c, -1.0, 1.0)) -> bcsel(c, -x, x)

Totals from affected shaders: (VEGA)
SGPRS: 545712 -> 545712 (0.00 %)
VGPRS: 413092 -> 413116 (0.01 %)
Spilled SGPRs: 10616 -> 10616 (0.00 %)
Spilled VGPRs: 0 -> 0 (0.00 %)
Private memory VGPRs: 0 -> 0 (0.00 %)
Scratch size: 0 -> 0 (0.00 %) dwords per thread
Code Size: 37031684 -> 36984248 (-0.13 %) bytes
LDS: 427 -> 427 (0.00 %) blocks
Max Waves: 54350 -> 54340 (-0.02 %)

Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4830>

18 months agonir/algebraic: add some more unop + bcsel optimizations
Daniel Schürmann [Wed, 29 Apr 2020 17:50:27 +0000 (18:50 +0100)]
nir/algebraic: add some more unop + bcsel optimizations

Totals from affected shaders: (VEGA)
SGPRS: 284392 -> 284400 (0.00 %)
VGPRS: 261080 -> 261076 (-0.00 %)
Spilled SGPRs: 105 -> 105 (0.00 %)
Spilled VGPRs: 0 -> 0 (0.00 %)
Private memory VGPRs: 0 -> 0 (0.00 %)
Scratch size: 0 -> 0 (0.00 %) dwords per thread
Code Size: 24698596 -> 24277788 (-1.70 %) bytes
LDS: 196 -> 196 (0.00 %) blocks
Max Waves: 10101 -> 10105 (0.04 %)

Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4830>