mesa.git
20 months agoutil/test: Use MAX_PATH on Windows
Daniel Stone [Thu, 26 Mar 2020 13:01:58 +0000 (13:01 +0000)]
util/test: Use MAX_PATH on Windows

Windows provides MAX_PATH rather than PATH_MAX for the maximum allowable
path length. This is not a limit on the length of filename which can
exist on the filesystem, but a length on the length of path which can be
passed to Win32 API calls.

Signed-off-by: Daniel Stone <daniels@collabora.com>
Reviewed-by: Eric Engestrom <eric@engestrom.ch>
Fixes: f8f1413070a ("util/u_process: add util_get_process_exec_path")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4304>

20 months agoutil: fix process_test path
Pierre-Eric Pelloux-Prayer [Thu, 26 Mar 2020 13:07:39 +0000 (14:07 +0100)]
util: fix process_test path

Make sure we only use winepath when needed.

Reviewed-by: Daniel Stone <daniels@collabora.com>
Reviewed-by: Eric Engestrom <eric@engestrom.ch>
Fixes: f8f1413070a ("util/u_process: add util_get_process_exec_path")
Closes: https://gitlab.freedesktop.org/mesa/mesa/issues/2690
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4304>

20 months agogitlab-ci: Disable jobs for Collabora's LAVA lab
Tomeu Vizoso [Fri, 27 Mar 2020 08:25:17 +0000 (09:25 +0100)]
gitlab-ci: Disable jobs for Collabora's LAVA lab

The lab is going down for a few hours to upgrade the LAVA installation
to the latest stable release.

Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4342>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4342>

20 months agonir: fix packing of TCS varyings not read by the TES
Timothy Arceri [Thu, 26 Mar 2020 01:23:23 +0000 (12:23 +1100)]
nir: fix packing of TCS varyings not read by the TES

Unlike other stages TCS outputs not read by the TES cannot always
be demoted to globals e.g. when they are read by other TCS
invocations.

We were not taking these outputs into account when packing which
could result in other outputs being assigned to the same location.

Here we make sure to gather information on these outputs and group
them together when packing.

This fixes rendering issues in QUBE 2 via Proton.

Closes: #2653
Fixes: 26aa460940f6 ("nir: rewrite varying component packing")
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4328>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4328>

20 months agoglsl: fix varying packing for 64bit integers
Timothy Arceri [Thu, 26 Mar 2020 08:03:51 +0000 (19:03 +1100)]
glsl: fix varying packing for 64bit integers

Without this we can incorrectly end up marking things as making
use of ARB_enhanced_layouts style packing.

Cc: 19.3 20.0 <mesa-stable@lists.freedesktop.org>
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4328>

20 months agoac/nir: use llvm.amdgcn.rcp in ac_build_fdiv()
Samuel Pitoiset [Thu, 26 Mar 2020 10:40:35 +0000 (11:40 +0100)]
ac/nir: use llvm.amdgcn.rcp in ac_build_fdiv()

Instead of emitting 1.0 / x which includes a slow division that
LLVM doesn't always optimize even if the metadata is correctly set.

No pipeline-db changes with VEGA10/LLVM 9.

pipeline-db (VEGA10/LLVM 10):
Totals from affected shaders:
SGPRS: 6672 -> 6672 (0.00 %)
VGPRS: 6652 -> 6652 (0.00 %)
Spilled SGPRs: 0 -> 0 (0.00 %)
Spilled VGPRs: 0 -> 0 (0.00 %)
Code Size: 561780 -> 561692 (-0.02 %) bytes
Max Waves: 1043 -> 1043 (0.00 %)

pipeline-db (VEGA10/LLVM 11 - 92744f62478):
Totals from affected shaders:
SGPRS: 84608 -> 83768 (-0.99 %)
VGPRS: 106768 -> 106636 (-0.12 %)
Spilled SGPRs: 1625 -> 1713 (5.42 %)
Spilled VGPRs: 0 -> 0 (0.00 %)
Code Size: 10850936 -> 10726712 (-1.14 %) bytes
Max Waves: 3152 -> 3180 (0.89 %)

LLVM 11 (master) is more affected than previous versions, but
based on the small impact with LLVM 9/10, I decided to emit it
unconditionally.

Cc: 20.0 <mesa-stable@lists.freedesktop.org>
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4326>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4326>

20 months agoac/nir: use llvm.amdgcn.rsq for nir_op_frsq
Samuel Pitoiset [Wed, 25 Mar 2020 17:17:38 +0000 (18:17 +0100)]
ac/nir: use llvm.amdgcn.rsq for nir_op_frsq

Instead of emitting 1.0 / sqrt(x) which includes a slow division that
LLVM doesn't always optimize even if the metadata is correctly set.

pipeline-db (VEGA10/LLVM 9):
Totals from affected shaders:
SGPRS: 16872 -> 16864 (-0.05 %)
VGPRS: 15320 -> 15464 (0.94 %)
Spilled SGPRs: 2021 -> 2133 (5.54 %)
Code Size: 1915464 -> 1917476 (0.11 %) bytes
Max Waves: 641 -> 639 (-0.31 %)

pipeline-db (VEGA10/LLVM 10):
Totals from affected shaders:
SGPRS: 43936 -> 44120 (0.42 %)
VGPRS: 41776 -> 41972 (0.47 %)
Spilled SGPRs: 875 -> 875 (0.00 %)
Code Size: 4468164 -> 4468120 (-0.00 %) bytes
Max Waves: 2412 -> 2414 (0.08 %)

pipeline-db (VEGA10/LLVM 11 - 92744f62478):
Totals from affected shaders:
SGPRS: 60096 -> 60096 (0.00 %)
VGPRS: 63552 -> 63648 (0.15 %)
Spilled SGPRs: 6135 -> 6117 (-0.29 %)
Spilled VGPRs: 0 -> 0 (0.00 %)
Code Size: 6252996 -> 6249772 (-0.05 %) bytes
Max Waves: 2324 -> 2337 (0.56 %)

LLVM 11 (master) is more affected than previous versions, but
based on the small impact with LLVM 9/10, I decided to emit it
unconditionally.

Cc: 20.0 <mesa-stable@lists.freedesktop.org>
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4326>

20 months agoac/nir: use llvm.amdgcn.rcp for nir_op_frcp
Samuel Pitoiset [Wed, 25 Mar 2020 17:17:06 +0000 (18:17 +0100)]
ac/nir: use llvm.amdgcn.rcp for nir_op_frcp

Instead of emitting 1.0 / x which includes a slow division that
LLVM doesn't always optimize even if the metadata is correctly set.

pipeline-db (VEG10/LLVM 9):
Totals from affected shaders:
SGPRS: 50384 -> 50312 (-0.14 %)
VGPRS: 42572 -> 42696 (0.29 %)
Spilled SGPRs: 1372 -> 1372 (0.00 %)
Code Size: 5692040 -> 5691428 (-0.01 %) bytes
Max Waves: 3954 -> 3951 (-0.08 %)

pipeline-db (VEG10/LLVM 10):
Totals from affected shaders:
SGPRS: 78512 -> 78464 (-0.06 %)
VGPRS: 62408 -> 62484 (0.12 %)
Spilled SGPRs: 1502 -> 1502 (0.00 %)
Code Size: 8106188 -> 8103372 (-0.03 %) bytes
Max Waves: 7759 -> 7753 (-0.08 %)

pipeline-db (VEGA10/LLVM 11 - 92744f62478):
Totals from affected shaders:
SGPRS: 112760 -> 113232 (0.42 %)
VGPRS: 111132 -> 110568 (-0.51 %)
Spilled SGPRs: 5870 -> 5940 (1.19 %)
Spilled VGPRs: 650 -> 652 (0.31 %)
Code Size: 11887232 -> 11561744 (-2.74 %) bytes
Max Waves: 8964 -> 9015 (0.57 %)

LLVM 11 (master) is more affected than previous versions, but
based on the small impact with LLVM 9/10, I decided to emit it
unconditionally.

Cc: 20.0 <mesa-stable@lists.freedesktop.org>
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4326>

20 months agox86: Add ENDBR at function entries
H.J. Lu [Tue, 18 Feb 2020 22:05:39 +0000 (14:05 -0800)]
x86: Add ENDBR at function entries

Intel Control-flow Enforcement Technology (CET):

https://software.intel.com/en-us/articles/intel-sdm

contains shadow stack (SHSTK) and indirect branch tracking (IBT).
When IBT is enabled, all indirect branch targets must start with
ENDBR instruction which is a NOP on non-CET processors.

Closes: https://gitlab.freedesktop.org/mesa/mesa/issues/2538
Acked-by: Matt Turner <mattst88@gmail.com>
Reviewed-by: Dave Airlie <airlied@redhat.com>
Reviewed-by: Ben Widawsky <ben.widawsky@intel.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3865>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3865>

20 months agomesa: try to fix the android build
Marek Olšák [Thu, 26 Mar 2020 04:30:53 +0000 (00:30 -0400)]
mesa: try to fix the android build

Fixes: 8a3e2cd9b26
Closes: #2685
Acked-by: Tapani Pälli <tapani.palli@intel.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4325>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4325>

20 months agointel/fs/gen12: Fix interaction of SWSB dependency combination with EU fusion workaround.
Francisco Jerez [Thu, 19 Mar 2020 20:08:56 +0000 (13:08 -0700)]
intel/fs/gen12: Fix interaction of SWSB dependency combination with EU fusion workaround.

This has been reported to fix a hang in Shadow of Mordor on Gen12.
One of its compute shaders seems to cause an in-order exec_all
dependency to be merged into an out-of-order SET dependency slot,
which would prevent us from baking the SET dependency into the parent
instruction, leading to an assert failure in emit_inst_dependencies()
(Thanks to Rafael for noticing that).  Prevent that by avoiding
combination of in-order dependencies whenever that would cause a SET
dependency to be demoted to a SYNC.NOP instruction.

Fixes: e14529ff3262a527 "intel/fs/gen12: Workaround data coherency issues due to broken NoMask control flow."
Tested-by: Rafael Antognolli <rafael.antognolli@intel.com>
Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
20 months agox86_init_func_common: Add ENDBR at function entry
H.J. Lu [Thu, 27 Feb 2020 17:18:37 +0000 (09:18 -0800)]
x86_init_func_common: Add ENDBR at function entry

Intel Control-flow Enforcement Technology (CET):

https://software.intel.com/en-us/articles/intel-sdm

when IBT is enabled, all indirect branch targets must start with ENDBR
instruction which is a NOP on non-CET processors.

Closes: https://gitlab.freedesktop.org/mesa/mesa/issues/2575
Acked-by: Matt Turner <mattst88@gmail.com>
Reviewed-by: Ben Widawsky <ben.widawsky@intel.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3985>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3985>

20 months agointel/aub_viewer: Fix format specifier for uint64_t
Danylo Piliaiev [Thu, 26 Mar 2020 12:07:46 +0000 (14:07 +0200)]
intel/aub_viewer: Fix format specifier for uint64_t

Use PRIx64 instead of lx for uint64_t

Closes: https://gitlab.freedesktop.org/mesa/mesa/issues/2692
Signed-off-by: Danylo Piliaiev <danylo.piliaiev@globallogic.com>
Reviewed-by: Sagar Ghuge <sagar.ghuge@intel.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4331>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4331>

20 months agopanfrost: Extend the tiled store fast-path to loads
Icecream95 [Wed, 25 Mar 2020 08:05:16 +0000 (21:05 +1300)]
panfrost: Extend the tiled store fast-path to loads

The access functions are forced to be inline, so performance shouldn't
be impacted for stores.

WebGL performance in Firefox is more than doubled, and track loading
in STK is noticeably faster.

Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4317>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4317>

20 months agomesa/format_utils: Add a fast-path for RGBA to BGRA
Icecream95 [Wed, 25 Mar 2020 07:01:08 +0000 (20:01 +1300)]
mesa/format_utils: Add a fast-path for RGBA to BGRA

This is similar to an existing fast-path, but this is for an array
source while the existing one is for an array destination.

Firefox can hit this case for WebGL when GL compositing is not used.
For a WebGL sample on the Panfrost driver, the frame-rate increased
from 19.4 fps to 20.6 fps, which is a 6% gain.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4315>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4315>

20 months agoglsl: set error_emitted true if type not ok for assignment
Tapani Pälli [Sat, 14 Mar 2020 06:57:02 +0000 (08:57 +0200)]
glsl: set error_emitted true if type not ok for assignment

Patch changes also existing assert to not trigger when we have
error types in assignment.

v2: simplify, cleanup (Ian)

Closes: https://gitlab.freedesktop.org/mesa/mesa/issues/2629
Fixes: d1fa69ed61d ("glsl: do not attempt assignment if operand type not parsed correctly")
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4178>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4178>

20 months agogitlab-ci: Fix traces caching in tracie
Alexandros Frantzis [Tue, 24 Mar 2020 14:34:05 +0000 (16:34 +0200)]
gitlab-ci: Fix traces caching in tracie

We are currently comparing a hex string representation of the git lfs
OID with a byte array representation of the locally calculated OID,
causing detection of valid cached traces to fail. Ensure we are
comparing compatible representations (in this case hex strings).

Signed-off-by: Alexandros Frantzis <alexandros.frantzis@collabora.com>
Reviewed-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4300>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4300>

20 months agovtn/opencl: add rint-support
Boris Brezillon [Tue, 17 Mar 2020 13:38:44 +0000 (13:38 +0000)]
vtn/opencl: add rint-support

Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4318>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4318>

20 months agovtn/opencl: add native exp2/log2-support
Erik Faye-Lund [Wed, 25 Mar 2020 20:19:01 +0000 (21:19 +0100)]
vtn/opencl: add native exp2/log2-support

Reviewed-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4318>

20 months agovtn/opencl: add native exp10/log10-support
Erik Faye-Lund [Fri, 13 Mar 2020 11:36:19 +0000 (12:36 +0100)]
vtn/opencl: add native exp10/log10-support

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4318>

20 months agovtn/opencl: add native exp/log-support
Erik Faye-Lund [Fri, 13 Mar 2020 10:57:52 +0000 (11:57 +0100)]
vtn/opencl: add native exp/log-support

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4318>

20 months agocompiler/nir: move build_log helper into builtin-builder
Erik Faye-Lund [Thu, 12 Mar 2020 14:58:04 +0000 (15:58 +0100)]
compiler/nir: move build_log helper into builtin-builder

Reviewed-by: Karol Herbst <kherbst@redhat.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4318>

20 months agocompiler/nir: move build_exp helper into builtin-builder
Erik Faye-Lund [Thu, 12 Mar 2020 14:00:37 +0000 (15:00 +0100)]
compiler/nir: move build_exp helper into builtin-builder

Reviewed-by: Karol Herbst <kherbst@redhat.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4318>

20 months agovtn/opencl: fully enable OpenCLstd_Clz
Erik Faye-Lund [Tue, 10 Mar 2020 17:19:15 +0000 (18:19 +0100)]
vtn/opencl: fully enable OpenCLstd_Clz

Fixes: 7325f6ac987 ("vtn/opencl: add clz support")
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4318>

20 months agogitlab-ci: re-enable mali400/450 and t820 jobs
Neil Armstrong [Wed, 25 Mar 2020 16:06:18 +0000 (17:06 +0100)]
gitlab-ci: re-enable mali400/450 and t820 jobs

The FILES_HOST_NAME and FILES_HOST_URL are in the baylibre's runner
environment to make it more flexible.

Also use the new aarch64 mesa-ci-aarch64-lava-baylibre runner with
embedded nginx server to serve the LAVA artifacts.

Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Reviewed-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4295>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4295>

20 months agogitlab-ci: add FILES_HOST_URL and move FILES_HOST_NAME into jobs
Neil Armstrong [Wed, 25 Mar 2020 16:05:46 +0000 (17:05 +0100)]
gitlab-ci: add FILES_HOST_URL and move FILES_HOST_NAME into jobs

The FILES_HOST_URL & FILES_HOST_NAME will be in the Baylibre's runner
environment, move them into the t860/t720/t760 jobs using Collabora's
runner.

Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Reviewed-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4295>

20 months agogitlab-ci: Serve files for LAVA via separate service
Tomeu Vizoso [Tue, 24 Mar 2020 11:58:43 +0000 (12:58 +0100)]
gitlab-ci: Serve files for LAVA via separate service

Currently, we store the kernel and ramdisk for each LAVA job in the
artifacts of the job that built them. Because artifacts are stored in
GCE and LAVA labs aren't, this causes a lot of egress with is expensive.

To avoid this, have runners download most of the data via the (cached)
container images once, and for each job upload the kernel and ramdisk to
a server outside GCE.

Right now we only have Collabora's runner with a local web server, so
jobs that go to Baylibre's lab have been disabled.

Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4295>

20 months agogitlab-ci: Place files from the Mesa repo into the build tarball
Tomeu Vizoso [Tue, 24 Mar 2020 11:58:30 +0000 (12:58 +0100)]
gitlab-ci: Place files from the Mesa repo into the build tarball

There's some files from the .gitlab-ci directory that are needed in the
test stage and that, because the Mesa repository isn't checked out in
that stage, need to be made available through other means.

Because those files are going to be needed in LAVA devices, place them
ino the tarball containing the built files so it's available to both
gitlab-ci runners and LAVA devices.

Before those files were passed in the artifacts of the Gitlab CI job,
but this commit places them into the built tarball so scripts later in
the pipeline don't need to account for this discrepancy.

Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4295>

20 months agoradeonsi: enable full out-of-order drawing when allow_draw_out_of_order is set
Marek Olšák [Mon, 23 Mar 2020 18:50:53 +0000 (14:50 -0400)]
radeonsi: enable full out-of-order drawing when allow_draw_out_of_order is set

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4152>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4152>

20 months agomesa: allow out-of-order drawing to optimize immediate mode if it's safe
Marek Olšák [Thu, 30 Jan 2020 23:56:22 +0000 (18:56 -0500)]
mesa: allow out-of-order drawing to optimize immediate mode if it's safe

This increases performance by 11-13% in Viewperf11/Catia - first scene.

Set allow_draw_out_of_order=true to enable this.

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4152>

20 months agoglsl_to_tgsi: set shader_info::writes_memory
Marek Olšák [Wed, 11 Mar 2020 03:33:46 +0000 (23:33 -0400)]
glsl_to_tgsi: set shader_info::writes_memory

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4152>

20 months agonir: add and gather shader_info::writes_memory
Marek Olšák [Wed, 11 Mar 2020 03:27:35 +0000 (23:27 -0400)]
nir: add and gather shader_info::writes_memory

for out-of-order drawing.

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4152>

20 months agoradeonsi: Stop exposing PIPE_SHADER_CAP_FP16
Kristian H. Kristensen [Wed, 25 Mar 2020 17:06:32 +0000 (10:06 -0700)]
radeonsi: Stop exposing PIPE_SHADER_CAP_FP16

Not fully supported.

Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4321>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4321>

20 months agoutil/u_process: Add util_get_process_exec_path for macOS.
Vinson Lee [Tue, 24 Mar 2020 22:20:36 +0000 (15:20 -0700)]
util/u_process: Add util_get_process_exec_path for macOS.

Fixes: f8f1413070ae ("util/u_process: add util_get_process_exec_path")
Closes: https://gitlab.freedesktop.org/mesa/mesa/issues/2682
Signed-off-by: Vinson Lee <vlee@freedesktop.org>
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4313>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4313>

20 months agofreedreno: ssbo: mark resource read or written depending on usage
Christian Gmeiner [Fri, 13 Sep 2019 06:33:38 +0000 (08:33 +0200)]
freedreno: ssbo: mark resource read or written depending on usage

Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Reviewed-by: Rob Clark <robdclark@chromium.org>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/1963>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/1963>

20 months agofreedreno: ssbo: keep track if a buffer gets written
Christian Gmeiner [Fri, 13 Sep 2019 06:24:33 +0000 (08:24 +0200)]
freedreno: ssbo: keep track if a buffer gets written

Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Reviewed-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/1963>

20 months agofreedreno: simplify fd_set_shader_buffers(..)
Christian Gmeiner [Fri, 13 Sep 2019 06:20:46 +0000 (08:20 +0200)]
freedreno: simplify fd_set_shader_buffers(..)

Clear the modified bits for enabled_mask and then iterate over the
whole range and set the specific bit where there is a buffer.

Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Reviewed-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/1963>

20 months agofreedreno: calculate modified bit mask only once
Christian Gmeiner [Fri, 13 Sep 2019 06:09:24 +0000 (08:09 +0200)]
freedreno: calculate modified bit mask only once

Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Reviewed-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/1963>

20 months agogallium/util: Add back (and rename) util_float_to_half implementation
Roland Scheidegger [Tue, 24 Mar 2020 18:54:06 +0000 (19:54 +0100)]
gallium/util: Add back (and rename) util_float_to_half implementation

This implementation was removed by 8b8af6d3 ("gallium/util: Switch
util_float_to_half to _mesa_float_to_half()'s impl.")
It was not actually broken, but _mesa_float_to_half() implements
round-to-nearest-even, whereas util_float_to_half() implemented
round-to-zero. So rename it appropriately.
GL actually never cares about rounding (except a broken piglit test),
however d3d10 very much does and requires RTZ for float to half
conversion. Moreover, apparently at least radeon gpus actually always
do RTZ when doing RT writes (and I'd suspect for shader image writes
as well). Hence it seems appropriate to hook up this rtz function to
the format instead. This will cause llvmpipe and softpipe to use rtz
rounding for clears with half float formats, and softpipe would use rtz
behavior for rt writes as well (llvmpipe has that hardcoded), not sure
if "real" hw drivers hit this function for much.
(For shader opcodes would still need to figure out what rounding to use
appropriately, but this is a question for another day.)
Note should probably unify with _mesa_float_to_float16_rtz. Unclear at
this point which one is better, so just restore previous function here.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4312>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4312>

20 months agoetnaviv: Emit PE.ALPHA_COLOR_EXT* on GPUs with half-float support
Marek Vasut [Sun, 22 Mar 2020 02:48:05 +0000 (03:48 +0100)]
etnaviv: Emit PE.ALPHA_COLOR_EXT* on GPUs with half-float support

At least GC880 (iMX6S), GC2000 (iMX6Q) blobs do not emit the
PE.ALPHA_COLOR_EXT0 and PE.ALPHA_COLOR_EXT1 into the command
stream. The GCnano (STM32MP1) is not affected by this change
either. This is because neither of these GPUs support the
half-float feature.

Emit PE.ALPHA_COLOR_EXT* in etnaviv only if half-float support
is present in the GPU. This fixes all of the currently failing
dEQPs in this group:
  dEQP-GLES2.functional.fragment_ops.blend.*

Fixes: 76adf041f25 ("etnaviv: fix blend color on newer GPUs")
Signed-off-by: Marek Vasut <marex@denx.de>
Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Reviewed-by: Jonathan Marek <jonathan@marek.ca>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4277>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4277>

20 months agogallivm: disable rgtc/latc SNORM accellerated fetches
Roland Scheidegger [Tue, 24 Mar 2020 20:56:40 +0000 (21:56 +0100)]
gallivm: disable rgtc/latc SNORM accellerated fetches

Unfortunately this appears to be bugged (it seems the piglit tests aren't
quite exhaustive enough). I'm almost certain it's the lerp
(lp_build_lerpdxta()) which doesn't handle signed numbers correctly, let's
disable for now.

Reviewed-by: Dave Airlie <airlied@redhat.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4311>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4311>

20 months agorbug: do not return void-value
Erik Faye-Lund [Tue, 24 Mar 2020 10:04:39 +0000 (11:04 +0100)]
rbug: do not return void-value

Returning a void-value is nonsensical, and in this case it seems like a
mistake.

This eliminates a warning when building on MSVC.

Fixes: fb04e5da97d ("gallium: add pipe_screen::finalize_nir")
Reviewed-by: Brian Paul <brianp@vmware.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4297>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4297>

20 months agorbug: clean up cast-warnings
Erik Faye-Lund [Tue, 24 Mar 2020 10:03:03 +0000 (11:03 +0100)]
rbug: clean up cast-warnings

Similarly to the previous cast; on 64-bit Windows, unsigned long is
32-bit, and casting a pointer to a non-matchin bit-width integer produce
warnings. So let's use uintpre_t for this purpose instead.

Reviewed-by: Brian Paul <brianp@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4297>

20 months agopipebuffer: clean up cast-warnings
Erik Faye-Lund [Tue, 24 Mar 2020 09:58:14 +0000 (10:58 +0100)]
pipebuffer: clean up cast-warnings

This code produces warnings, so let's fix that. The problem is that
casting a pointer to an integer of non-pointer-size triggers warnings on
MSVC, and on 64-bit Windows unsigned long is 32-bit large.

So let's instead use uintptr_t, which is exactly for these kinds of
things.

While we're at it, let's make the resulting index a plain "unsigned",
which is the type this originated from before we started with this
cast-dance.

Fixes: 1a66ead1c75 ("pipebuffer, winsys/svga: Add functionality to update pb_validate_entry flags")
Reviewed-by: Brian Paul <brianp@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4297>

20 months agovulkan/overlay: Add a workaround semaphore for application presenting without one
Lionel Landwerlin [Thu, 20 Feb 2020 12:29:22 +0000 (14:29 +0200)]
vulkan/overlay: Add a workaround semaphore for application presenting without one

When an application calls vkQueuePresent() on a different queue than
the one we run our drawing on and it doesn't give a semaphore to wait
on, let's insert our own semaphore so that we don't race the
application's drawing.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Closes: https://gitlab.freedesktop.org/mesa/mesa/issues/2540
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3893>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3893>

20 months agoac: fix ac_build_is_helper_invocation when postponed_kill is null
Pierre-Eric Pelloux-Prayer [Tue, 24 Mar 2020 15:32:11 +0000 (16:32 +0100)]
ac: fix ac_build_is_helper_invocation when postponed_kill is null

If there was no demote() in the shader, ac_build_is_helper_invocation
behaves exactly the same as ac_build_load_helper_invocation, i.e.
the helper lanes are the same as they were at the beginning of the shader.

Fixes: de57ea2a3da ("amd/llvm: implement nir_intrinsic_demote(_if) and nir_intrinsic_is_helper_invocation")
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4301>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4301>

20 months agonir: update uses_demote flag in discard_to_demote pass
Pierre-Eric Pelloux-Prayer [Tue, 24 Mar 2020 14:58:59 +0000 (15:58 +0100)]
nir: update uses_demote flag in discard_to_demote pass

Otherwise the ctx.ac.postponed_kill will not be allocated.

Fixes: ce87da71e93 ("nir: add pass to lower discard() to demote()")
Closes: https://gitlab.freedesktop.org/mesa/mesa/issues/2662
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4301>

20 months agoglsl/lower_precision: Lower builtins depending on arguments
Neil Roberts [Mon, 18 Nov 2019 16:05:54 +0000 (17:05 +0100)]
glsl/lower_precision: Lower builtins depending on arguments

When an ir_call is encountered that invokes a builtin, it will now try
to generate a lowered version of the builtin. This only happens if all
of the arguments to the function are lowerable. Previously the builtin
would be inlined before the lowering pass is invoked and then the
implementation would be lowered as a consequence of the pass. However
this causes problems if the builtin has multiple arguments and the
implementation has operations on only a few of the arguments before
combining it with the others. In that case the entire builtin should
only be lowered if all of the arguments are lower precision. The
previous approach would end up lowering only parts of the
implementation.

The lowered implementations are cached in a hash table in case they can
be reused.

Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Kristian H. Kristensen <hoegsberg@google.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3885>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3885>

20 months agoglsl: Inline builtins in a separate pass
Neil Roberts [Tue, 15 Oct 2019 14:20:26 +0000 (16:20 +0200)]
glsl: Inline builtins in a separate pass

Previously, the ir_call functions for builtin functions were replaced
with the inline implementation immediately after being added to the
instruction list. This patch replaces that with a separate pass that
lowers them after the conversion from AST to IR is complete. This will
be useful to be able to insert some handling for the precision lowering
pass before the inlining. This needs to happen because the precision
of the operations in the inlined implementation depends on the highest
precision of all of the arguments to the call.

Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Kristian H. Kristensen <hoegsberg@google.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3885>

20 months agofreedreno/ir3: enable nir_opt_loop_unroll on a6xx
Hyunjun Ko [Tue, 19 Nov 2019 07:20:10 +0000 (07:20 +0000)]
freedreno/ir3: enable nir_opt_loop_unroll on a6xx

If precision lowering happens at GLSL IR, loop_analysis at IR doesn't
work as expected since it can't handle things like:

"(expression bool < (expression float16_t f2fmp (var_ref ndx) ) (constant float16_t (1.000000)) )"

So we'd rather do this optimization at the NIR stage.

Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Kristian H. Kristensen <hoegsberg@google.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3885>

20 months agofreedreno/ir3: Lower bools to bitsize
Neil Roberts [Thu, 31 Jan 2019 15:19:36 +0000 (16:19 +0100)]
freedreno/ir3: Lower bools to bitsize

Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Kristian H. Kristensen <hoegsberg@google.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3885>

20 months agonir: add a bool bitsize lowering pass
Iago Toral Quiroga [Wed, 24 Oct 2018 07:25:29 +0000 (09:25 +0200)]
nir: add a bool bitsize lowering pass

The pass lowers 1-bit booleans produced by NIR to the native bitsize
of the operations that produce them.

v2: change on lower_load_const_instr after upstream changes. Added
    TODO2 to explain it, as it was not properly tested yet (see
    already existing TODO) (Neil)

Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Kristian H. Kristensen <hoegsberg@google.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3885>

20 months agofreedreno: Enable mediump lowering
Hyunjun Ko [Fri, 7 Jun 2019 08:48:34 +0000 (08:48 +0000)]
freedreno: Enable mediump lowering

Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Kristian H. Kristensen <hoegsberg@google.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3885>

20 months agoglsl: Add unit tests for the lower_precision pass
Neil Roberts [Fri, 4 Oct 2019 09:13:21 +0000 (05:13 -0400)]
glsl: Add unit tests for the lower_precision pass

Adds a unit tests script that invokes the standalone compiler with
--lower-precision and verifies that lowered operations are being used.

Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Kristian H. Kristensen <hoegsberg@google.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3885>

20 months agoglsl/standalone: Add an option to lower the precision
Neil Roberts [Thu, 3 Oct 2019 23:59:10 +0000 (19:59 -0400)]
glsl/standalone: Add an option to lower the precision

Adds a --lower-precision option that just sets the LowerPrecision
compiler option. That way it can be used in unit tests to test the
precision lowering pass.

Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Kristian H. Kristensen <hoegsberg@google.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3885>

20 months agoglsl: Add an IR lowering pass to convert mediump operations to 16-bit
Neil Roberts [Fri, 19 Apr 2019 13:36:58 +0000 (15:36 +0200)]
glsl: Add an IR lowering pass to convert mediump operations to 16-bit

This works by finding the first rvalue that it can lower using an
ir_rvalue_visitor. In that case it adds a conversion to float16
after each rvalue and a conversion back to float before storing
the assignment.

Also it uses a set to keep track of rvalues that have been
lowred already. The handle_rvalue method of the rvalue visitor doesn’t
provide any way to stop iteration. If we handle a value in
find_precision_visitor we want to be able to stop it from descending into
the lowered rvalue again.

Additionally this pass disallows converting nodes containing non-float.
The can_lower_rvalue function explicitly excludes any branches
that have non-float types except bools. This avoids the need to have
special handling for functions that convert to int or double.

Co-authored-by: Hyunjun Ko <zzoon@igalia.com>
v2. Adds lowering for texture samples

v3. Instead of checking whether each node can be lowered while walking the
tree, a separate tree walk is now done to check all of the nodes in a
single pass. The lowerable nodes are added to a set which is checked
during find_precision_visitor instead of calling can_lower_rvalue.

v4. Move the special case for temporaries to find_lowerable_rvalues. This
needs to be handled while checking for lowerable rvalues so that any
later dereferences of the variable will see the right precision.

v5. Add an override to visit ir_call instructions and apply the same
technique to override the precision of the temporary variable in the
same way as done for builtin temporaries and ir_assignment calls.

v6. Changes the pass so that it doesn’t need to lower an entire subtree in
order do perform a lowering. Instead, certain instructions can be
marked as being indepedent of their child instructions. For example,
this is the case with array dereferences. The precision of the array
index doesn’t have any bearing on whether things using the result of
the array deref can be lowered.

Now, only toplevel lowerable nodes are added to the lowerable_rvalues
instead instead of additionally adding all of the subnodes.

It now also only needs one hash table instead of two.

v7. Don’t try to lower sampler types. Instead, the sample instruction is
now treated as an independent point where the result of the sample can
be used in a lowered section. The precision of the sampler type
determines the precision of the sample instruction. This also means
the coordinates to the sampler can be lowered.

v8. Use f2fmp instead of f2f16.

v9.  Disable lowering derivatives calcualtions, which might not work
properly on some hw backends.

Reviewed-by: Kristian H. Kristensen <hoegsberg@google.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3885>

20 months agoglsl/hierarchical_visitor: Call leave_callback on leaf nodes
Neil Roberts [Wed, 2 Oct 2019 21:11:48 +0000 (17:11 -0400)]
glsl/hierarchical_visitor: Call leave_callback on leaf nodes

Previously for leaf ir_instructions only the enter callback was
called. This makes it a bit difficult to make a pass that wants to
visit every instruction using a stack. Making it call the leave
callback as well makes it behave less surprisingly.

Reviewed-by: Kristian H. Kristensen <hoegsberg@google.com>
Acked-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3885>

20 months agoglsl: Add a method to get precision from a deref instruction
Neil Roberts [Fri, 20 Sep 2019 16:04:15 +0000 (18:04 +0200)]
glsl: Add a method to get precision from a deref instruction

Adds ir_dereference::precision(). For a normal variable dereference,
the precision comes from the variable. For a record member it comes
from the field within the record. For an array it can come from
either, depending on where the underlying array is stored. The method
recursively walks the derefs until it finds one of the first two.

Reviewed-by: Kristian H. Kristensen <hoegsberg@google.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3885>

20 months agoi965/iris: fix crash when calling GetPerfQueryDataINTEL
Lionel Landwerlin [Tue, 24 Mar 2020 14:54:32 +0000 (16:54 +0200)]
i965/iris: fix crash when calling GetPerfQueryDataINTEL

On a query that was never begun.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Rafael Antognolli <rafael.antognolli@intel.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4302>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4302>

20 months agoglthread: compile marshal_generated.c faster by breaking it up into 8 files
Marek Olšák [Thu, 5 Mar 2020 23:08:58 +0000 (18:08 -0500)]
glthread: compile marshal_generated.c faster by breaking it up into 8 files

Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4270>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4270>

20 months agoglthread: declare marshal and unmarshal functions as non-static
Marek Olšák [Thu, 5 Mar 2020 21:21:00 +0000 (16:21 -0500)]
glthread: declare marshal and unmarshal functions as non-static

Declare them in the header file. Then we can split marshal_generated.c
into multiple files.

Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4270>

20 months agoglthread: inline SET_func and add -O1 to build _mesa_create_marshal_table faster
Marek Olšák [Mon, 23 Mar 2020 01:56:20 +0000 (21:56 -0400)]
glthread: inline SET_func and add -O1 to build _mesa_create_marshal_table faster

The compile time of marshal_generated.c improved from 30.1s to 12.4s.

Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4270>

20 months agoradv: enable VK_KHR_8bit_storage on GFX6-GFX7
Samuel Pitoiset [Tue, 24 Mar 2020 14:07:05 +0000 (15:07 +0100)]
radv: enable VK_KHR_8bit_storage on GFX6-GFX7

Enabling a Vulkan extension doesn't mean that all features need
to be implemented. DOOM Eternal crashes at launch if that ext
is not supported but it doesn't matter if the features are enabled
or not.

Let's enable it like we did for VK_KHR_16bit_storage.

Cc: 19.3 20.0 <mesa-stable@lists.freedesktop.org>
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4299>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4299>

20 months agoutil/u_process: fix Windows build
Pierre-Eric Pelloux-Prayer [Tue, 24 Mar 2020 15:12:26 +0000 (16:12 +0100)]
util/u_process: fix Windows build

Reported by Brian Paul.

Fixes: f8f1413070a ("util/u_process: add util_get_process_exec_path")
Reviewed-by: Brian Paul <brianp@vmware.com>
Reviewed-by: Daniel Stone <daniels@collabora.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4303>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4303>

20 months agopan/bi: Rewrite aligned vectors as well
Alyssa Rosenzweig [Mon, 23 Mar 2020 21:07:27 +0000 (17:07 -0400)]
pan/bi: Rewrite aligned vectors as well

This still isn't optimal, but it handles another common case where we
have a vector "prefix" and can rewrite directly. The last case is one
where writemasks and such would start coming into play and - for the
moment - is not worth the hike in complexity.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4288>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4288>

20 months agopan/bi: Lower combines to rewrites for scalars
Alyssa Rosenzweig [Mon, 23 Mar 2020 20:48:58 +0000 (16:48 -0400)]
pan/bi: Lower combines to rewrites for scalars

This avoids unneeded moves for scalars. It still generates suboptimal
code for vectors, however.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4288>

20 months agopan/bi: Ingest vecN directly (again)
Alyssa Rosenzweig [Sun, 22 Mar 2020 21:31:23 +0000 (17:31 -0400)]
pan/bi: Ingest vecN directly (again)

Last time, I swear. We still generate writemasks but SSA-like ones and
do the lowering ourselves.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4288>

20 months agoturnip: implement depth clamp
Jonathan Marek [Tue, 24 Mar 2020 01:37:25 +0000 (21:37 -0400)]
turnip: implement depth clamp

Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4293>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4293>

20 months agoturnip: fix znear clipping
Jonathan Marek [Tue, 24 Mar 2020 01:33:36 +0000 (21:33 -0400)]
turnip: fix znear clipping

Vulkan clips znear at 0 instead of -1.

Fixes dEQP-VK.draw.inverted_depth_ranges.nodepthclamp_*

Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4293>

20 months agofreedreno/registers: more GRAS_CL_CNTL bits, Z_CLAMP
Jonathan Marek [Tue, 24 Mar 2020 01:21:11 +0000 (21:21 -0400)]
freedreno/registers: more GRAS_CL_CNTL bits, Z_CLAMP

Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4293>

20 months agoaco: implement 64-bit VGPR constant copies in handle_operands()
Rhys Perry [Fri, 20 Mar 2020 16:07:08 +0000 (16:07 +0000)]
aco: implement 64-bit VGPR constant copies in handle_operands()

64-bit VGPR constant copies can happen because of 64-bit constant copy
propagation. Since this optimization is beneficial and more annoying to
deal with in the optimizer, I've implemented 64-bit VGPR constant copies
in handle_operands().

This also sets copy_operation::size correctly for 64-bit constant copies.

Cc: 20.0 <mesa-stable@lists.freedesktop.org>
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4260>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4260>

20 months agoaco: remove dead code in handle_operands()
Rhys Perry [Mon, 23 Mar 2020 20:44:27 +0000 (20:44 +0000)]
aco: remove dead code in handle_operands()

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4260>

20 months agonir/gather_info: fix per-vertex handling in try_mask_partial_io
Rhys Perry [Wed, 11 Mar 2020 20:22:38 +0000 (20:22 +0000)]
nir/gather_info: fix per-vertex handling in try_mask_partial_io

pipeline-db (Navi, ACO):
Totals from affected shaders:
SGPRS: 6432 -> 6432 (0.00 %)
VGPRS: 11924 -> 11924 (0.00 %)
Spilled SGPRs: 0 -> 0 (0.00 %)
Spilled VGPRs: 0 -> 0 (0.00 %)
Scratch size: 1596 -> 1596 (0.00 %) dwords per thread
Code Size: 575524 -> 518620 (-9.89 %) bytes
LDS: 12187 -> 12187 (0.00 %) blocks
Max Waves: 2695 -> 2695 (0.00 %)

Helps a few hundred Dark Souls 3 shaders.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
CC: <mesa-stable@lists.freedesktop.org>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4190>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4190>

20 months agoradeonsi: enable workarounds for YoYo engine based games
Pierre-Eric Pelloux-Prayer [Fri, 13 Mar 2020 13:24:51 +0000 (14:24 +0100)]
radeonsi: enable workarounds for YoYo engine based games

Without the radeonsi_sync_compile option the games crashes at
startup.
The engine seems to be using a custom global new operator and
it doesn't plays well with multithreading it seems.

Closes: https://gitlab.freedesktop.org/mesa/mesa/issues/1310
Closes: https://gitlab.freedesktop.org/mesa/mesa/issues/1271
Closes: https://gitlab.freedesktop.org/mesa/mesa/issues/1272
Closes: https://gitlab.freedesktop.org/mesa/mesa/issues/1288
Closes: https://gitlab.freedesktop.org/mesa/mesa/issues/2611
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4181>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4181>

20 months agoutil/xmlconfig: add new sha1 application attribute
Pierre-Eric Pelloux-Prayer [Mon, 16 Mar 2020 09:49:45 +0000 (10:49 +0100)]
util/xmlconfig: add new sha1 application attribute

This is useful to enable workarounds for applications with a generic name.

For instance all games made with the YoYo game engine have the same executable
name "runner".

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4181>

20 months agoutil/u_process: add util_get_process_exec_path
Pierre-Eric Pelloux-Prayer [Mon, 16 Mar 2020 09:49:17 +0000 (10:49 +0100)]
util/u_process: add util_get_process_exec_path

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4181>

20 months agoutil/os_file: extend os_read_file to return the file size
Pierre-Eric Pelloux-Prayer [Mon, 16 Mar 2020 09:48:48 +0000 (10:48 +0100)]
util/os_file: extend os_read_file to return the file size

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4181>

20 months agoradeonsi: clarify the conditions when FLUSH_AND_INV_DB is needed
Pierre-Eric Pelloux-Prayer [Wed, 18 Mar 2020 20:57:31 +0000 (21:57 +0100)]
radeonsi: clarify the conditions when FLUSH_AND_INV_DB is needed

FLUSH_AND_INV_DB should be done when we're changing surface state
registers of a bound depth target.

When depth_clear_value changes, si_state will modify
S_028038_ZRANGE_PRECISION so we need to flush the DB caches.

Verified with the captures from bugs cited below.

Closes: https://gitlab.freedesktop.org/mesa/mesa/issues/1283
Closes: https://gitlab.freedesktop.org/mesa/mesa/issues/1330
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4263>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4263>

20 months agointel/dump_gpu: Handle a bunch of getparam in the no-HW case
Jason Ekstrand [Thu, 19 Mar 2020 21:45:19 +0000 (16:45 -0500)]
intel/dump_gpu: Handle a bunch of getparam in the no-HW case

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4250>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4250>

20 months agointel/dump_gpu: Add an ensure_device_info helper
Jason Ekstrand [Thu, 19 Mar 2020 21:44:56 +0000 (16:44 -0500)]
intel/dump_gpu: Add an ensure_device_info helper

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4250>

20 months agoanv: Stop fetching the timestamp frequency ourselves
Jason Ekstrand [Thu, 19 Mar 2020 21:23:01 +0000 (16:23 -0500)]
anv: Stop fetching the timestamp frequency ourselves

gen_get_device_info_from_fd fetches the timestamp frequency from the
kernel.  ANV also carrying code for it is redundant.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4250>

20 months agoegl/android: enable/disable KHR_partial_update correctly
Chia-I Wu [Wed, 18 Mar 2020 19:50:31 +0000 (12:50 -0700)]
egl/android: enable/disable KHR_partial_update correctly

Commit f3728816af (egl/android: require ANDROID_native_fence_sync
for buffer age) re-added some stale code removed in commit
b4345da8762 (egl/android: Delete set_damage_region from egl dri
vtbl).  Remove it now.

Commit b4345da8762 assumes KHR_partial_update is only
driver-dependent.  That is mostly true except that the extension
also introduces buffer age query, which depends on
ANDROID_native_fence_sync on Android.

Signed-off-by: Chia-I Wu <olvaffe@gmail.com>
Reviewed-by: Lepton Wu <lepton@chromium.org>
Reviewed-by: Kristian H. Kristensen <hoegsberg@google.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4235>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4235>

20 months agoci: Ban the recent popular freedreno a630 intermittent failure.
Eric Anholt [Mon, 23 Mar 2020 19:15:37 +0000 (12:15 -0700)]
ci: Ban the recent popular freedreno a630 intermittent failure.

This popped up last thursday.  The only relevant code commit was my pixel
center half integer change, but the more likely thing to me seems to be
having shuffled the test order by introducing more skips the day before.

Link: https://gitlab.freedesktop.org/mesa/mesa/issues/2670
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4287>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4287>

20 months agost/mesa: fix use of uninitialized memory due to st_nir_lower_builtin
Marek Olšák [Sat, 21 Mar 2020 21:54:36 +0000 (17:54 -0400)]
st/mesa: fix use of uninitialized memory due to st_nir_lower_builtin

reported by valgrind

Cc: 19.3 20.0 <mesa-stable@lists.freedesktop.org>
Reviewed-by: Rob Clark <robdclark@gmail.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4274>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4274>

20 months agoaco: fix boolean undef regclass
Rhys Perry [Mon, 23 Mar 2020 13:49:08 +0000 (13:49 +0000)]
aco: fix boolean undef regclass

Cc: <mesa-stable@lists.freedesktop.org>
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4285>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4285>

20 months agolima: Add missing source file to Android.mk
Roman Stratiienko [Mon, 23 Mar 2020 10:03:24 +0000 (12:03 +0200)]
lima: Add missing source file to Android.mk

Reviewed-by: Vasily Khoruzhick <anarsoul@gmail.com>
Signed-off-by: Roman Stratiienko <roman.stratiienko@nure.ua>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4283>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4283>

20 months agointel/tools/aubinator_error_decode: Decode ring buffers from HEAD to TAIL
D Scott Phillips [Fri, 20 Mar 2020 17:15:57 +0000 (10:15 -0700)]
intel/tools/aubinator_error_decode: Decode ring buffers from HEAD to TAIL

Capture the HEAD and TAIL register values from the dump and
properly index the ring buffer using those. Previously we would
decode the ring buffer from the beginning, printing out whatever
happened to be there.

Also, properly pass the `from_ring` parameter to gen_print_batch()
so that decoding doesn't stop once MI_BATCH_BUFFER_END is
encoutered.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4261>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4261>

20 months agodocs/features: Update virgl OpenGL 4.5 features
Elie Tournier [Thu, 12 Mar 2020 13:01:22 +0000 (13:01 +0000)]
docs/features: Update virgl OpenGL 4.5 features
GL_ARB_clip_control and GL_KHR_robustness are now expose in the guest.

Signed-off-by: Elie Tournier <elie.tournier@collabora.com>
Reviewed-by: Gert Wollny <gert.wollny@collabora.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4160>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4160>

20 months agointel/tools/aubinator_error_decode: read HW Context before other batches
D Scott Phillips [Thu, 19 Mar 2020 18:10:11 +0000 (11:10 -0700)]
intel/tools/aubinator_error_decode: read HW Context before other batches

The hardware context buffer has state that was set before the
batch started. By decoding it first, references to things like
Dynamic State Base Address are decodable in the command batches.

Reviewed-by: Rafael Antognolli <rafael.antognolli@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4246>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4246>

20 months agoiris: Set patch count threshold in 3DSTATE_HS
Sagar Ghuge [Fri, 24 Jan 2020 06:39:35 +0000 (22:39 -0800)]
iris: Set patch count threshold in 3DSTATE_HS

Lets specifiy maximum number of patches that will be accumulated before
a thread is dispatched.

Signed-off-by: Sagar Ghuge <sagar.ghuge@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3563>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3563>

20 months agoanv: Set patch count threshold in 3DSTATE_HS
Sagar Ghuge [Fri, 24 Jan 2020 06:27:53 +0000 (22:27 -0800)]
anv: Set patch count threshold in 3DSTATE_HS

Lets specifiy maximum number of patches that will be accumulated before
a thread is dispatched.

Signed-off-by: Sagar Ghuge <sagar.ghuge@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3563>

20 months agointel/compiler: Track patch count threshold
Sagar Ghuge [Fri, 24 Jan 2020 06:24:37 +0000 (22:24 -0800)]
intel/compiler: Track patch count threshold

Return the number of patches to accumulate before an 8_PATCH mode thread
is launched.

v2: (Kenneth Graunke)
- Track patch count threshold instead of input control points.

Signed-off-by: Sagar Ghuge <sagar.ghuge@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3563>

20 months agointel/genxml: Add patch count threshold field on gen12
Sagar Ghuge [Fri, 24 Jan 2020 06:00:44 +0000 (22:00 -0800)]
intel/genxml: Add patch count threshold field on gen12

Signed-off-by: Sagar Ghuge <sagar.ghuge@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3563>

20 months agogitlab-ci/traces: Add Vulkan sample entries for POLARIS10
Andres Gomez [Mon, 24 Feb 2020 13:52:53 +0000 (15:52 +0200)]
gitlab-ci/traces: Add Vulkan sample entries for POLARIS10

v2:
  - Updated commit log.

Signed-off-by: Andres Gomez <agomez@igalia.com>
Acked-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Alexandros Frantzis <alexandros.frantzis@collabora.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4103>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4103>

20 months agogitlab: add bug report template
Denys [Tue, 1 Oct 2019 13:24:20 +0000 (14:24 +0100)]
gitlab: add bug report template

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4089>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4089>

20 months agoaco: emit IR in IF's merge block instead if the other side ends in a jump
Rhys Perry [Wed, 26 Feb 2020 13:35:26 +0000 (13:35 +0000)]
aco: emit IR in IF's merge block instead if the other side ends in a jump

Fixes NIR such as:
if (divergent) {
   a = sgpr()
} else {
   break;
}
use(a)

Previously we would have emitted:
if (divergent) {
   a = sgpr()
}
if (!divergent) {
   break;
}
use(a)

But "a" isn't available at it's use. Now we emit:
if (divergent) {
}
if (!divergent) {
   break;
}
a = sgpr()
use(a)

pipeline-db (Navi):
Totals from affected shaders:
SGPRS: 1936 -> 1936 (0.00 %)
VGPRS: 1264 -> 1264 (0.00 %)
Spilled SGPRs: 0 -> 0 (0.00 %)
Spilled VGPRs: 0 -> 0 (0.00 %)
Scratch size: 0 -> 0 (0.00 %) dwords per thread
Code Size: 159408 -> 159152 (-0.16 %) bytes
LDS: 0 -> 0 (0.00 %) blocks
Max Waves: 81 -> 81 (0.00 %)

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
CC: <mesa-stable@lists.freedesktop.org>
Closes: https://gitlab.freedesktop.org/mesa/mesa/issues/2557
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3658>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3658>

20 months agoaco: improve check for unreachable loop continue blocks
Rhys Perry [Fri, 31 Jan 2020 16:39:20 +0000 (16:39 +0000)]
aco: improve check for unreachable loop continue blocks

The old code would have previously caught:
loop {
   ...
   break
}
when it was meant to just catch:
loop {
   if (...)
      break
   else
      break
}

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
CC: <mesa-stable@lists.freedesktop.org>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3658>

20 months agoaco: skip NIR in unreachable merge blocks
Rhys Perry [Fri, 31 Jan 2020 16:47:10 +0000 (16:47 +0000)]
aco: skip NIR in unreachable merge blocks

NIR removes most of this but undef instructions for loop header phis can
remain. These were harmless because ACO would DCE them itself.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
CC: <mesa-stable@lists.freedesktop.org>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3658>

20 months agoaco: handle when ACO adds new continue edges
Rhys Perry [Fri, 31 Jan 2020 13:56:26 +0000 (13:56 +0000)]
aco: handle when ACO adds new continue edges

Usually a loop ends with a uniform continue. If it doesn't and we end up
adding our own continue edges (because of continue_or_break or divergent
breaks at the end), we have to add extra operands to the loop header phis.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3658>

20 months agoaco: handle missing second predecessors at merge block phis
Rhys Perry [Fri, 31 Jan 2020 12:41:19 +0000 (12:41 +0000)]
aco: handle missing second predecessors at merge block phis

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
CC: <mesa-stable@lists.freedesktop.org>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3658>