mesa.git
7 years agotgsi: remove ureg_label_insn
Marc-André Lureau [Thu, 9 Feb 2017 14:36:32 +0000 (18:36 +0400)]
tgsi: remove ureg_label_insn

Unused since commit 2897cb3dba9287011f9c43cd2f214100952370c0.

Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
7 years agoradv: handle queue submission with no cs but semaphores
Dave Airlie [Thu, 9 Feb 2017 03:24:05 +0000 (03:24 +0000)]
radv: handle queue submission with no cs but semaphores

It's legal to submit just semaphores with no command streams,
this patch fixes this case by emitting the empty cs, it also
handles the fence emission for this case better.

Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Signed-off-by: Dave Airlie <airlied@redhat.com>
7 years agoutil/disk_cache: error check asprintf()
Timothy Arceri [Thu, 9 Feb 2017 11:41:15 +0000 (22:41 +1100)]
util/disk_cache: error check asprintf()

Fixes: f3d911463e8 "util/disk_cache: stop using ralloc_asprintf() unnecessarily"
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Eric Engestrom <eric.engestrom@imgtec.com>
7 years agodocs: add shader cache environment variables
Timothy Arceri [Tue, 27 Sep 2016 22:56:26 +0000 (08:56 +1000)]
docs: add shader cache environment variables

Reviewed-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
7 years agonvc0/ir: fix ubo max clamp, reset file index
Ilia Mirkin [Thu, 9 Feb 2017 20:35:51 +0000 (15:35 -0500)]
nvc0/ir: fix ubo max clamp, reset file index

We just increased the max UBO, so we should also increase the clamp that
we do for robustness. Similarly, as we're including the fileIndex in the
new indirect value, we should reset fileIndex to 0 so that it is not
added in a second time.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Cc: mesa-stable@lists.freedesktop.org
7 years agonv50/ir: always return 0 when trying to read thread id along unit dim
Ilia Mirkin [Thu, 26 Jan 2017 03:16:56 +0000 (22:16 -0500)]
nv50/ir: always return 0 when trying to read thread id along unit dim

Many many many compute shaders only define a 1- or 2-dimensional block,
but then continue to use system values that take the full 3d into
account (like gl_LocalInvocationIndex, etc). So for the special case
that a dimension is exactly 1, we know that the thread id along that
axis will always be 0, so return it as such and allow constant folding
to fix things up.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Pierre Moreau <pierre.morrow@free.fr>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
7 years agonvc0/ir: fix robustness guarantees for constbuf loads on kepler+ compute
Ilia Mirkin [Thu, 26 Jan 2017 04:48:23 +0000 (23:48 -0500)]
nvc0/ir: fix robustness guarantees for constbuf loads on kepler+ compute

Kepler and up unfortunately only support up to 8 constbufs. We work
around this by loading from constbufs as if they were storage buffers.
However we were not consistently applying limits to loads from these
buffers. Make sure to do the same thing we do for storage buffers.

Fixes GL45-CTS.robust_buffer_access_behavior.uniform_buffer

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Cc: mesa-stable@lists.freedesktop.org
7 years agonvc0: increase number of ubo binding points
Ilia Mirkin [Thu, 26 Jan 2017 04:06:22 +0000 (23:06 -0500)]
nvc0: increase number of ubo binding points

Apparently GL 4.5 requires 14 of these (there's a "*" in the spec, but
it's unclear what it refers to). We need to expose an extra binding
point for the "program parameters", which means this must be 15. Remove
the last vestige of the "use c14 for immediates" idea.

Fixes GL45-CTS.shading_language_420pack.binding_uniform_block_array

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Cc: mesa-stable@lists.freedesktop.org
7 years agoconfigure: add blurb about what the LIBDRM_*_REQUIRED stuff means
Ilia Mirkin [Tue, 7 Feb 2017 23:18:07 +0000 (18:18 -0500)]
configure: add blurb about what the LIBDRM_*_REQUIRED stuff means

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Chad Versace <chadversary@chromium.org>
7 years agonvc0: expose int64
Ilia Mirkin [Sun, 5 Feb 2017 18:08:07 +0000 (13:08 -0500)]
nvc0: expose int64

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
7 years agonvc0/ir: make it possible to have the flags def in def0
Ilia Mirkin [Sun, 5 Feb 2017 23:09:02 +0000 (18:09 -0500)]
nvc0/ir: make it possible to have the flags def in def0

There's all kinds of logic that doesn't like there being holes in defs
or srcs lists. Avoid them. This also fixes the sched logic for maxwell.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
7 years agonvc0/ir: add support for 64-bit shift lowering on SM20/SM30
Ilia Mirkin [Sun, 5 Feb 2017 15:03:53 +0000 (10:03 -0500)]
nvc0/ir: add support for 64-bit shift lowering on SM20/SM30

Unfortunately there is no SHF.L/SHF.R instruction pre-SM35. So we have
to do a bit more work to get the job done.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
7 years agonvc0/ir: add support for all the new int64 tgsi opcodes
Ilia Mirkin [Sun, 5 Feb 2017 03:31:04 +0000 (22:31 -0500)]
nvc0/ir: add support for all the new int64 tgsi opcodes

A few thoughts:
 - Some of that LegalizeSSA logic should really live much earlier and be
   subject to the likes of DCE and other useful passes
 - Some of the "lowering" done in from_tgsi should be done later so that
   proper optimization might be done.

However this all works and the above can be improved upon later.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
7 years agonv50/ir: Split 64-bit integer MAD/MUL operations
Pierre Moreau [Sun, 30 Oct 2016 21:34:25 +0000 (22:34 +0100)]
nv50/ir: Split 64-bit integer MAD/MUL operations

Hardware does not support 64-bit integers MAD and MUL operations, so we need
to transform them in 32-bit operations.

Signed-off-by: Pierre Moreau <pierre.morrow@free.fr>
7 years agonvc0/ir: add a "high" subop for shifts, emit shf.l/shf.r for 64-bit
Ilia Mirkin [Sun, 5 Feb 2017 03:29:17 +0000 (22:29 -0500)]
nvc0/ir: add a "high" subop for shifts, emit shf.l/shf.r for 64-bit

Note that this is not available for SM20/SM30.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
7 years agonvc0/ir: fix SET and SLCT emission
Ilia Mirkin [Sun, 5 Feb 2017 04:57:53 +0000 (23:57 -0500)]
nvc0/ir: fix SET and SLCT emission

We were never emitting a .X flag for consuming condition code on SET,
and weren't emitting a signed type for SLCT comparison. Discovered while
working on int64 logic.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
7 years agonvc0/ir: add support for emitting partial min/max ops for int64
Ilia Mirkin [Sat, 4 Feb 2017 15:55:03 +0000 (10:55 -0500)]
nvc0/ir: add support for emitting partial min/max ops for int64

These operations allow you to compute min/max on arbitrary-width
integers, 32 bits at a time.

Note that the low/med ops implicitly set the condition code, and the
med/high ops implicitly consume it.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
7 years agogallium: add separate PIPE_CAP_INT64_DIVMOD
Ilia Mirkin [Sun, 5 Feb 2017 03:31:29 +0000 (22:31 -0500)]
gallium: add separate PIPE_CAP_INT64_DIVMOD

Nouveau does not currently have logic to implement this as a library
function. Even though such a library could be written, there's no big
advantage to do it that way for now given that int64 is a very uncommon
use-case. Allow a driver to expose INT64 without supporting division and
modulo operations.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
7 years agodocs: improve the list of gl implementations
Eric Engestrom [Thu, 9 Feb 2017 15:04:14 +0000 (15:04 +0000)]
docs: improve the list of gl implementations

Suggested-by: Emil Velikov <emil.l.velikov@gmail.com>
Signed-off-by: Eric Engestrom <eric.engestrom@imgtec.com>
7 years agodocs: improve the list of implemented APIs
Eric Engestrom [Thu, 9 Feb 2017 15:03:30 +0000 (15:03 +0000)]
docs: improve the list of implemented APIs

Suggested-by: Emil Velikov <emil.l.velikov@gmail.com>
Signed-off-by: Eric Engestrom <eric.engestrom@imgtec.com>
7 years agoglsl: Allow compatibility shaders with MESA_GL_VERSION_OVERRIDE=...
Matt Turner [Tue, 31 Jan 2017 23:41:52 +0000 (15:41 -0800)]
glsl: Allow compatibility shaders with MESA_GL_VERSION_OVERRIDE=...

Previously if you used MESA_GL_VERSION_OVERRIDE=3.3COMPAT, Mesa exposed
an OpenGL 3.3 compatibility profile context (with various unimplemented
features and bugs), but still refused to compile shaders with

   #version 330 compatibility

This patch simply adds a small bit of plumbing to let that through.

Of course the same caveats apply: compatibility profile is still not
supported (and will not be supported), so there are no guarantees that
anything will work.

Tested-by: Dylan Baker <dylan@pnwbakers.com>
Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
7 years agodocs: reword sentence that my brain can't parse
Eric Engestrom [Thu, 9 Feb 2017 11:33:36 +0000 (11:33 +0000)]
docs: reword sentence that my brain can't parse

Signed-off-by: Eric Engestrom <eric.engestrom@imgtec.com>
Reviewed-by: Elie Tournier <tournier.elie@gmail.com>
7 years agodocs: https all the links \o/
Eric Engestrom [Thu, 9 Feb 2017 02:10:17 +0000 (02:10 +0000)]
docs: https all the links \o/

Most of them already redirected to https anyway, so we might as well
avoid the redirection and the security implications by linking directly
to the right protocol.

Signed-off-by: Eric Engestrom <eric@engestrom.ch>
Reviewed-by: Brian Paul <brianp@vmware.com>
7 years agodocs: fix gallium wiki link in relnotes
Eric Engestrom [Thu, 9 Feb 2017 02:10:16 +0000 (02:10 +0000)]
docs: fix gallium wiki link in relnotes

Signed-off-by: Eric Engestrom <eric@engestrom.ch>
Reviewed-by: Brian Paul <brianp@vmware.com>
7 years agodocs: update 'thanks' for hosting
Eric Engestrom [Thu, 9 Feb 2017 02:10:15 +0000 (02:10 +0000)]
docs: update 'thanks' for hosting

Signed-off-by: Eric Engestrom <eric@engestrom.ch>
Reviewed-by: Brian Paul <brianp@vmware.com>
7 years agoi965/fs: add support for int64 to bool conversion
Samuel Iglesias Gonsálvez [Wed, 8 Feb 2017 12:51:22 +0000 (13:51 +0100)]
i965/fs: add support for int64 to bool conversion

Signed-off-by: Samuel Iglesias Gonsálvez <siglesias@igalia.com>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=99660
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
7 years agonir: add opcode to perform int64 to bool conversions
Samuel Iglesias Gonsálvez [Wed, 8 Feb 2017 12:50:57 +0000 (13:50 +0100)]
nir: add opcode to perform int64 to bool conversions

Signed-off-by: Samuel Iglesias Gonsálvez <siglesias@igalia.com>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=99660
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
7 years agoi965/fs: Add support for nir_op_[iu]2[iu]32
Samuel Iglesias Gonsálvez [Wed, 8 Feb 2017 12:26:43 +0000 (13:26 +0100)]
i965/fs: Add support for nir_op_[iu]2[iu]32

Signed-off-by: Samuel Iglesias Gonsálvez <siglesias@igalia.com>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=99660
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
7 years agoi965/fs: Add support for nir_op_[iu]642f
Samuel Iglesias Gonsálvez [Wed, 8 Feb 2017 12:18:59 +0000 (13:18 +0100)]
i965/fs: Add support for nir_op_[iu]642f

Signed-off-by: Samuel Iglesias Gonsálvez <siglesias@igalia.com>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=99660
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
7 years agoi965/fs: legalize [u]int64 to 32-bit data conversions in lower_d2x
Samuel Iglesias Gonsálvez [Wed, 8 Feb 2017 12:14:34 +0000 (13:14 +0100)]
i965/fs: legalize [u]int64 to 32-bit data conversions in lower_d2x

Signed-off-by: Samuel Iglesias Gonsálvez <siglesias@igalia.com>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=99660
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
7 years agoi965/fs: Add support for nir_op_[iu]642d
Jason Ekstrand [Fri, 3 Feb 2017 01:11:35 +0000 (17:11 -0800)]
i965/fs: Add support for nir_op_[iu]642d

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Samuel Iglesias Gonsálvez <siglesias@igalia.com>
7 years agoi965: Allow int64 conversion operations in channel_expressions
Jason Ekstrand [Thu, 2 Feb 2017 22:56:23 +0000 (14:56 -0800)]
i965: Allow int64 conversion operations in channel_expressions

This fixes 143 of the new piglit tests added by Nicolai

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Samuel Iglesias Gonsálvez <siglesias@igalia.com>
7 years agoutil/disk_cache: stop using ralloc_asprintf() unnecessarily
Timothy Arceri [Wed, 8 Feb 2017 22:04:52 +0000 (09:04 +1100)]
util/disk_cache: stop using ralloc_asprintf() unnecessarily

Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
7 years agoglsl: add param to force shader recompile
Timothy Arceri [Tue, 22 Nov 2016 05:56:21 +0000 (16:56 +1100)]
glsl: add param to force shader recompile

This will be used to skip checking the cache and force a recompile.

Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
7 years agoutil: add a disk_cache_remove() function
Timothy Arceri [Tue, 26 Apr 2016 04:56:22 +0000 (14:56 +1000)]
util: add a disk_cache_remove() function

This will be used to remove cache items created with old versions
of Mesa or other invalid cache items from the cache.

V2: rename stub function (cache_* funtions were renamed disk_cache_*)
in master.

Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
7 years agost/mesa/i965: create link status enum
Timothy Arceri [Fri, 3 Feb 2017 23:46:53 +0000 (10:46 +1100)]
st/mesa/i965: create link status enum

For the on-disk shader cache we want to be able to differentiate
between a program that was linked and one that was loaded from cache.

V2:
 - don't return the new enum directly to the application when queried,
   instead return GL_TRUE or GL_FALSE as required. Fixes google-chrome
   corruptions when using cache.

Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
7 years agodocs: update intro.html to mention new APIs, etc
Brian Paul [Wed, 8 Feb 2017 19:31:44 +0000 (12:31 -0700)]
docs: update intro.html to mention new APIs, etc

Reviewed-by: Eric Engestrom <eric@engestrom.ch>
7 years agodocs: the site is now hosted by freedesktop.org
Brian Paul [Wed, 8 Feb 2017 19:31:43 +0000 (12:31 -0700)]
docs: the site is now hosted by freedesktop.org

Reviewed-by: Eric Engestrom <eric@engestrom.ch>
7 years agoradv: Add CPU color packing for VK_FORMAT_A2B10G10R10_UNORM_PACK32.
Bas Nieuwenhuizen [Wed, 8 Feb 2017 17:19:58 +0000 (18:19 +0100)]
radv: Add CPU color packing for VK_FORMAT_A2B10G10R10_UNORM_PACK32.

For allowing fast color clears in the main render targets of dota2.

[airlied: fix clear_vals[1] as suggested by Andres.

Signed-off-by: Bas Nieuwenhuizen <basni@google.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
7 years agomesa: (trivial) include <inttypes.h> for PRIx64 macros
Roland Scheidegger [Wed, 8 Feb 2017 20:56:16 +0000 (21:56 +0100)]
mesa: (trivial) include <inttypes.h> for PRIx64 macros

Fixes a compile error with mingw.

7 years agoswr: [rasterizer jitter] Pass LLVM-IR size into jitter
Tim Rowley [Tue, 31 Jan 2017 23:05:19 +0000 (17:05 -0600)]
swr: [rasterizer jitter] Pass LLVM-IR size into jitter

Reviewed-by: Bruce Cherniak <bruce.cherniak@intel.com>
7 years agoswr: [rasterizer core] Frontend SIMD16 WIP
Tim Rowley [Tue, 31 Jan 2017 19:13:00 +0000 (13:13 -0600)]
swr: [rasterizer core] Frontend SIMD16 WIP

Removed temporary scafolding in PA, widended the PA_STATE interface
for SIMD16, and implemented PA_STATE_CUT and PA_TESS for SIMD16.

PA_STATE_CUT and PA_TESS now work in SIMD16.

Reviewed-by: Bruce Cherniak <bruce.cherniak@intel.com>
7 years agoswr: [rasterizer jitter] Disable unsafe FP optimizations in the jitter
Tim Rowley [Fri, 20 Jan 2017 23:18:50 +0000 (17:18 -0600)]
swr: [rasterizer jitter] Disable unsafe FP optimizations in the jitter

Reviewed-by: Bruce Cherniak <bruce.cherniak@intel.com>
7 years agoswr: [rasterizer core] Frontend SIMD16 WIP
Tim Rowley [Wed, 25 Jan 2017 18:27:41 +0000 (12:27 -0600)]
swr: [rasterizer core] Frontend SIMD16 WIP

Widen simdvertex to SIMD16/simd16vertex in frontend for passing VS
attributes from VS to PA.

Reviewed-by: Bruce Cherniak <bruce.cherniak@intel.com>
7 years agoswr: [rasterizer jitter] Add DEBUGTRAP jit builder function
Tim Rowley [Tue, 24 Jan 2017 19:30:05 +0000 (13:30 -0600)]
swr: [rasterizer jitter] Add DEBUGTRAP jit builder function

Reviewed-by: Bruce Cherniak <bruce.cherniak@intel.com>
7 years agoswr: [rasterizer jitter] Multisample blend jit fix
Tim Rowley [Tue, 24 Jan 2017 18:37:13 +0000 (12:37 -0600)]
swr: [rasterizer jitter] Multisample blend jit fix

Reviewed-by: Bruce Cherniak <bruce.cherniak@intel.com>
7 years agoswr: [rasterizer jitter] Change SimdVector representation to array
Tim Rowley [Mon, 23 Jan 2017 17:30:13 +0000 (11:30 -0600)]
swr: [rasterizer jitter] Change SimdVector representation to array

Make all SimdVectors in LLVM represented as simdscalar[4] rather
than a struct.

Fixes issues with promotion of values from i32 to i64 to match
register width.

Reviewed-by: Bruce Cherniak <bruce.cherniak@intel.com>
7 years agoswr: [rasterizer jitter] Fix issues with stream-out on llvm>=3.8
Tim Rowley [Sat, 21 Jan 2017 00:32:14 +0000 (18:32 -0600)]
swr: [rasterizer jitter] Fix issues with stream-out on llvm>=3.8

Reviewed-by: Bruce Cherniak <bruce.cherniak@intel.com>
7 years agoswr: [rasterizer jitter] Adjust jitter header includes
Tim Rowley [Fri, 20 Jan 2017 00:32:06 +0000 (18:32 -0600)]
swr: [rasterizer jitter] Adjust jitter header includes

Reviewed-by: Bruce Cherniak <bruce.cherniak@intel.com>
7 years agoswr: [rasterizer core] Frontend SIMD16 WIP
Tim Rowley [Thu, 19 Jan 2017 00:08:40 +0000 (18:08 -0600)]
swr: [rasterizer core] Frontend SIMD16 WIP

SIMD16 Primitive Assembly (PA) only supports TriList and RectList.

CUT_AWARE_PA, TESS, GS, and SO disabled in the SIMD16 front end.

Reviewed-by: Bruce Cherniak <bruce.cherniak@intel.com>
7 years agodocs: update package contents
Eric Engestrom [Wed, 8 Feb 2017 11:27:00 +0000 (04:27 -0700)]
docs: update package contents

Signed-off-by: Eric Engestrom <eric.engestrom@imgtec.com>
Reviewed-by: Brian Paul <brianp@vmware.com>
7 years agodocs: fix unpacking instructions
Eric Engestrom [Wed, 8 Feb 2017 11:27:00 +0000 (04:27 -0700)]
docs: fix unpacking instructions

File names were wrong, file formats were wrong, bunzip command was
wrong...

I also removed all but the simplest example; people who use pipes already
know how to untar, so let's simplify and remove potential confusion for
non-tech-savvy users.

Signed-off-by: Eric Engestrom <eric.engestrom@imgtec.com>
Reviewed-by: Brian Paul <brianp@vmware.com>
7 years agodocs: remove dead 'beta' link
Eric Engestrom [Wed, 8 Feb 2017 11:27:00 +0000 (04:27 -0700)]
docs: remove dead 'beta' link

Release candidates haven't been in a 'beta' subdir in a long time, so let's
replace the dead link with an explanation instead.

Signed-off-by: Eric Engestrom <eric.engestrom@imgtec.com>
Reviewed-by: Brian Paul <brianp@vmware.com>
7 years agodocs: add a note about the new version scheme
Eric Engestrom [Wed, 8 Feb 2017 11:27:00 +0000 (04:27 -0700)]
docs: add a note about the new version scheme

Signed-off-by: Eric Engestrom <eric.engestrom@imgtec.com>
Reviewed-by: Brian Paul <brianp@vmware.com>
7 years agor600/sb: Fix memory leak
Bartosz Tomczyk [Sun, 29 Jan 2017 18:10:25 +0000 (19:10 +0100)]
r600/sb: Fix memory leak

Signed-off-by: Marek Olšák <marek.olsak@amd.com>
7 years agomesa: use PRId64/PRIu64 when printing 64-bit ints
Timothy Arceri [Wed, 8 Feb 2017 00:58:23 +0000 (11:58 +1100)]
mesa: use PRId64/PRIu64 when printing 64-bit ints

V2: actually use PRIu64

Reviewed-by: Dave Airlie <airlied@redhat.com>
7 years agomesa/st: fix strict aliasing issue in int64 code.
Dave Airlie [Wed, 8 Feb 2017 01:23:00 +0000 (01:23 +0000)]
mesa/st: fix strict aliasing issue in int64 code.

This fixes the int64 code same as the double code.

Reviewed-by: Timothy Arceri <t_arceri@yahoo.com.au>
Signed-off-by: Dave Airlie <airlied@redhat.com>
7 years agomesa/uniform: fix strict aliasing issues with int64 code.
Dave Airlie [Wed, 8 Feb 2017 01:20:10 +0000 (01:20 +0000)]
mesa/uniform: fix strict aliasing issues with int64 code.

This fixes these like the double version does.

Reviewed-by: Timothy Arceri <t_arceri@yahoo.com.au>
Signed-off-by: Dave Airlie <airlied@redhat.com>
7 years agoradv: handle dcc in explicit image resolve path. (v2)
Dave Airlie [Tue, 7 Feb 2017 21:35:51 +0000 (21:35 +0000)]
radv: handle dcc in explicit image resolve path. (v2)

We need to initialize dcc like we do in the subpass path.

v2: fix initial/final layouts
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Signed-off-by: Dave Airlie <airlied@redhat.com>
7 years agoradv: Enable fast clears by default.
Bas Nieuwenhuizen [Mon, 6 Feb 2017 23:36:41 +0000 (00:36 +0100)]
radv: Enable fast clears by default.

Works for me on dota2 and talos now.

Signed-off-by: Bas Nieuwenhuizen <basni@google.com>
Reviewed-by: Dave Airlie <airlied@redhat.com>
Reviewed-by: Andres Rodriguez <andresx7@gmail.com>
7 years agospirv: Add more asserts in vtn_vector_construct
Jason Ekstrand [Tue, 7 Feb 2017 05:16:54 +0000 (21:16 -0800)]
spirv: Add more asserts in vtn_vector_construct

Reviewed-by: Samuel Iglesias Gonsálvez <siglesias@igalia.com>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=99465

7 years agoconfigure.ac: remove src/gallium/winsys/intel/drm/Makefile reference
Emil Velikov [Tue, 7 Feb 2017 13:37:40 +0000 (13:37 +0000)]
configure.ac: remove src/gallium/winsys/intel/drm/Makefile reference

Not wired up (not referenced in any SUBDIR), leading to `make distcheck'
failure.

Fixes: d77fa310ed8 "ilo: EOL drop unmaintained gallium drv from buildsys"
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
7 years agodocs: reword ilo removal note
Emil Velikov [Tue, 7 Feb 2017 13:42:22 +0000 (13:42 +0000)]
docs: reword ilo removal note

Properly annotate <li> and keep the note analogous to all the previous
ones - OpenVG, st/egl, etc.

Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
7 years agoconfigure.ac: Remove redundant libglvnd stanza
Boyan Ding [Wed, 25 Jan 2017 06:49:26 +0000 (14:49 +0800)]
configure.ac: Remove redundant libglvnd stanza

There were two "libglvnd configuration" section in the squashed commit
that added libglvnd support, while only one in the original libglvnd
branch. A following commit moves one of them downwards. Now remove the
upper "older" one and move GL_LIB name decision downwards after the new
libglvnd configuration section.

Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Signed-off-by: Boyan Ding <boyan.j.ding@gmail.com>
7 years agotravis: use both cores for make/make check
Emil Velikov [Thu, 2 Feb 2017 02:50:12 +0000 (02:50 +0000)]
travis: use both cores for make/make check

The instance offers 2 cores, so use them to speed things up.

v2: Set MAKEFLAGS instead [Eric]
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
7 years agotravis: add nearly all gallium drivers to the list
Emil Velikov [Wed, 1 Feb 2017 22:30:26 +0000 (22:30 +0000)]
travis: add nearly all gallium drivers to the list

Note: we need the explicit --enable-freedreno for libdrm since the
latter is 'smart' and disables it if building on !arm platforms.

The radeonsi and swr are explicitly left out since they require
'too-recent' LLVM - 3.6

Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Andres Gomez <agomez@igalia.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
7 years agotravis: correct libdrm required regex to also track libdrm itself
Emil Velikov [Wed, 1 Feb 2017 22:30:25 +0000 (22:30 +0000)]
travis: correct libdrm required regex to also track libdrm itself

The current regex was tracking only the libdrm_foo packages, while with
recent changed we bumped only (and rightfully so) libdrm.

Fix the regex to track any libdrm package.

Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Andres Gomez <agomez@igalia.com>
Reviewed-by: Rhys Kidd <rhyskidd@gmail.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
7 years agoconfigure.ac: add swr to the gallium drivers list.
Emil Velikov [Wed, 1 Feb 2017 22:30:24 +0000 (22:30 +0000)]
configure.ac: add swr to the gallium drivers list.

v2: Rebase on top of ILO removal.

Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Andres Gomez <agomez@igalia.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
7 years agoconfigure.ac: list all the dri-drivers in the help string
Emil Velikov [Wed, 1 Feb 2017 22:30:23 +0000 (22:30 +0000)]
configure.ac: list all the dri-drivers in the help string

It's unlikely that any of the additions come as a suprise to anyone
i915, nouveau, radeon, r200. Regardless, state clearly what's
available.

Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Andres Gomez <agomez@igalia.com>
Reviewed-by: Chad Versace <chadversary@chromium.org>
Reviewed-by: Eric Anholt <eric@anholt.net>
7 years agoglsl: correct compute shader checks for memoryBarrier functions
Marc Di Luzio [Mon, 6 Feb 2017 09:07:30 +0000 (09:07 +0000)]
glsl: correct compute shader checks for memoryBarrier functions

As per the spec -
"The functions memoryBarrierShared() and groupMemoryBarrier() are
available only in compute shaders; the other functions are available
in all shader types."

Conform to this by adding another delegate to check for compute
shader support instead of only whether the current stage is compute

This allows some fragment shaders in Dirt Rally to compile

Cc: "17.0" <mesa-stable@lists.freedesktop.org>
Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
7 years agogallium/tgsi: fix oob access in parse instruction
Li Qiang [Mon, 23 Jan 2017 07:44:03 +0000 (02:44 -0500)]
gallium/tgsi: fix oob access in parse instruction

When parsing texture instruction, it doesn't stop if the
'cur' is ',', the loop variable 'i' will also be increased
and be used to index the 'inst.TexOffsets' array. This can lead
an oob access issue. This patch avoid this.

Reviewed-by: Dave Airlie <airlied@redhat.com>
Signed-off-by: Li Qiang <liq3ea@gmail.com>
7 years agoRevert "i965: Disable guardband clipping in the smaller-than-viewport case."
Kenneth Graunke [Sat, 21 Jan 2017 11:54:46 +0000 (03:54 -0800)]
Revert "i965: Disable guardband clipping in the smaller-than-viewport case."

This reverts commit 0bac2551e40410e2251daf4fd9faf69310ab34ce.

Now that we position the guardband correctly (applying translations
in addition to scaling) and made it as large (or larger) than the
render target, this shouldn't be necessary.

Now we leave guardband clipping enabled 100% of the time, like the
Windows driver does.

Fixes GL45-CTS.gtf21.GL2FixedTests.clip.clip.  It tries to draw a
16384x64 rectangle, and it appears that some kind of numerical
imprecisions in the clipper result in some edge pixels going missing.
The Windows driver passes this test because of guardband clipping.

Cc: "17.0" <mesa-stable@lists.freedesktop.org>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
7 years agoi965: Always scissor on Gen6-7.5 instead of disabling guardband.
Kenneth Graunke [Thu, 12 Jan 2017 05:38:52 +0000 (21:38 -0800)]
i965: Always scissor on Gen6-7.5 instead of disabling guardband.

Previously we disabled the guardband when the viewport was smaller than
the framebuffer on Gen6-7.5, to prevent portions of primitives from
being draw outside of the viewport.  On Gen8+, we relied on the viewport
extents test to effectively scissor this away for us.

We can simply always enable scissoring instead.  We already include the
viewport in the scissor rectangle, so this will effectively do the
viewport extents test for us.  (The only difference is that the scissor
rectangle doesn't support sub-pixel values.  I think that's okay.)

Given that the viewport extents test is essentially a second scissor,
and is enabled for basically all 3D drawing on Gen8+, it stands to
reason that scissoring is cheap.  Enabling the guardband reduces the
cost of clipping, which is expensive.

The Windows driver appears to never disable guardband clipping, and
appears to use scissoring in this case.  I don't know if they leave
it on universally though.

This fixes misrendering in Blender, where the "floor plane" grid lines
started rendering at wrong angles after I disabled XY clipping of line
primitives.  Enabling the guardband seems to solve the issue.

Cc: "17.0" <mesa-stable@lists.freedesktop.org>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=99339
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
7 years agoi965: Use a better guardband calculation.
Jason Ekstrand [Sat, 21 Jan 2017 11:50:42 +0000 (03:50 -0800)]
i965: Use a better guardband calculation.

(Patch co-authored by Jason and Ken.)

We scaled the guardband based on the viewport size, but failed to
take into account the translation portion of the viewport transform.

This meant the guardband was always centered around the origin.
We want it to be centered around the screen-space drawing area,
which is the intersection of the viewport and the render target.

At best, getting this wrong would reduce the guardband's effectiveness
in some cases.  At worst, it might break things - objects outside of the
guardband are trivially rejected, so getting the guardband in the wrong
place and leaving guardband clipping enabled could cause problems.

v2: drop clamping of positive maximums.

Cc: "17.0" <mesa-stable@lists.freedesktop.org>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
7 years agoi965: Combine the Gen6 SF and Clip viewport atoms.
Kenneth Graunke [Sat, 21 Jan 2017 22:10:15 +0000 (14:10 -0800)]
i965: Combine the Gen6 SF and Clip viewport atoms.

The next patch will make the guardband calculation dependent on the
transformation matrix.  Instead of computing it in both atoms, just
combine them into a single atom.

Cc: "17.0" <mesa-stable@lists.freedesktop.org>
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
7 years agoradv: pass FMASK alignment to application
Dave Airlie [Tue, 7 Feb 2017 00:31:11 +0000 (10:31 +1000)]
radv: pass FMASK alignment to application

As was done for dcc and cmask.

Cc: "17.0" <mesa-stable@lists.freedesktop.org>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Signed-off-by: Dave Airlie <airlied@redhat.com>
7 years agoradv: Pass DCC alignment to application.
Bas Nieuwenhuizen [Mon, 6 Feb 2017 23:45:11 +0000 (00:45 +0100)]
radv: Pass DCC alignment to application.

Signed-off-by: Bas Nieuwenhuizen <basni@google.com>
Cc: "17.0" <mesa-stable@lists.freedesktop.org>
Reviewed-by: Dave Airlie <airlied@redhat.com>
Reviewed-by: Andres Rodriguez <andresx7@gmail.com>
7 years agoradv: Pass CMASK alignment to application.
Bas Nieuwenhuizen [Mon, 6 Feb 2017 23:24:16 +0000 (00:24 +0100)]
radv: Pass CMASK alignment to application.

CMASK alignment can be greater than image data alignment, so pass
it to the app so that it knows what alignment to backing memory
should have.

Signed-off-by: Bas Nieuwenhuizen <basni@google.com>
Cc: <mesa-stable@lists.freedesktop.org>
Reviewed-by: Dave Airlie <airlied@redhat.com>
7 years agoradv/ac: avoid the fmask path when doing txs.
Dave Airlie [Mon, 6 Feb 2017 02:40:45 +0000 (02:40 +0000)]
radv/ac: avoid the fmask path when doing txs.

This fixes the vulkan samples deferredmultisampling test.

Cc: "17.0" <mesa-stable@lists.freedesktop.org>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Signed-off-by: Dave Airlie <airlied@redhat.com>
7 years agoswr: [rasterizer core] Removed unused clip code.
Bruce Cherniak [Fri, 3 Feb 2017 17:35:59 +0000 (11:35 -0600)]
swr: [rasterizer core] Removed unused clip code.

Removed unused Clip() and FRUSTUM_CLIP_MASK define.

Reviewed-by: Tim Rowley <timothy.o.rowley@intel.com>
7 years agoswr: [rasterizer core] Remove dead code Clipper::ClipScalar()
Bruce Cherniak [Thu, 2 Feb 2017 20:15:08 +0000 (14:15 -0600)]
swr: [rasterizer core] Remove dead code Clipper::ClipScalar()

Clipper::ClipScalar() is dead code and should be removed.  It is causing
an error with gcc-7 because it references a now defunct member.

v2: includes bugzilla reference, same code change

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=99633
CC: "13.0 17.0" <mesa-stable@lists.freedesktop.org>
Tested-by: Vinson Lee <vlee@freedesktop.org>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Tim Rowley <timothy.o.rowley@intel.com>
7 years agogallium: Remove vc4 simulator hack from loader infrastructure.
Eric Anholt [Fri, 3 Feb 2017 19:04:46 +0000 (11:04 -0800)]
gallium: Remove vc4 simulator hack from loader infrastructure.

Now that there's MESA_LOADER_DRIVER_OVERRIDE for choosing the driver name
we load, we don't need this any more.

v2: Get the junk out of pipe_loader_drm.c, too.

Reviewed-by: Emil Velikov <emil.velikov@collabora.com> (v1)
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com> (v2)
7 years agoloader: Add an environment variable to override driver name choice.
Eric Anholt [Fri, 3 Feb 2017 19:02:59 +0000 (11:02 -0800)]
loader: Add an environment variable to override driver name choice.

My vc4 simulator has been implemented so far by having an entrypoint
claiming to be i965, which was a bit gross.  The simulator would be a lot
less special if we entered through the vc4 entrypoint like normal, so add
a loader environment variable to allow the i965 fd to probe as vc4.

Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
7 years agotargets: Use a macro to reduce cut and paste in driver setup.
Eric Anholt [Fri, 3 Feb 2017 18:54:12 +0000 (10:54 -0800)]
targets: Use a macro to reduce cut and paste in driver setup.

All the replicated prototypes/function bodies obfuscated the interesting
logic of the file: the mapping from driver enable macros to entrypoints we
expose, and the way that the swrast entrypoints are special compared to
the DRM entrypoints.

Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
7 years agoradeon/ac: move common llvm build functions to a separate file.
Dave Airlie [Fri, 3 Feb 2017 00:05:00 +0000 (10:05 +1000)]
radeon/ac: move common llvm build functions to a separate file.

Suggested by Marek.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Acked-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Reviewed-by: Edward O'Callaghan <funfunctor@folklore1984.net>
Signed-off-by: Dave Airlie <airlied@redhat.com>
7 years agoeglmesaext: add new enums for EGL_MESA_drm_image_formats
Nicolai Hähnle [Tue, 24 Jan 2017 12:57:19 +0000 (13:57 +0100)]
eglmesaext: add new enums for EGL_MESA_drm_image_formats

Reviewed-by: Eric Engestrom <eric.engestrom@imgtec.com>
7 years agodocs: add EGL_MESA_drm_image_formats extension proposal
Nicolai Hähnle [Tue, 24 Jan 2017 12:10:01 +0000 (13:10 +0100)]
docs: add EGL_MESA_drm_image_formats extension proposal

7 years agodri/common: clear the loaderPrivate pointer in driDestroyDrawable
Nicolai Hähnle [Fri, 27 Jan 2017 10:55:14 +0000 (11:55 +0100)]
dri/common: clear the loaderPrivate pointer in driDestroyDrawable

The GLX specification says about glXDestroyPixmap:

    "The storage for the GLX pixmap will be freed when it is not current
     to any client."

We're not really following this language to the letter: some of the storage
is freed immediately (in particular, the dri3_drawable, which contains both
GLXDRIdrawable and loader_dri3_drawable). So we NULL out the pointers to
that freed storage; the previous patches added the corresponding NULL-pointer
checks.

This fixes memory corruption in piglit
./bin/glx-visuals-depth/stencil -pixmap -auto

Cc: 17.0 <mesa-stable@lists.freedesktop.org>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
7 years agoglx: guard swap-interval functions against destroyed drawables
Nicolai Hähnle [Thu, 2 Feb 2017 17:06:27 +0000 (18:06 +0100)]
glx: guard swap-interval functions against destroyed drawables

The GLX specification says about glXDestroyPixmap:

    "The storage for the GLX pixmap will be freed when it is not current
     to any client."

So arguably, functions like glXSwapIntervalMESA can be called after
glXDestroyPixmap has been called for the currently bound GLXPixmap.
In that case, the GLXDRIDrawable no longer exists, and so we just skip
those calls.

Cc: 17.0 <mesa-stable@lists.freedesktop.org>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
7 years agoglx/dri3: guard in_current_context against a disappeared drawable
Nicolai Hähnle [Thu, 2 Feb 2017 17:01:06 +0000 (18:01 +0100)]
glx/dri3: guard in_current_context against a disappeared drawable

Cc: 17.0 <mesa-stable@lists.freedesktop.org>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
7 years agoglx/dri3: handle NULL pointers in loader-to-DRI3 drawable conversion
Nicolai Hähnle [Fri, 27 Jan 2017 10:58:41 +0000 (11:58 +0100)]
glx/dri3: handle NULL pointers in loader-to-DRI3 drawable conversion

With a subsequent patch, we might see NULL loaderPrivates, e.g. when
a DRIdrawable is flushed whose corresponding GLXDRIdrawable was destroyed.
This resulted in a crash, since the loader vs. DRI3 drawable structures
have a non-zero offset.

Fixes glx-visuals-{depth,stencil} -pixmap

Cc: 17.0 <mesa-stable@lists.freedesktop.org>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
7 years agoanv/pipeline: set ThreadDispatchEnable conditionally
Juan A. Suarez Romero [Fri, 3 Feb 2017 11:11:38 +0000 (12:11 +0100)]
anv/pipeline: set ThreadDispatchEnable conditionally

Set 3DSTATE_WM/ThreadDispatchEnable bit on/off based on the same
conditions as used in the GL version.

Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
7 years agomain/fboject: default_framebuffer allowed for GetFramebufferParameter
Alejandro Piñeiro [Fri, 13 Jan 2017 17:53:13 +0000 (15:53 -0200)]
main/fboject: default_framebuffer allowed for GetFramebufferParameter

Before 4.5, the default framebuffer was not allowed for
GetFramebufferParameter, so it should return INVALID_OPERATION for any
call using the default framebuffer.

4.5 included new pnames, and some of them are allowed for the default
framebuffer. For the rest, INVALID_OPERATION. From OpenGL 4.5 spec,
section 9.2.3 "Framebuffer Object Queries:

   "An INVALID_OPERATION error is generated by GetFramebufferParameteriv
    if the default framebuffer is bound to target and pname is not one
    of the accepted values from table 23.73, other than
    SAMPLE_POSITION."

Fixes:
GL45-CTS.direct_state_access.framebuffers_get_parameter_errors

Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
7 years agomain/fbobject: implement new 4.5 pnames for GetFramebufferParameter
Alejandro Piñeiro [Fri, 13 Jan 2017 18:23:05 +0000 (16:23 -0200)]
main/fbobject: implement new 4.5 pnames for GetFramebufferParameter

4.5 added new pnames allowed for GetFramebufferParameter, and
GetNamedFramebufferParameter.

From OpenGL 4.5 spec, section 9.2.3 "Framebuffer Object Queries" (quoting
the paragraph with only the new pnames, not all the supported):

   "pname may also be one of DOUBLEBUFFER,
    IMPLEMENTATION_COLOR_READ_FORMAT, IMPLEMENTATION_COLOR_READ_TYPE,
    SAMPLES, SAMPLE_BUFFERS, or STEREO, indicating the corresponding
    framebuffer-dependent state from table 23.73. Values of
    framebuffer-dependent state are identical to those that would be
    obtained were the framebuffer object bound and queried using the
    simple state queries in that table. These values may be queried
    from either a framebuffer object or a default framebuffer."

Fixes:
GL45-CTS.direct_state_access.framebuffers_get_parameters

Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
7 years agomain/framebuffer: refactor _mesa_get_color_read_format/type
Alejandro Piñeiro [Tue, 17 Jan 2017 20:06:36 +0000 (18:06 -0200)]
main/framebuffer: refactor _mesa_get_color_read_format/type

Current implementation returns the value for the currently bound read
framebuffer. GetNamedFramebufferParameteriv allows to get it for any
given framebuffer. GetFramebufferParameteriv would be also interested
on that method

It was refactored by allowing to pass a given framebuffer. If NULL is
passed, it used the currently bound framebuffer.

It also adds a call to _mesa_update_state. When used only by
GetIntegerv, this one was called as part of the extra checks defined
at get_hash. But now that the method is used by more methods, and the
update is needed, it makes sense (and it is safer) just calling it on
the method itself, instead of rely on the caller.

Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
7 years agoradv: fix shared memory load/stores.
Dave Airlie [Fri, 3 Feb 2017 03:26:13 +0000 (03:26 +0000)]
radv: fix shared memory load/stores.

If we have an indirect index here we need to scale it by attribute slots
e.g. is this is vec2[256] then we get an indir_index in the 0.255 range
but the vec2 are aligned inside vec4 slots. So scale the indir index,
then extract the channels.

Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Cc: "17.0" <mesa-stable@lists.freedesktop.org>
Signed-off-by: Dave Airlie <airlied@redhat.com>
7 years agoradv/ac: correctly size shared memory usage.
Dave Airlie [Fri, 3 Feb 2017 01:46:24 +0000 (01:46 +0000)]
radv/ac: correctly size shared memory usage.

We count the number of slots used, but slots are vec4 sized,
so we have to scale by 16 not 4.

Reviewed-by: Edward O'Callaghan <funfunctor@folklore1984.net>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Cc: "17.0" <mesa-stable@lists.freedesktop.org>
Signed-off-by: Dave Airlie <airlied@redhat.com>
7 years agoradv: fix compute shared memory stores since 64-bit.
Dave Airlie [Fri, 3 Feb 2017 01:03:13 +0000 (01:03 +0000)]
radv: fix compute shared memory stores since 64-bit.

These regressed and caused doom to stop loading.

Fixes:
03724af26 radv/ac: Implement Float64 load/store var.

Reviewed-by: Edward O'Callaghan <funfunctor@folklore1984.net>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Signed-off-by: Dave Airlie <airlied@redhat.com>
7 years agodocs: replace URL in features.txt
Brian Paul [Wed, 1 Feb 2017 21:35:03 +0000 (14:35 -0700)]
docs: replace URL in features.txt

Replace unmaintained http://dri.freedesktop.org/wiki/MissingFunctionality
URL with http://mesamatrix.net/

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=95460
Acked-by: Kenneth Graunke <kenneth@whitecape.org>
7 years agomesa: whitespace fixes in context.c
Brian Paul [Wed, 1 Feb 2017 23:48:31 +0000 (16:48 -0700)]
mesa: whitespace fixes in context.c

Remove trailing whitespace, replace tabs with spaces.  Trivial.