etnaviv: always do cpu_fini in transfer_unmap

The cpu_fini() call pushes the buffer back into the GPU domain, which needs
to be done for all buffers, not just the ones with CPU written content. The
etnaviv kernel driver currently doesn't validate this, but may start to do
so at a later point in time. If there is a temporary resource the fini needs
to happen before the RS uses this one as the source for the upload.

Also remove an invalid comment about flushing CPU caches, cpu_fini takes
care of everything involved in this.

Fixes: c9e8b49b885 ("etnaviv: gallium driver for Vivante GPUs")
Cc: mesa-stable@lists.freedesktop.org
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Reviewed-by: Philipp Zabel <p.zabel@pengutronix.de>
Reviewed-By: Wladimir J. van der Laan <laanwj@gmail.com>

docs: update calendar, add news item and link release notes for 17.0.7

Signed-off-by: Emil Velikov <emil.velikov@collabora.com>

docs: add sha256 checksums for 17.0.7

Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
(cherry picked from commit bdfd5658e7cd4c6925afa06bb858c0601865a1ea)

docs: add release notes for 17.0.7

Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
(cherry picked from commit 46cc7a1746e03b1672c8508af49eb60546d5b61d)

glsl: fix a crash in ir_print_visitor() for bindless samplers/images

Bindless samplers/images are represented with 64-bit unsigned
integers and they can be assigned with explicit constructors.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>

glsl: teach opt_array_splitting about bindless images

Memory/format layout qualifiers shouldn't be lost when arrays
of images are splitted by this pass.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>

glsl: teach opt_structure_splitting about images in structures

GL_ARB_bindless_texture allows images to be declared inside
structures, but when memory/format qualifiers are used, they
should be propagated when structures are splitted.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>

glsl: fix broken indentation in do_structure_splitting()

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>

glsl: handle format layout qualifiers for struct with array of images

This handles a situation like:

struct {
   layout (r32f) image2D imgs[6];
} s;

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>

glsl: handle memory qualifiers for struct with array of images

This handles a situation like:

struct {
   image2D imgs[6];
} s;

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>

nvc0: Clean up unnecessary includes from gallium/auxiliary/vl/

Signed-off-by: Rhys Kidd <rhyskidd@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>

i965: Simplify SO_DECL handling.

We can initialize structs directly, avoid some temporaries, and cut out
about half of the skip component handling.

Reviewed-by: Rafael Antognolli <rafael.antognolli@intel.com>

i965: Make a local for linked_xfb->Outputs[i], to shorten things.

This seems a bit more readable.

Reviewed-by: Rafael Antognolli <rafael.antognolli@intel.com>

i965: Move SOL PSIZ hacks from draw time to link time.

We can just update the gl_transform_feedback_info fields at link time
to make the VUE header fields have the right location and component.
Then we don't need to handle them specially at draw time, which is
expensive.

Reviewed-by: Rafael Antognolli <rafael.antognolli@intel.com>

mesa/main: replace remaining uses of IROUND() in GetUniform*() by round()

These were correct since they were used only in conversions to signed integers,
however this makes the implementation a bit more is more consistent and reduces
chances of propagating use of these macros to unsigned cases in the future, which
would not be correct.

Reviewed-by: Matt Turner <mattst88@gmail.com>

mesa/main: conversion from float in GetUniformi64v requires rounding to nearest

As we do for all other cases of float/double conversions to integers.

v2: use round() instead of IROUND() macros (Iago)

Reviewed-by: Matt Turner <mattst88@gmail.com>

mesa/main: Add conversion from double to uint64/int64 in GetUniform*i64v()

v2:
  - need unsigned rounding for double->uint64 conversion (Nicolai)
  - use round() instead of IROUND() macros (Iago)

Reviewed-by: Matt Turner <mattst88@gmail.com>

mesa/main: Clamp GetUniformui64v values to be >= 0

Like we do for the 32-bit case.

v2:
  - need unsigned rounding for float->uint64 conversion (Nicolai)
  - use roundf() instead of IROUND() macros (Iago)

Reviewed-by: Matt Turner <mattst88@gmail.com>

mesa/main: Clamp GetUniformuiv values to be >= 0

Section 2.2.2 (Data Conversions For State Query Commands) of the
OpenGL 4.5 October 24th 2016 specification says:

"If a command returning unsigned integer data is called, such as
 GetSamplerParameterIuiv, negative values are clamped to zero."

v2: uint to int conversion should clamp to INT_MAX (Nicolai)

v3 (Iago)
  - Add conversions conversions from 64-bit integer paths
  - Rebase on master

v4:
  - need unsigned rounding for float/double->uint conversions (Nicolai)
  - use round{f}() instead of IROUND() macros (Iago)

Fixes:
KHR-GL45.gpu_shader_fp64.state_query

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com> (v2)
Reviewed-by: Matt Turner <mattst88@gmail.com>

mesa/main: fix indentation in _mesa_get_uniform()

v2: also change the style of the large conditional in that function
    to follow the style from most other parts of Mesa (Nicolai)

Reviewed-by: Matt Turner <mattst88@gmail.com>

r100: Silence numerous unused this or that warnings

radeon_fbo.c: In function ‘radeon_map_renderbuffer_s8z24’:
radeon_fbo.c:147:50: warning: unused parameter ‘ctx’ [-Wunused-parameter]
 radeon_map_renderbuffer_s8z24(struct gl_context *ctx,
                                                  ^~~
radeon_fbo.c: In function ‘radeon_map_renderbuffer_z16’:
radeon_fbo.c:186:48: warning: unused parameter ‘ctx’ [-Wunused-parameter]
 radeon_map_renderbuffer_z16(struct gl_context *ctx,
                                                ^~~
radeon_fbo.c: In function ‘radeon_unmap_renderbuffer_s8z24’:
radeon_fbo.c:344:52: warning: unused parameter ‘ctx’ [-Wunused-parameter]
 radeon_unmap_renderbuffer_s8z24(struct gl_context *ctx,
                                                    ^~~
radeon_fbo.c: In function ‘radeon_unmap_renderbuffer_z16’:
radeon_fbo.c:377:50: warning: unused parameter ‘ctx’ [-Wunused-parameter]
 radeon_unmap_renderbuffer_z16(struct gl_context *ctx,
                                                  ^~~
radeon_fbo.c: In function ‘radeon_nop_alloc_storage’:
radeon_fbo.c:624:75: warning: unused parameter ‘rb’ [-Wunused-parameter]
 radeon_nop_alloc_storage(struct gl_context * ctx, struct gl_renderbuffer *rb,
                                                                           ^~
radeon_fbo.c:625:12: warning: unused parameter ‘internalFormat’ [-Wunused-parameter]
     GLenum internalFormat, GLuint width, GLuint height)
            ^~~~~~~~~~~~~~
radeon_fbo.c:625:35: warning: unused parameter ‘width’ [-Wunused-parameter]
     GLenum internalFormat, GLuint width, GLuint height)
                                   ^~~~~
radeon_fbo.c:625:49: warning: unused parameter ‘height’ [-Wunused-parameter]
     GLenum internalFormat, GLuint width, GLuint height)
                                                 ^~~~~~
radeon_fbo.c: In function ‘radeon_bind_framebuffer’:
radeon_fbo.c:696:74: warning: unused parameter ‘fbread’ [-Wunused-parameter]
                        struct gl_framebuffer *fb, struct gl_framebuffer *fbread)
                                                                          ^~~~~~
radeon_fbo.c: In function ‘radeon_validate_framebuffer’:
radeon_fbo.c:832:19: warning: unused variable ‘radeon’ [-Wunused-variable]
  radeonContextPtr radeon = RADEON_CONTEXT(ctx);
                   ^~~~~~

Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>

r100: Use _mesa_get_format_base_format in radeon_update_wrapper

The wrapper is for a renderbuffer around a texture.  Textures can have
formats (e.g., 3) that aren't valide for API generated renderbuffers.
_mesa_base_fbo_format will return 0, but _mesa_get_format_base_format
will return the base format of RGB.

Fixes a crashes in piglit tests fbo-alphatest-formats (all subtests
pass) and fbo-colormask-formats (some subtests pass, some fail).

Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Cc: mesa-stable@lists.freedesktop.org
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>

r100,r200: Don't assume glVisual is non-NULL during context creation

Thanks to EGL_MESA_configless_context, the visual pointer can be NULL.

Fixes a segfault (or assertion failure) in piglit's
egl-configless-context test.

Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Cc: mesa-stable@lists.freedesktop.org
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>

r100: Don't assume that the base mipmap of a texture exists

Fixes crashes in piglit's gl-1.2-texture-base-level.

Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Cc: mesa-stable@lists.freedesktop.org
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>

r600/eg: add support for tracing IBs after a hang.

This is a poor man's version of radeonsi ddebug stuff, this
should get hooked into that infrastructure, and grow more stuff,
but for now, just create R600_TRACE var that points to a file
that you want to dump the last IB to.

Signed-off-by: Dave Airlie <airlied@redhat.com>

glsl/lower_int64: only set progress when something is lowered.

Otherwise we'd get progress continually set if we had non 64-bit
versions of these ops.

Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>

radv: Revert HTILE reset word to 0xFFFFFFFF.

0x30f regressed mad max.

Signed-off-by: Bas Nieuwenhuizen <basni@google.com>
Acked-by: Dave Airlie <airlied@redhat.com>
Fixes: df91abfe5af "radv: Use correct clear words for HTILE."

Android: major/minor/makedev live in <sys/sysmacros.h>

sysmacros.h was getting implicitly included in types.h until recently in
AOSP master. Define MAJOR_IN_SYSMACROS to explicitly include sysmacros.h.

Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Signed-off-by: Rob Herring <robh@kernel.org>

egl/android: Drop unused 'format' param in get_back_bo()

Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>

egl/android: Align channel masks in HAL_PIXEL_FORMAT table

Improves readability. No change in behavior.

Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>

egl/drm: remove temporary fd variable

In all codepaths, this var ends up assigned to the struct, except one:
a cleanup codepath, where the `close()` was removed, leading to fd leaks.
Remove the temp fd and assign to the struct field directly instead.

CovID: 1213930
Fixes: 7ec07beedf486d8ab901 ("egl/drm: make use of the
                              dri2_display_destroy() helper")
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Signed-off-by: Eric Engestrom <eric.engestrom@imgtec.com>

mesa: throw an INVALID_OPERATION error in get_texobj_by_name()

Because get_texobj_by_name() can already throw a INVALID_ENUM
error, it makes more sense to add a check directly there.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>

mesa: add new 'name' parameter to get_texobj_by_name()

To display better function names when INVALID_OPERATION is
returned. Requested by Timothy.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>

radeonsi: remove unused si_pm4_state::compute_pkt

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>

radeonsi: remove chip_class define from si_pm4.h

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>

radeonsi: merge si_pm4_free_state_simple() into si_pm4_free_state()

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>

mesa/util: fix arithmetic use of 'void *' in u_vector_foreach

u_vector_foreach is currently only used by the Intel Vulkan
driver but when this macro is used in mesa core, GCC reports
a compile-time error. Probably because some compiler options
are different.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>

mesa: remove _mesa from static function names

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>

mesa/st: indentation tidy-up

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>

freedreno/a5xx: drop WFIs in emit_marker5()

Results in always having at least one WFI between draws, which was
slowing stk down by ~5% and ~10% in xonotic.

(also drop bogus assert while we're at it.)

Signed-off-by: Rob Clark <robdclark@gmail.com>

freedreno/a5xx: timestamp / time-elapsed queries

Signed-off-by: Rob Clark <robdclark@gmail.com>

freedreno/a5xx: rename query result struct

Going to want the same thing for timestamp queries.

Signed-off-by: Rob Clark <robdclark@gmail.com>

freedreno: update generated headers

Signed-off-by: Rob Clark <robdclark@gmail.com>

i965: Delete dead old-school packing structs.

Trivial.

swr/rast: code cleanup (no functional change)

Reviewed-by: Bruce Cherniak <bruce.cherniak@intel.com>

swr/rast: whitespace changes

Reviewed-by: Bruce Cherniak <bruce.cherniak@intel.com>

swr/rast: code cleanup (no functional change)

Reviewed-by: Bruce Cherniak <bruce.cherniak@intel.com>

swr/rast: allow early-z if shader uses depth value

Reviewed-by: Bruce Cherniak <bruce.cherniak@intel.com>

swr/rast: move wireframe/point triangle binning after culling

Reviewed-by: Bruce Cherniak <bruce.cherniak@intel.com>

swr/rast: remove unused functions

Reviewed-by: Bruce Cherniak <bruce.cherniak@intel.com>

swr/rast: code cleanup (no functional change)

Reviewed-by: Bruce Cherniak <bruce.cherniak@intel.com>

swr/rast: move binner utility functions to binner.h

Reviewed-by: Bruce Cherniak <bruce.cherniak@intel.com>

swr/rast: SIMD16 FE - fix/use SIMD16 calcDeterminantIntVertical()

Stop double pumping the SIMD8 version.

Reviewed-by: Bruce Cherniak <bruce.cherniak@intel.com>

swr/rast: add renderTargetArrayIndex to SWR_PS_CONTEXT

Reviewed-by: Bruce Cherniak <bruce.cherniak@intel.com>

swr/rast: make simd16 logicops avx512f safe

Express the simd16 logicops in terms of avx512f instructions.

Reviewed-by: Bruce Cherniak <bruce.cherniak@intel.com>

swr/rast: SIMD16 FE - add SIMD16 types to jitter

Reviewed-by: Bruce Cherniak <bruce.cherniak@intel.com>

swr/rast: SIMD16 FE - fix PA_STATE_OP::Reset()

Fixes instanced GS.

Reviewed-by: Bruce Cherniak <bruce.cherniak@intel.com>

swr/rast: SIMD16 FE - simplify/refactor StreamOut

Reviewed-by: Bruce Cherniak <bruce.cherniak@intel.com>

swr/rast: SIMD16 FE - fix conservative rasterization

Reviewed-by: Bruce Cherniak <bruce.cherniak@intel.com>

swr/rast: SIMD16 FE - interleaved simdvertex output in GS

Eliminates conversion copies on GS output from simdvertex to simd16vertex.

Reviewed-by: Bruce Cherniak <bruce.cherniak@intel.com>

swr/rast: fix _simd16_movemask_(ps,pd) native AVX512 intrinsics

Reviewed-by: Bruce Cherniak <bruce.cherniak@intel.com>

swr/rast: SIMD16 FE - primitive assembly simplification

Reduce/simplify vertex storage usage in PA_STATE_OPT, fix PA
GetNextVSOutput wrap-around behaviour and eliminate unnecessary
SIMDVERTEX copies/storage for tri fan in PA_STATE_OPT

Fixes the OpenGL tri fan test failure under SIMD16 -
triangle-rasterization-overdraw.

Reviewed-by: Bruce Cherniak <bruce.cherniak@intel.com>

swr/rast: silence write of cfg graph

Reviewed-by: Bruce Cherniak <bruce.cherniak@intel.com>

swr/rast: add CreateDirectoryPath to recursively create directories

Reviewed-by: Bruce Cherniak <bruce.cherniak@intel.com>

swr/rast: add support for DX1_RGB{_SRGB} formats

Reviewed-by: Bruce Cherniak <bruce.cherniak@intel.com>

swr/rast: clean up whitespace

Reviewed-by: Bruce Cherniak <bruce.cherniak@intel.com>

swr/rast: adjust BinPostSetupPoints* function signature

Reviewed-by: Bruce Cherniak <bruce.cherniak@intel.com>

swr/rast: remove extra pixel center adjustment in BinPostSetupPoints

Reviewed-by: Bruce Cherniak <bruce.cherniak@intel.com>

anv: Port over CACHE_MODE_1 optimization fix enables from brw.

Ben and I haven't observed these to help anything, but they enable
hardware optimizations for particular cases.  It's probably best to
enable them ahead of time, before we run into such a case.

Reviewed-by: Plamena Manolova <plamena.manolova@intel.com>
Acked-by: Jason Ekstrand <jason@jlekstrand.net>

genxml: Add Gen9 CACHE_MODE_1 definitons.

These were already in gen8.xml but not gen9.xml.  There are a few new
fields and a couple that have changed.  These are all documented in the
Skylake PRM, Volume 2c Command Reference: Registers, Part 1.

Reviewed-by: Plamena Manolova <plamena.manolova@intel.com>
Acked-by: Jason Ekstrand <jason@jlekstrand.net>

i965: Set the "Float Blend Optimization Enable" bit on Gen9+.

This is woefully undocumented.  It's some kind of optimization that
avoids unnecessary render target reads when blending with a floating
point render target, using independent alpha blending modes.

The internal documentation indicates that this bit exists on Cherryview
as well, but the other driver doesn't appear to set it on that platform.
There's also some confusing wording that indicates that it may exist on
Broadwell, but the documentation says it's reserved, so who knows.

I was not able to find any workload that benefited from setting this
bit, but it seems like a good idea to set it nonetheless.

Reviewed-by: Plamena Manolova <plamena.manolova@intel.com>
Acked-by: Jason Ekstrand <jason@jlekstrand.net>

i965: Fix type of brw_context::render_target_format[]

It's an array of isl_format, not uint32_t. This patch updates every
reference to render_target_format[] git-grep.

Trivial cleanup. No change in behavior.

Reviewed-by: Tapani Pälli <tapani.palli@intel.com>

i965: Move func to right comment block in brw_context.h

brw_init_surface_formats() is defined in brw_surface_formats.c, not
brw_wm_surface_state.c.

Reviewed-by: Tapani Pälli <tapani.palli@intel.com>

i965: Document type of GLuint __DRIimage::format

It's either a mesa_format or mesa_array_format.

Reviewed-by: Tapani Pälli <tapani.palli@intel.com>

i965: Add whitespace in intel_update_image_buffers()

Improve readability.  Add an empty line between two large 'if' blocks.

Reviewed-by: Tapani Pälli <tapani.palli@intel.com>

i965: Move an 'i' declaration into its 'for' loop

In intel_update_dri2_buffers().
Trivial cleanup.

Reviewed-by: Tapani Pälli <tapani.palli@intel.com>

i965: Fix type of intel_update_image_buffers::format

It's a mesa_format, not an unsigned int.

Reviewed-by: Tapani Pälli <tapani.palli@intel.com>

i965: Rename intel_create_renderbuffer

The name is misleading because the function is unrelated to GL
renderbuffers. Rename it to intel_create_winsys_renderbuffer.

Reviewed-by: Tapani Pälli <tapani.palli@intel.com>

i965/dri: Combine declaration and assignment in intelCreateBuffer

Trivial cleanup.

Reviewed-by: Tapani Pälli <tapani.palli@intel.com>

i965/dri: Rewrite comment for intelCreateBuffer

The old comment pinned this function to X11 windows. In reality, this
function serves more than X11 and more than just windows.

Reviewed-by: Tapani Pälli <tapani.palli@intel.com>

mesa: Avoid leaking surface in st_renderbuffer_delete

v2: add comment in code

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=100741
Fixes: a5e733c6b52 mesa: drop current draw/read buffer when ctx is released
Reviewed-by: Rob Clark <robdclark@gmail.com> (v1)
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>

egl: advertise EGL_EXT_image_dma_buf_import_modifiers

v2: check for DRIimageExtension version 15 (Jason Ekstrand)

Signed-off-by: Varad Gautam <varad.gautam@collabora.com>
Reviewed-by: Daniel Stone <daniels@collabora.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Eric Engestrom <eric.engestrom@imgtec.com>

egl: implement eglQueryDmaBufModifiersEXT

query and return supported dmabuf format modifiers for
EGL_EXT_image_dma_buf_import_modifiers.

v2: move format check to the driver instead of making format queries
   here and then checking.
v3: Check DRIimageExtension version before query (Daniel Stone)
v4:
- move to DRIimageExtension version 15, check queryDmaBufModifiers before
  calling (Jason Ekstrand)
- pass external_only to the driver instead of setting as EGL_TRUE here
  (Emil Velikov, Daniel Stone)

Signed-off-by: Varad Gautam <varad.gautam@collabora.com>
Reviewed-by: Daniel Stone <daniels@collabora.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Eric Engestrom <eric.engestrom@imgtec.com>

egl: implement eglQueryDmaBufFormatsEXT

allow egl clients to query the dmabuf formats supported on this platform.

v2: return EGLBoolean.
v3: Check DRIimageExtension version before querying (Daniel Stone).
v4: move to DRIimageExtension version 15, error checking (Jason Ekstrand).

Signed-off-by: Louis-Francis Ratté-Boulianne <lfrb@collabora.com>
Signed-off-by: Varad Gautam <varad.gautam@collabora.com>
Reviewed-by: Daniel Stone <daniels@collabora.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Eric Engestrom <eric.engestrom@imgtec.com>

egl/dri2: Create EGLImages with dmabuf modifiers

Allow creating EGLImages with dmabuf format modifiers when target is
EGL_LINUX_DMA_BUF_EXT for EGL_EXT_image_dma_buf_import_modifiers.

v2:
- clear modifier assembling and error label name (Eric Engestrom)
v3:
- remove goto jumps within switch-case (Emil Velikov)
- treat zero as valid modifier (Daniel Stone)
- ensure same modifier across all dmabuf planes (Emil Velikov)
v4:
- allow modifiers to add extra planes (Louis-Francis Ratté-Boulianne)
v5:
- fix error checking, some cleanups (Jason Ekstrand)
- pass single copy of the modifier to createImageFromDmaBufs2

Signed-off-by: Pekka Paalanen <pekka.paalanen@collabora.co.uk>
Signed-off-by: Varad Gautam <varad.gautam@collabora.com>
Signed-off-by: Louis-Francis Ratté-Boulianne <lfrb@collabora.com>
Reviewed-by: Eric Engestrom <eric.engestrom@imgtec.com>
Reviewed-by: Daniel Stone <daniels@collabora.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>

dri: introduce dmabuf format modifier related handles

these allow dmabuf import with modifiers, and supported format and
modifier queries, which are used to implement
EGL_EXT_image_dma_buf_import_modifiers.

v2:
- squash dmabuf queries into DRIimage version 15 (Jason Ekstrand).
- add external_only param to queryDmaBufModifiers (Emil, Daniel Stone)
- pass a single modifier form createImageFromDmaBufs2 since all planes have
the same modifier (Jason Ekstrand)

Signed-off-by: Pekka Paalanen <pekka.paalanen@collabora.co.uk>
Signed-off-by: Varad Gautam <varad.gautam@collabora.com>
Reviewed-by: Daniel Stone <daniels@collabora.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Eric Engestrom <eric.engestrom@imgtec.com>

egl/main: add support for fourth plane tokens

The EGL_EXT_dma_buf_import_modifiers extension adds support for a
fourth plane, just like DRM KMS API does.

Bump maximum dma_buf plane count to four.

v2: prevent attribute tokens from being parsed if
    EXT_image_dma_buf_import_modifiers is not suported. (Emil Velikov)

Signed-off-by: Pekka Paalanen <pekka.paalanen@collabora.co.uk>
Signed-off-by: Varad Gautam <varad.gautam@collabora.com>
Reviewed-by: Eric Engestrom <eric.engestrom@imgtec.com>
Reviewed-by: Daniel Stone <daniels@collabora.com>

egl: introduce DMA_BUF_MAX_PLANES

Rather than hardcoding 3, use a #define. Makes it easier to bump this
later to 4.

Signed-off-by: Pekka Paalanen <pekka.paalanen@collabora.co.uk>
Signed-off-by: Varad Gautam <varad.gautam@collabora.com>
Reviewed-by: Eric Engestrom <eric.engestrom@imgtec.com>
Reviewed-by: Daniel Stone <daniels@collabora.com>

nvc0: support for GP10B

GP10B uses the same 3D class as GP100.

Signed-off-by: Alexandre Courbot <acourbot@nvidia.com>
Acked-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Acked-by: Ilia Mirkin <imirkin@alum.mit.edu>

etnaviv: Don't try to use the index buffer if size is zero

If info->index_size is zero, info->index will point to uninitialized
memory.

Fatal signal 11 (SIGSEGV), code 2, fault addr 0xab5d07a3 in tid 20456 (surfaceflinger)

lst: Remove useless indexbuf conditional in the index_size != 0 case.

Fixes: 330d0607ed60 ("gallium: remove pipe_index_buffer and set_index_buffer")
Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Reviewed-by: Lucas Stach <l.stach@pengutronix.de>

i965: Always scissor on Gen4-5 instead of disabling guardband.

See commit ece0e535a44c228dd994861592deb155c14740d8.  This makes
Gen4-5 follow the behavior we use on Gen6+.  It seems to have
worked out there.

Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>

i965: Unify Gen4-5 and Gen6 SF_VIEWPORT/CLIP_VIEWPORT code.

This brings the improved guardbanding we implemented on Gen6+
back to the older Gen4-5 code.  It also deletes piles of code.

Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>

i965: Make a set_scissor_bits helper function.

Gen4-5 include a single SCISSOR_RECT in SF_VIEWPORT.

Making a helper function will allow us to reuse this code for Gen4-5.

Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>

i965: Use GENX(packet_length) rather than hardcoded dword counts.

This is clearer and less likely to break in the future.

Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>

i965: Move the scissoring code up near the viewport code.

These are fairly related.  Gen4-5 combine the scissor rectangle and
SF_VIEWPORT.  Co-locating them will allow me to avoid forward
declarations of helper functions in a few patches.

Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>

genxml: Make a SCISSOR_RECT structure on Gen4-5.

Gen6+ support multiple scissor rectangles, and define a SCISSOR_RECT
structure containing their dimensions.  On Gen4-5, those same fields
exist in SF_VIEWPORT.

This patch extracts the SF_VIEWPORT fields into a SCISSOR_RECT
structure.  Although not a named concept on Gen4-5, it works just
as well, and gives us a consistent SCISSOR_RECT structure across
all generations, making it easier to reuse code.

Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>

i965: Replace brw->gen and devinfo->gen with GEN_GEN.

Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>

i965: Rework Sandybridge 3DSTATE_VIEWPORT_STATE_POINTERS.

On Gen7+ we emit 3DSTATE_VIEWPORT_STATE_POINTERS_{SF_CL,CC} when
emitting a new viewport.

This patch makes us take the same approach on Sandybridge - but because
we have a combined command, we just set the appropriate "change" bits.
This eliminates an atom, some dirty flagging, and some brw->*.vp_offset
writes.  It does mean we'll emit two 3DSTATE_VIEWPORT_STATE_POINTERS
instead of one if both change, but that's probably fine.

Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>

i965: Port CC_VIEWPORT to genxml.

Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>

i965: Ignore INTEL_SCALAR_* debug variables on Gen10+.

Scalar mode has been default since Broadwell, and vector mode is getting
increasingly unmaintained.  There are a few things that don't even fully
work in vector mode on Skylake, but we've never cared because nobody
uses it.  There's no point in porting it forward to new platforms.

So, just ignore the debug options to force it on.

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>